driver_hsuart.c 10 KB

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  1. /*
  2. * @File name : driver_hsuart.c
  3. * @Author : Bluetrum IOT Team
  4. * @Date : 2023-02-14
  5. * @Description : This file provides functions to manage the most functionalities
  6. * of the HSUART peripheral.
  7. *
  8. * Copyright (c) by Bluetrum, All Rights Reserved.
  9. */
  10. #include "driver_hsuart.h"
  11. /**
  12. * @brief Initializes the hsuart peripheral according to the specified
  13. * parameters in the hsuart_init_struct.
  14. * @param hsuart_init_struct: pointer to a hsuart_init_typedef structure that
  15. * contains the configuration information for the specified HSUART peripheral.
  16. * @retval None
  17. */
  18. void hsuart_init(hsuart_init_typedef *hsuart_init_struct)
  19. {
  20. uint32_t tmp_reg, sys_clk_val, baud_reg;
  21. /*--- Enable model function ---*/
  22. RSTCON0 |= 1<<2;
  23. tmp_reg = HSUART->con;
  24. //---------- hsuart Tx configuration ----------//
  25. tmp_reg &= ~(uint32_t)(HSUT0CON_SPBITSEL | HSUT0CON_TXBITSEL | HSUT0CON_TXTRSMODE);
  26. tmp_reg |= hsuart_init_struct->tx_stop_bit;
  27. tmp_reg |= hsuart_init_struct->tx_word_len;
  28. tmp_reg |= hsuart_init_struct->tx_mode;
  29. //---------- hsuart Rx configuration ----------//
  30. tmp_reg &= ~(HSUT0CON_RXBITSEL | HSUT0CON_RXTRSMODE);
  31. tmp_reg |= hsuart_init_struct->rx_word_len;
  32. tmp_reg |= hsuart_init_struct->rx_mode;
  33. /* hsuart one line configuration */
  34. tmp_reg &= ~HSUT0CON_ONELINE;
  35. tmp_reg |= hsuart_init_struct->one_line_en;
  36. /* hsuart Rx dma mode loop buf configuration */
  37. if (hsuart_init_struct->rx_mode == HSUT_RX_DMA_MODE) {
  38. tmp_reg &= ~HSUT0CON_RXLPBUFEN;
  39. tmp_reg |= hsuart_init_struct->rx_dma_buf_mode;
  40. }
  41. HSUART->con = tmp_reg;
  42. //---------- hsuart baud and clock configuration ----------//
  43. if (hsuart_init_struct->clk_source == HSUT_24M_CLK) {
  44. clk_hsut0_clk_set(CLK_HSUT0_CLK_XOSC24M_CLK, 0);
  45. } else if (hsuart_init_struct->clk_source == HSUT_48M_CLK) {
  46. clk_hsut0_clk_set(CLK_HSUT0_CLK_XOSC48M, 0);
  47. } else if (hsuart_init_struct->clk_source == HSUT_PLLDIV4_CLK) {
  48. clk_hsut0_clk_set(CLK_HSUT0_CLK_PLLDIV2_CLK, 1);
  49. }
  50. sys_clk_val = clk_hsut0_clk_get(CLK_VALUE_MODE_FREQ);
  51. if (hsuart_init_struct->baud == 0) {
  52. return;
  53. }
  54. baud_reg = (sys_clk_val / hsuart_init_struct->baud) - 1;
  55. tmp_reg = (uint32_t)((baud_reg << 16) | baud_reg);
  56. HSUART->baud = tmp_reg;
  57. }
  58. /**
  59. * @brief De-initialize the specified HSUART peripheral.
  60. * @retval None
  61. */
  62. void hsuart_deinit(void)
  63. {
  64. HSUART->con = 0;
  65. clk_gate0_cmd(CLK_GATE0_HSUART, CLK_DIS);
  66. }
  67. /**
  68. * @brief Enable or disable the specified HSUART peripheral.
  69. * @param rec_tra_sel: select whether Rx or Tx needs to be configured.
  70. * this parameter cna be: HSUT_TRANSMIT or HSUT_RECEIVE.
  71. * @param state: the state of the HSUART peripheral.
  72. * this parameter can be: ENABLE or DISABLE.
  73. * @retval None
  74. */
  75. void hsuart_cmd(HSUT_REC_TRA_CMD rec_tra_sel, FUNCTIONAL_STATE state)
  76. {
  77. if (state != DISABLE) {
  78. HSUART->con |= (uint32_t)rec_tra_sel;
  79. } else {
  80. HSUART->con &= ~(uint32_t)rec_tra_sel;
  81. }
  82. }
  83. /**
  84. * @brief Transmits data through the HSUART buf mode.
  85. * @param data: the data to transmit.
  86. * @retval None
  87. */
  88. AT(.com_periph.hsuart.send)
  89. void hsuart_send_data(uint16_t data)
  90. {
  91. if (HSUART->con & HSUT0CON_TXBITSEL) {
  92. HSUART->data = (uint32_t)(data & 0x1ff);
  93. } else {
  94. HSUART->data = (uint32_t)(data & 0xff);
  95. }
  96. }
  97. /**
  98. * @brief Return the received data lastly by the buf mode.
  99. * @retval The received data.
  100. */
  101. AT(.com_periph.hsuart.recv)
  102. uint16_t hsuart_receive_data(void)
  103. {
  104. return (HSUART->fifo & 0xff);
  105. }
  106. /**
  107. * @brief Get the receive data from Rx DMA FIFO.
  108. * @param buf: A buf pointer used to return data.
  109. * @param len: The data number need to read.
  110. * @retval Result of func execution. It will be SUCCESS or FAILED.
  111. */
  112. AT(.com_periph.hsuart.receive_data)
  113. STATUS_STATE hsuart_receive_data_from_fifo(uint8_t *buf, uint8_t len)
  114. {
  115. u8 i = 0;
  116. if (len > HSUART->fifo_cnt || !buf) {
  117. return FAILED;
  118. }
  119. while (len--) {
  120. HSUART->fifo |= (1 << 8);
  121. while (!(HSUART->fifo & (1 << 9)));
  122. buf[i++] = HSUART->fifo & 0xff;
  123. }
  124. return SUCCESS;
  125. }
  126. /**
  127. * @brief Get Rx DMA mode FIFO counter value.
  128. * @retval The value of FIFO counter.
  129. */
  130. AT(.com_periph.hsuart.fifo_get)
  131. uint16_t hsuart_get_fifo_counter(void)
  132. {
  133. return HSUART->fifo_cnt;
  134. }
  135. /**
  136. * @brief Clear fifo counter.
  137. * @retval None
  138. */
  139. void hsuart_clear_fifo_counter(void)
  140. {
  141. HSUART->cpnd |= (uint32_t)(1 << 17);
  142. }
  143. /**
  144. * @brief Change the HSUART baud.
  145. * @param baud: Specifies the baud rateof the serial port.
  146. * @retval None.
  147. */
  148. void hsuart_baud_config(uint32_t baud)
  149. {
  150. u32 baud_reg, sys_clk_val;
  151. //---------- hsuart baud and clock configuration ----------//
  152. sys_clk_val = clk_hsut0_clk_get(CLK_VALUE_MODE_FREQ);
  153. baud_reg = (sys_clk_val / baud) - 1;
  154. HSUART->baud = (uint32_t)((baud_reg << 16) | baud_reg);
  155. }
  156. /**
  157. * @brief Enable or disable the specified HSUART interrupt.
  158. * @param isr: Function to be executed for service interruption.
  159. * @param pr: Priority of service interruption.
  160. * @param interrup_type: specifies the HSUART interrupt sources to be enable or disable.
  161. * this parameter can be one of the following values:
  162. * @arg HSUART_IT_RX_DMA_HF: RX DMA half-full interrupt enable bit.
  163. * @arg HSUART_IT_TX: Transmit single or n bytes data finish interrupt enable bit.
  164. * @arg HSUART_IT_RX: Receive single or n bytes data finish interrupt enable bit.
  165. * @param state: the state of the HSUART peripheral.
  166. * this parameter can be: ENABLE or DISABLE.
  167. * @retval None
  168. */
  169. void hsuart_pic_config(isr_t isr, int pr, HSUART_IT_TYPEDEF interrupt_type, FUNCTIONAL_STATE state)
  170. {
  171. uint32_t interrupt_pending_bit = 0;
  172. uint32_t all_interrupt_type_mask = HSUART_IT_RX_DMA_HF | HSUART_IT_TX | HSUART_IT_RX;
  173. if (interrupt_type == 0) {
  174. return;
  175. }
  176. if (interrupt_type & HSUART_IT_RX) {
  177. interrupt_pending_bit |= HSUT0CON_RXIE;
  178. }
  179. if (interrupt_type & HSUART_IT_TX) {
  180. interrupt_pending_bit |= HSUT0CON_TXIE;
  181. }
  182. if (interrupt_type & HSUART_IT_RX_DMA_HF) {
  183. interrupt_pending_bit |= HSUT0CON_RXHF_IE;
  184. }
  185. if (state != DISABLE) {
  186. sys_irq_init(IRQn_HSUART, pr, isr);
  187. HSUART->con |= interrupt_pending_bit;
  188. } else {
  189. HSUART->con &= ~interrupt_pending_bit;
  190. if (interrupt_type == all_interrupt_type_mask) {
  191. PICEN &= ~BIT(IRQn_HSUART);
  192. }
  193. }
  194. }
  195. /**
  196. * @brief Check the specified HSUART flag is set or not.
  197. * @param interrupt_type: specifies the flag to check.
  198. * this parameter can be one of the following values:
  199. * @arg HSUART_IT_RX_DMA_HF: RX DMA half-full interrupt pending bit.
  200. * @arg HSUART_IT_RX_TMR_OV: RX timer overflow interrupt pending bit.
  201. * @arg HSUART_IT_TX: Transmit single or n bytes data finish interrupt pending bit.
  202. * @arg HSUART_IT_RX: Receive single or n bytes data finish interrupt pending bit.
  203. * @retval The state of uart_flag (SET or RESET).
  204. */
  205. AT(.com_periph.hsuart.get_flag)
  206. FLAG_STATE hsuart_get_flag(HSUART_IT_TYPEDEF interrupt_type)
  207. {
  208. uint32_t interrupt_pending_bit = 0;
  209. if (interrupt_type & HSUART_IT_RX) {
  210. interrupt_pending_bit |= HSUT0CON_RXPND;
  211. }
  212. if (interrupt_type & HSUART_IT_TX){
  213. interrupt_pending_bit |= HSUT0CON_TXPND;
  214. }
  215. if (interrupt_type & HSUART_IT_RX_TMR_OV){
  216. interrupt_pending_bit |= HSUT0CON_TMROV;
  217. }
  218. if (interrupt_type & HSUART_IT_RX_DMA_HF){
  219. interrupt_pending_bit |= HSUT0CON_RXHF_PND;
  220. }
  221. if ((HSUART->con & interrupt_pending_bit) != RESET) {
  222. return SET;
  223. } else {
  224. return RESET;
  225. }
  226. }
  227. /**
  228. * @brief Clear the HSUART's pending flag.
  229. * @param hsuart_flag: specifies the flag to check.
  230. * this parameter can be one of the following values:
  231. * @arg HSUART_IT_RX_DMA_HF: RX DMA half-full interrupt pending bit.
  232. * @arg HSUART_IT_RX_TMR_OV: RX timer overflow interrupt pending bit.
  233. * @arg HSUART_IT_TX: Transmit single or n bytes data finish interrupt pending bit.
  234. * @arg HSUART_IT_RX: Receive single or n bytes data finish interrupt pending bit.
  235. * @retval None
  236. */
  237. AT(.com_periph.hsuart.clear)
  238. void hsuart_clear_flag(HSUART_IT_TYPEDEF interrupt_type)
  239. {
  240. uint32_t interrupt_pending_bit = 0;
  241. if (interrupt_type & HSUART_IT_RX) {
  242. interrupt_pending_bit |= HSUT0CPND_CRXPND;
  243. }
  244. if (interrupt_type & HSUART_IT_TX){
  245. interrupt_pending_bit |= HSUT0CPND_CTXPND;
  246. }
  247. if (interrupt_type & HSUART_IT_RX_TMR_OV){
  248. interrupt_pending_bit |= HSUT0CPND_CTMROV;
  249. }
  250. if (interrupt_type & HSUART_IT_RX_DMA_HF){
  251. interrupt_pending_bit |= HSUT0CPND_CRXHFPND;
  252. }
  253. HSUART->cpnd |= interrupt_pending_bit;
  254. }
  255. /**
  256. * @brief Config idle timer that can trigger an interrupt when Rx idle.
  257. * @param idle_time: The maximum number of idle clocks.
  258. * @param state: the state of the HSUART peripheral.
  259. * this parameter can be: ENABLE or DISABLE.
  260. * @retval None
  261. */
  262. void hsuart_rx_idle_config(uint16_t idle_time, FUNCTIONAL_STATE state)
  263. {
  264. if (state != DISABLE) {
  265. HSUART->tmr_cnt = idle_time;
  266. HSUART->con |= HSUT0CON_HSUTTMREN;
  267. } else {
  268. HSUART->con &= ~HSUT0CON_HSUTTMREN;
  269. }
  270. }
  271. /**
  272. * @brief Start send or receive dma. When receiving data of indefinite
  273. * length, need to enable the idle timer.
  274. * @param rec_tra_sel: Tx or Rx to configure.
  275. * this parameter can be: (HSUT_TRANSMIT or HSUT_RECEIVE)
  276. * @param addr: DMA start address.
  277. * @param len: DMA transmit len.
  278. * @retval None
  279. */
  280. AT(.com_periph.hsuart.dma)
  281. void hsuart_dma_start(HSUT_REC_TRA_CMD rec_tra_sel, uint32_t addr, uint16_t len)
  282. {
  283. if (rec_tra_sel == HSUT_RECEIVE) {
  284. HSUART->rx_adr = addr;
  285. HSUART->rx_cnt = (uint32_t)len;
  286. } else if (rec_tra_sel == HSUT_TRANSMIT) {
  287. HSUART->tx_adr = addr;
  288. HSUART->tx_cnt = (uint32_t)len;
  289. }
  290. }
  291. /**
  292. * @brief stop send or receive dma.
  293. * @param rec_tra_sel: Tx or Rx to configure.
  294. * this parameter can be: (HSUT_TRANSMIT or HSUT_RECEIVE)
  295. * @retval None
  296. */
  297. AT(.com_periph.hsuart.stop)
  298. void hsuart_dma_stop(HSUT_REC_TRA_CMD rec_tra_sel)
  299. {
  300. if (rec_tra_sel == HSUT_RECEIVE) {
  301. HSUART->rx_cnt = 0;
  302. } else if (rec_tra_sel == HSUT_TRANSMIT) {
  303. HSUART->tx_cnt = 0;
  304. }
  305. }