driver_tmr.c 12 KB

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  1. /*
  2. * @File name : driver_tmr.c
  3. * @Author : Bluetrum IOT Team
  4. * @Date : 2023-02-14
  5. * @Description : This file provides functions to manage the most functionalities
  6. * of the TMR peripheral.
  7. *
  8. * Copyright (c) by Bluetrum, All Rights reserved.
  9. */
  10. #include "driver_tmr.h"
  11. /**
  12. * @brief Initializes the timer base peripheral according to the specified
  13. * parameters in the tmr_base_init_typedef.
  14. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  15. * @param tmr_base_init_struct: pointer to a tmr_base_init_typedef structure that
  16. * contains the configuration information for the specified TMR peripheral.
  17. * @retval None
  18. */
  19. void tmr_base_init(tmr_typedef *tmrx, tmr_base_init_typedef *tmr_base_init_struct)
  20. {
  21. //---------- tmr controller register ----------//
  22. if (tmrx == TMR0 || tmrx == TMR1 || tmrx == TMR2) {
  23. tmrx->con &= ~(uint32_t)TMRxCON_INCSEL;
  24. tmrx->con |= (uint32_t)tmr_base_init_struct->clock_source;
  25. tmrx->con &= ~(uint32_t)TMRxCON_INCSRC;
  26. tmrx->con |= (uint32_t)tmr_base_init_struct->counter_source;
  27. } else if (tmrx == TMR3) {
  28. tmrx->con &= ~(uint32_t)TMR3CON_INCSEL;
  29. tmrx->con |= (uint32_t)tmr_base_init_struct->clock_source;
  30. tmrx->con &= ~(uint32_t)TMR3CON_INCSRC;
  31. tmrx->con |= (uint32_t)tmr_base_init_struct->counter_source;
  32. tmrx->psc = (uint16_t)(tmr_base_init_struct->prescale);
  33. }
  34. tmrx->period = (uint32_t)(tmr_base_init_struct->period);
  35. }
  36. /**
  37. * @brief De-initialize the specified tmr peripheral.
  38. * @retval None
  39. */
  40. void tmr_deinit(tmr_typedef *tmrx)
  41. {
  42. tmrx->con = 0;
  43. if (tmrx == TMR0) {
  44. clk_gate0_cmd(CLK_GATE0_TMR0, CLK_DIS);
  45. } else if (tmrx == TMR1) {
  46. clk_gate0_cmd(CLK_GATE0_TMR1, CLK_DIS);
  47. } else if (tmrx == TMR2) {
  48. clk_gate0_cmd(CLK_GATE0_TMR2, CLK_DIS);
  49. } else if (tmrx == TMR3) {
  50. clk_gate1_cmd(CLK_GATE1_TMR3, CLK_DIS);
  51. }
  52. }
  53. /**
  54. * @brief Set the TMR counter register value.
  55. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  56. * @param cnt: specifies the counter register new value.
  57. * @retval None
  58. */
  59. void tmr_set_counter(tmr_typedef *tmrx, uint32_t cnt)
  60. {
  61. tmrx->cnt = cnt;
  62. }
  63. /**
  64. * @brief Set the TMR period register value.
  65. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  66. * @param period: specifies the period register new value.
  67. * @retval None
  68. */
  69. AT(.com_periph.tmr.set_period)
  70. void tmr_set_period(tmr_typedef *tmrx, uint32_t period)
  71. {
  72. tmrx->period = period;
  73. }
  74. /**
  75. * @brief Set the TMR prescale register value.
  76. * @param tmrx: where x can be (3) to select the TMR peripheral.
  77. * @param psc: specifies the prescale register new value.
  78. * @retval None
  79. */
  80. void tmr_set_prescale(tmr_typedef *tmrx, uint16_t psc)
  81. {
  82. if (tmrx == TMR3) {
  83. tmrx->psc = (uint16_t)psc;
  84. }
  85. }
  86. /**
  87. * @brief Get the TMR counter register value.
  88. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  89. * @retval specifies the counter register value.
  90. */
  91. uint32_t tmr_get_counter(tmr_typedef *tmrx)
  92. {
  93. return (uint32_t)(tmrx->cnt);
  94. }
  95. /**
  96. * @brief Get the TMR period register value.
  97. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  98. * @retval specifies the period register value.
  99. */
  100. uint32_t tmr_get_period(tmr_typedef *tmrx)
  101. {
  102. return (uint32_t)(tmrx->period);
  103. }
  104. /**
  105. * @brief Get the TMR prescale register value.
  106. * @param tmrx: where x can be (3) to select the TMR peripheral.
  107. * @retval Specifies the prescale register value.
  108. */
  109. uint16_t tmr_get_prescale(tmr_typedef *tmrx)
  110. {
  111. if (tmrx == TMR3) {
  112. return (uint16_t)(tmrx->psc);
  113. }
  114. return 0;
  115. }
  116. /**
  117. * @brief Enable or disable the specified TMR peripheral.
  118. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  119. * @param state: state of the TMRx peripheral.
  120. This parameter can be: ENABLE or DISABLE.
  121. * @retval None
  122. */
  123. AT(.com_periph.tmr.cmd)
  124. void tmr_cmd(tmr_typedef *tmrx, FUNCTIONAL_STATE state)
  125. {
  126. if (tmrx == TMR0 || tmrx == TMR1 || tmrx == TMR2) {
  127. if (state != DISABLE) {
  128. tmrx->con |= TMRxCON_TMREN;
  129. } else {
  130. tmrx->con &= (uint32_t)(~TMRxCON_TMREN);
  131. }
  132. } else if (tmrx == TMR3) {
  133. if (state != DISABLE) {
  134. tmrx->con |= TMR3CON_TMREN;
  135. } else {
  136. tmrx->con &= (uint32_t)(~TMR3CON_TMREN);
  137. }
  138. }
  139. }
  140. /**
  141. * @brief Config pwm duty of specified TMR periperal.
  142. * @param tmrx: where x can be (3) to select the TMR peripheral.
  143. * @param pwm: the pwm channel that wants to config.
  144. * this parameter can be one of the following values:
  145. * @arg TMR_PWM0: pwm0 channel.
  146. * @arg TMR_PWM1: pwm1 channel.
  147. * @arg TMR_PWM2: pwm2 channel.
  148. * @param duty: The high level time of the pwm to be configured.
  149. * @retval
  150. */
  151. void tmr_pwm_duty_config(tmr_typedef *tmrx, TMR_PWM_TYPEDDEF pwm, uint16_t duty)
  152. {
  153. if (tmrx == TMR0 || tmrx == TMR1 || tmrx == TMR2) {
  154. return;
  155. }
  156. if (pwm == TMR_PWM0) {
  157. tmrx->duty0 = duty;
  158. } else if (pwm == TMR_PWM1) {
  159. tmrx->duty1 = duty;
  160. } else if (pwm == TMR_PWM2) {
  161. tmrx->duty2 = duty;
  162. }
  163. }
  164. /**
  165. * @brief Enable or disable the PWM of specified TMR peripheral.
  166. * @param tmrx: where x can be (3) to select the TMR peripheral.
  167. * @param pwm: The pwm channel that wants to config.
  168. * this parameter can be one of the following values:
  169. * @arg TMR_PWM0: pwm0 channel.
  170. * @arg TMR_PWM1: pwm1 channel.
  171. * @arg TMR_PWM2: pwm2 channel.
  172. * @param state: state of the TMRx peripheral.
  173. This parameter can be: ENABLE or DISABLE.
  174. * @retval None
  175. */
  176. void tmr_pwm_cmd(tmr_typedef *tmrx, TMR_PWM_TYPEDDEF pwm, FUNCTIONAL_STATE state)
  177. {
  178. uint32_t pwm_con_mask = TMR3CON_PWM0EN | TMR3CON_PWM1EN | TMR3CON_PWM2EN;
  179. if (tmrx == TMR3) {
  180. if (state != DISABLE) {
  181. tmrx->con |= pwm & pwm_con_mask;
  182. } else {
  183. tmrx->con &= (uint32_t)~(pwm & pwm_con_mask);
  184. }
  185. }
  186. }
  187. /**
  188. * @brief Get the TMR capture register value.
  189. * @param tmrx: where x can be (3) to select the TMR peripheral.
  190. * @retval specifies the capture register value.
  191. */
  192. uint32_t tmr_get_capture(tmr_typedef *tmrx)
  193. {
  194. if (tmrx == TMR0 || tmrx == TMR1 || tmrx == TMR2) {
  195. return ~((uint32_t)0);
  196. }
  197. return (uint32_t)(tmrx->capture_val);
  198. }
  199. /**
  200. * @brief Configure input capture for TMR.
  201. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  202. * @param edge_select: Captured edge selection.
  203. * this parameter can be one of the following values:
  204. * @arg TMR_CAP_NULL: no capture.
  205. * @arg TMR_CAP_RISING: capture rising edge.
  206. * @arg TMR_CAP_FALLING: capture falling edge.
  207. * @arg TMR_CAP_EDGE: capture bilateral edge.
  208. * @retval None
  209. */
  210. void tmr_capture_config(tmr_typedef *tmrx, TMR_CAP_EDGE_TYPEDEF edge_select)
  211. {
  212. if (tmrx == TMR0 || tmrx == TMR1 || tmrx == TMR2) {
  213. return;
  214. }
  215. tmrx->con &= ~((uint32_t)TMR3CON_CPTEDSEL);
  216. tmrx->con |= (uint32_t)edge_select;
  217. }
  218. /**
  219. * @brief Enable or disable the capture function of specified TMR peripheral.
  220. * @param tmrx: where x can be (3) to select the TMR peripheral.
  221. * @param state: state of the TMRx peripheral.
  222. * This parameter can be: ENABLE or DISABLE.
  223. * @retval None
  224. */
  225. void tmr_capture_cmd(tmr_typedef *tmrx, FUNCTIONAL_STATE state)
  226. {
  227. if (tmrx == TMR3) {
  228. if (state != DISABLE) {
  229. tmrx->con |= TMR3CON_CPTEN;
  230. } else {
  231. tmrx->con &= (uint32_t)(~TMR3CON_CPTEN);
  232. }
  233. }
  234. }
  235. /**
  236. * @brief Enable or disable the specified TMRx interrupt.
  237. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  238. * @param isr: Function to be executed for service interruption.
  239. * @param pr: Priority of service interruption.
  240. * @param interrup_type: specifies the TRMx interrupt sources to be enable or disable.
  241. * this parameter can be one of the following values:
  242. * @arg TMR_IT_UPDATE1: TMR(1..2) overflow interrupt enable bit.
  243. * @arg TMR_IT_CAP: TMR(3..5) capture interrupt enable bit.
  244. * @arg TMR_IT_UPDATE2: TMR(3..5) overflow interrupt enable bit.
  245. * @param state: the state of the TMRx peripheral.
  246. * this parameter can be: ENABLE or DISABLE.
  247. * @retval None
  248. */
  249. void tmr_pic_config(tmr_typedef *tmrx, isr_t isr, int pr, TMR_IT_TYPEDEF interrup_type, FUNCTIONAL_STATE state)
  250. {
  251. uint8_t irq_vector;
  252. uint32_t tmr_interrupt_bit = 0;
  253. uint32_t all_interrupt_type_mask = TMR_IT_UPDATE | TMR_IT_CAPTURE;
  254. if (interrup_type == 0) {
  255. return;
  256. }
  257. if (tmrx == TMR0 || tmrx == TMR1 || tmrx == TMR2) {
  258. if (interrup_type & TMR_IT_CAPTURE) {
  259. interrup_type &= ~TMR_IT_CAPTURE;
  260. }
  261. }
  262. /*--- Get interrupt vector ---*/
  263. if (tmrx == TMR0) {
  264. irq_vector = IRQn_TMR0;
  265. }else if (tmrx == TMR1) {
  266. irq_vector = IRQn_TMR1;
  267. } else if (tmrx == TMR2) {
  268. irq_vector = IRQn_TMR2;
  269. } else if (tmrx == TMR3) {
  270. irq_vector = IRQn_TMR3;
  271. } else {
  272. return;
  273. }
  274. /*--- Get interrupt ctrl bit ---*/
  275. if (interrup_type & TMR_IT_UPDATE) {
  276. tmr_interrupt_bit |= TMRxCON_TIE;
  277. }
  278. if (interrup_type & TMR_IT_CAPTURE) {
  279. tmr_interrupt_bit |= TMR3CON_CIE;
  280. }
  281. /*--- Execute configured ---*/
  282. if (state != DISABLE) {
  283. tmrx->con |= tmr_interrupt_bit;
  284. sys_irq_init(irq_vector, pr, isr);
  285. } else {
  286. tmrx->con &= ~tmr_interrupt_bit;
  287. if ((tmrx != TMR3) || (interrup_type == all_interrupt_type_mask)) {
  288. PICENCLR = BIT(irq_vector);
  289. }
  290. }
  291. }
  292. /**
  293. * @brief Get the TMR interrupt pending.
  294. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  295. * @param interrupt_type: specifies the IT to clear.
  296. * this parameter can be one of the following values:
  297. * @arg TMR_IT_UPDATE: TMR overflow interrupt.
  298. * @arg TMR_IT_CAPTURE: TMR capture interrupt.
  299. * @retval The state of interrupt_type (SET or RESET).
  300. */
  301. AT(.com_periph.tmr.get)
  302. FLAG_STATE tmr_get_flag(tmr_typedef *tmrx, TMR_IT_TYPEDEF interrupt_type)
  303. {
  304. uint32_t interrupt_pending_bit = 0;
  305. if (tmrx == TMR0 || tmrx == TMR1 || tmrx == TMR2) {
  306. if (interrupt_type & TMR_IT_CAPTURE) {
  307. return RESET;
  308. } else if (interrupt_type & TMR_IT_UPDATE) {
  309. interrupt_pending_bit |= TMRxCON_TPND;
  310. }
  311. } else if (tmrx == TMR3) {
  312. if (interrupt_type & TMR_IT_CAPTURE) {
  313. interrupt_pending_bit |= TMR3CON_CPND;
  314. }
  315. if (interrupt_type & TMR_IT_UPDATE) {
  316. interrupt_pending_bit |= TMR3CON_TPND;
  317. }
  318. } else {
  319. return RESET;
  320. }
  321. if ((tmrx->con & interrupt_pending_bit) != RESET) {
  322. return SET;
  323. } else {
  324. return RESET;
  325. }
  326. }
  327. /**
  328. * @brief Clear the TMR interrupt pending.
  329. * @param tmrx: where x can be (0..3) to select the TMR peripheral.
  330. * @param interrupt_type: specifies the interrupt to clear.
  331. * this parameter can be one of the following values:
  332. * @arg TMR_IT_UPDATE: TMR overflow interrupt.
  333. * @arg TMR_IT_CAPTURE: TMR capture interrupt.
  334. * @retval None
  335. */
  336. AT(.com_periph.tmr.clear)
  337. void tmr_clear_flag(tmr_typedef *tmrx, TMR_IT_TYPEDEF interrupt_type)
  338. {
  339. uint32_t interrupt_pending_bit = 0;
  340. if (tmrx == TMR0 || tmrx == TMR1 || tmrx == TMR2) {
  341. if (interrupt_type & TMR_IT_UPDATE) {
  342. interrupt_pending_bit |= TMRxCPND_TPCLR;
  343. }
  344. } else if (tmrx == TMR3) {
  345. if (interrupt_type & TMR_IT_CAPTURE) {
  346. interrupt_pending_bit |= TMR3CPND_CPCLR;
  347. } else if (interrupt_type & TMR_IT_UPDATE) {
  348. interrupt_pending_bit |= TMR3CPND_TPCLR;
  349. }
  350. } else {
  351. return;
  352. }
  353. tmrx->cpnd |= interrupt_pending_bit;
  354. }