driver_saradc.c 10 KB

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  1. /*
  2. * @File name : driver_saradc.c
  3. * @Author : Bluetrum IOT Team
  4. * @Date : 2023-02-15
  5. * @Description : This file provides functions to manage the most functionalities
  6. * of the SARADC peripheral.
  7. *
  8. * Copyright (c) by Bluetrum, All Rights Reserved.
  9. */
  10. #include "driver_saradc.h"
  11. /**
  12. * @brief This function is used to resolve bugs in the current version.
  13. * we will delete this function when the bugs are fixed in the future.
  14. * @param channel: the adc channel that need to patch.
  15. * @retval None
  16. */
  17. static void saradc_patch(uint32_t channel)
  18. {
  19. /* Disable auto_analog_io */
  20. SARADC->con &= ~BIT(18);
  21. /* Set GPIO to Analog */
  22. GPIOA_REG->de &= ~((channel & 0x3f) << 2);
  23. GPIOB_REG->de &= ~((channel & 0xc0) >> 6);
  24. GPIOB_REG->de &= ~((channel & 0x0300) >> 5);
  25. GPIOB_REG->de &= ~((channel & 0x0400) >> 2);
  26. }
  27. /**
  28. * @brief Initializes the saradc peripheral according to the specified
  29. * parameters in the saradc_base_init_struct.
  30. * @param saradc_base_init_struct: pointer to a sadc_init_typedef structure that
  31. * contains the configuration information for the specified SARADC peripheral.
  32. * @retval None
  33. */
  34. void saradc_init(saradc_base_init_typedef* saradc_base_init_struct)
  35. {
  36. u16 baud_reg;
  37. u32 saradc_clk;
  38. saradc_clk = clk_saradc_clk_get(CLK_VALUE_MODE_FREQ);
  39. /* Configure Baud Register */
  40. baud_reg = (saradc_clk / (2 * saradc_base_init_struct->baud - 1)) & 0x3ff;
  41. SARADC->baud = baud_reg;
  42. /* Configure SARADC Mode */
  43. SARADC->con &= ~SADCCON_ADCMODE;
  44. SARADC->con |= saradc_base_init_struct->mode & SADCCON_ADCMODE;
  45. /* Configure SARADC auto enable analog enable bit */
  46. SARADC->con &= ~SADCCON_ADCAEN;
  47. SARADC->con |= saradc_base_init_struct->auto_analog & SADCCON_ADCAEN;
  48. /* Configure SARADC auto enable analog IO enable bit */
  49. SARADC->con &= ~SADCCON_ADCANGIOEN;
  50. SARADC->con |= saradc_base_init_struct->auto_analog_io & SADCCON_ADCANGIOEN;
  51. }
  52. /**
  53. * @brief Config saradc specified channel.
  54. * @param saradc_channel_init_struct: the struct including the info of specified channel.
  55. * @retval None
  56. */
  57. void saradc_channel_init(saradc_channel_init_typedef *saradc_channel_init_struct)
  58. {
  59. u8 i = 0;
  60. /* Battery channel config */
  61. if (saradc_channel_init_struct->channel & ADC_CHANNEL_VBAT) {
  62. PWRCON0 |= (uint32_t)(1 << 10); // VBATDIV2 ADC enable
  63. }
  64. /* Bandgap channel config */
  65. if (saradc_channel_init_struct->channel & ADC_CHANNEL_BG) {
  66. PWRCON0 |= (uint32_t)(1 << 22); // BG output ADC enable
  67. }
  68. /* PWRKEY channel config */
  69. if (saradc_channel_init_struct->channel & ADC_CHANNEL_WK0) {
  70. RTCCON1 |= (uint32_t)(1 << 5); // WK0 output ADC enable
  71. if (RTCCON1 & BIT(1)) { // Sure this bit is enable,
  72. RTCCON11 |= BIT(4); // and recommends it is enabled normally.
  73. }
  74. }
  75. /* VDDRTC channel config */
  76. if (saradc_channel_init_struct->channel & ADC_CHANNEL_VRTC) {
  77. RTCCON1 |= (uint32_t)(1 << 7); // VRTC output ADC enable
  78. }
  79. /* VUSB channel config */
  80. if (saradc_channel_init_struct->channel & ADC_CHANNEL_VUSB) {
  81. RTCCON8 |= (uint32_t)(1 << 15); // VUSB output ADC enable
  82. PWRCON2 &= ~(uint32_t)(0x03 << 5); // TSEN disable
  83. AUANGCON0 |= BIT(8); // MICLDO bypass AVDD enable
  84. /* TSEN channel config */
  85. } else if (saradc_channel_init_struct->channel & ADC_CHANNEL_TSEN) {
  86. RTCCON8 &= ~(uint32_t)(1 << 15);
  87. PWRCON2 |= (uint32_t)(0x03 << 5);
  88. saradc_channel_init_struct->channel &= ~ADC_CHANNEL_TSEN;
  89. saradc_channel_init_struct->channel |= ADC_CHANNEL_VUSB;
  90. }
  91. /* Configure each channel */
  92. for (i = 0; i < 16; i++) {
  93. if (saradc_channel_init_struct->channel & (0x01 << i)) {
  94. SARADC->cst &= ~(0x03 << (i * 2));
  95. SARADC->cst |= (saradc_channel_init_struct->setup_time) << (i * 2);
  96. SARADC->con &= ~(0x01 << i);
  97. SARADC->con |= (saradc_channel_init_struct->pullup_en & 0x01) << i;
  98. if (saradc_channel_init_struct->interrupt_en != DISABLE) {
  99. SARADC->ch_int |= (0x01 << i);
  100. } else {
  101. SARADC->ch_int &= ~(0x01 << i);
  102. }
  103. }
  104. }
  105. saradc_patch(saradc_channel_init_struct->channel);
  106. }
  107. /**
  108. * @brief Deinit all channel config.
  109. * @retval the enumeration of channels that has enable.
  110. */
  111. uint8_t saradc_deinit(void)
  112. {
  113. uint8_t saradc_analog_bits = 0;
  114. /* Battery channel config */
  115. if (PWRCON0 & (uint32_t)(1 << 10)) {
  116. PWRCON0 &= ~((uint32_t)(1 << 10));
  117. saradc_analog_bits |= SARADC_ANALOG_BIT_VBAT;
  118. }
  119. /* Bandgap channel config */
  120. if (PWRCON0 & (uint32_t)(1 << 22)) {
  121. PWRCON0 &= ~((uint32_t)(1 << 22));
  122. saradc_analog_bits |= SARADC_ANALOG_BIT_BG;
  123. }
  124. /* PWRKEY channel config */
  125. if (RTCCON1 & (uint32_t)(1 << 5)) {
  126. RTCCON1 &= ~((uint32_t)(1 << 5));
  127. saradc_analog_bits |= SARADC_ANALOG_BIT_WK0;
  128. }
  129. /* VDDRTC channel config */
  130. if (RTCCON1 & (uint32_t)(1 << 7)) {
  131. RTCCON1 &= ~((uint32_t)(1 << 7));
  132. saradc_analog_bits |= SARADC_ANALOG_BIT_VRTC;
  133. }
  134. /* VUSB channel config */
  135. if (RTCCON8 & (uint32_t)(1 << 15)) {
  136. RTCCON8 &= ~((uint32_t)(1 << 15));
  137. saradc_analog_bits |= SARADC_ANALOG_BIT_VUSB;
  138. }
  139. /* TSEN channel config */
  140. if (PWRCON2 & (0x03 << 5)) {
  141. PWRCON2 &= ~(0x03 << 5);
  142. saradc_analog_bits |= ADC_CHANNEL_TSEN;
  143. }
  144. /* Clear saradc register config */
  145. SARADC->con = 0;
  146. SARADC->ch = 0;
  147. /* Disable SARADC clock */
  148. clk_gate0_cmd(CLK_GATE0_SARADC, CLK_DIS);
  149. return saradc_analog_bits;
  150. }
  151. /**
  152. * @brief Enable or disable the specified SARADC peripheral.
  153. * @param state: state of the SARADC peripheral.
  154. This parameter can be: ENABLE or DISABLE.
  155. * @retval None
  156. */
  157. void saradc_cmd(FUNCTIONAL_STATE state)
  158. {
  159. if(state) {
  160. SARADC->con |= SADCCON_ADCEN;
  161. } else {
  162. SARADC->con &= (uint32_t)~SADCCON_ADCEN;
  163. }
  164. }
  165. /**
  166. * @brief SARADC start kick.
  167. * @param adc_ch: the adc channels.
  168. * @retval None
  169. */
  170. AT(.com_periph.saradc.kick)
  171. void saradc_kick_start(uint32_t adc_ch)
  172. {
  173. if (!adc_ch) {
  174. return;
  175. }
  176. if (adc_ch & ADC_CHANNEL_TSEN) {
  177. adc_ch &= ~ADC_CHANNEL_TSEN;
  178. adc_ch |= ADC_CHANNEL_VUSB;
  179. }
  180. while(SARADC->ch & 0xffff);
  181. SARADC->ch = (adc_ch & 0xffff);
  182. }
  183. /**
  184. * @brief Set the SARADC baud register value.
  185. * @param baud: specifies the baud register new value.
  186. * @retval None
  187. */
  188. void saradc_set_baud(uint32_t baud)
  189. {
  190. u16 baud_reg;
  191. u32 saradc_clk;
  192. saradc_clk = clk_saradc_clk_get(CLK_VALUE_MODE_FREQ);
  193. /* Configure Baud Register */
  194. baud_reg = (saradc_clk / (2 * baud - 1)) & 0x3ff;
  195. SARADC->baud = baud_reg;
  196. }
  197. /**
  198. * @brief Enable or disable the specified SARADC interrupt.
  199. * @param isr: Function to be executed for service interruption.
  200. * @param pr: Priority of service interruption.
  201. * @param interrupt_type: specifies the SARADC interrupt sources to be enable or disable.
  202. * this parameter can be one of the following values:
  203. * @arg SARADC_IT_FINISHED: All channel finished flag.
  204. * @param state: state of the SARADC peripheral.
  205. * this parameter can be: EANBLE or DISABLE.
  206. * @retval None
  207. */
  208. void saradc_pic_config(isr_t isr, int pr, SARADC_IT_TYPEDEF interrupt_type, FUNCTIONAL_STATE state)
  209. {
  210. uint32_t interrupt_bit = 0;
  211. /* Get interrupt ctrl bit */
  212. if (interrupt_type & SARADC_IT_FINISHED) {
  213. interrupt_bit |= SADCCON_ADCIE;
  214. }
  215. if(state != DISABLE) {
  216. SARADC->con |= interrupt_bit;
  217. sys_irq_init(IRQn_SARADC, pr, isr);
  218. } else {
  219. SARADC->con &= ~interrupt_bit;
  220. PICEN &= ~BIT(IRQn_SARADC);
  221. }
  222. }
  223. /**
  224. * @brief Get the SARADC interrupt pending.
  225. * @param interrupt_type: specifies the IT to get.
  226. * this parameter can be on of the following values:
  227. * @arg SARADC_IT_FINISHED: SARADC all channel finished interrupt.
  228. * @retval The state of interrupt_type (SET or RESET).
  229. */
  230. AT(.com_periph.saradc.get)
  231. FLAG_STATE saradc_get_flag(SARADC_IT_TYPEDEF interrupt_type)
  232. {
  233. uint32_t flag_bit = 0;
  234. if (interrupt_type & SARADC_IT_FINISHED) {
  235. flag_bit |= (0x01 << 16);
  236. }
  237. if ((SARADC->ch & flag_bit) != RESET) {
  238. return SET;
  239. } else {
  240. return RESET;
  241. }
  242. }
  243. /**
  244. * @brief Get the SARADC specifies channel finished statue.
  245. * @param adc_ch: the channel that wants to query.
  246. * @retval The state of adc_ch finish (SET or RESET).
  247. */
  248. AT(.com_periph.saradc.get_channel)
  249. FLAG_STATE saradc_get_channel_flag(uint32_t adc_ch)
  250. {
  251. if (adc_ch & ADC_CHANNEL_TSEN) {
  252. adc_ch &= ~ADC_CHANNEL_TSEN;
  253. adc_ch |= ADC_CHANNEL_VUSB;
  254. }
  255. if (((SARADC->ch) & adc_ch) != RESET) {
  256. return RESET;
  257. } else {
  258. return SET;
  259. }
  260. }
  261. /**
  262. * @brief Clear the SARADC interrupt pending.
  263. * @param interrupt_type: specifies the IT to clear.
  264. * this parameter can be on of the following values:
  265. * @arg SARADC_IT_FINISHED: SARADC all channel finished interrupt.
  266. * @retval None
  267. */
  268. AT(.com_periph.saradc.clear)
  269. void saradc_clear_flag(SARADC_IT_TYPEDEF interrupt_type)
  270. {
  271. uint32_t flag_bit = 0;
  272. if (interrupt_type & SARADC_IT_FINISHED) {
  273. flag_bit |= (0x01 << 16);
  274. }
  275. SARADC->ch |= flag_bit;
  276. }
  277. /**
  278. * @brief Get the SARADC specifies channel value.
  279. * @param adc_chx: the channel that wants to query.
  280. * @retval saradc data.
  281. */
  282. AT(.com_periph.saradc.get_data)
  283. uint32_t saradc_get_data(uint32_t adc_chx)
  284. {
  285. u8 i = 0;
  286. while (i < 17) {
  287. if (adc_chx & (0x01 << i)) {
  288. break;
  289. }
  290. i++;
  291. }
  292. if ((0x01 << i) == ADC_CHANNEL_VBAT) {
  293. return SARADC->dat[i] * pmu_get_vbatdet() / 1000;
  294. } else if ((0x01 << i) == ADC_CHANNEL_VUSB) {
  295. return SARADC->dat[i] * 3;
  296. } else if ((0x01 << i) == ADC_CHANNEL_TSEN) {
  297. return SARADC->dat[15];
  298. } else if (i < 16) {
  299. return SARADC->dat[i];
  300. } else {
  301. return 0;
  302. }
  303. }