1、增加ST77916驱动，点亮ST77916屏幕，UI按照360*360显示

2、增加SD8563 RTC时钟信息和SGM832A功耗检测信息，使用IIC0和uart2
串口格式：
115200Bps，1bit起始位，8bit数据，1bit停止位，一帧10字节数据
0x5A, 0X54, Second, Minute, Hour, Day, Week, Month, Year, Checksum
Checksum = 0x52 + Second + Minute + Hour + Day + Week + Month + Year

3、打开SOC_WKEN_BAT功能，只给VBAT供电也能正常自启动（关闭后需要长按WIO0才能启动）
4、在sleep mode下，不使用的GPIO PIN设置为高阻态，避免漏电加大休眠状态下的功耗
5、设置不进入休眠
6、开机启动时，设置500ms后再亮背光，触摸唤醒时设置40Ms后再亮背光，避免LCD启动时先显示花屏
7、关闭CONFIG_GPIOKEY、CONFIG_VIBRATOR、CONFIG_KNOB_ENCODER、CONFIG_ACTS_BATTERY_NTC、CONFIG_SENSOR_ALGO_HR_HX3605、breathe、heart_rate、pop health、pop low battery、pop low shutdown、power saving tips、battery manager、CONFIG_ACTS_BATTERY、power部分、CONFIG_PWM、sensor部分功能

application/aem_watch/prj.conf

@@ -296,7 +296,7 @@ CONFIG_OTA_RES_PATCH=n
 CONFIG_SENSOR_MANAGER=y
 CONFIG_SENSOR_ALGO_HR_GH30X=n
 CONFIG_SENSOR_ALGO_HR_VCARE=n
-CONFIG_SENSOR_ALGO_HR_HX3605=y
+CONFIG_SENSOR_ALGO_HR_HX3605=n
 CONFIG_SENSOR_ALGO_HR_HX3690=n
 CONFIG_SENSOR_ALGO_MOTION_CYWEE=y
 CONFIG_SENSOR_ALGO_MOTION_CYWEE_DML=n
@@ -365,7 +365,7 @@ CONFIG_MONKEY_TEST=y
 #CONFIG_MINIMAL_LIBC_MALLOC_ARENA_SIZE=10240
 
 #CONFIG_NSM_APP=y
-CONFIG_CHARGER_APP=y
+#CONFIG_CHARGER_APP=y
 
 #=========== deep sleep ===========
 CONFIG_DEEP_SUSPEND=y

application/aem_watch/resource/CMakeLists.txt

@@ -5,4 +5,4 @@ target_include_directories(app PRIVATE
 	include
 )
 
-add_subdirectory(466x466)
+add_subdirectory(360x360)

application/aem_watch/src/application/breathe/aem_breathe.c

@@ -318,4 +318,4 @@ void aem_breathe_create()
     aem_app_launch(AEM_APP_ID_BREATHE, AEM_APP_BREATHE, on_start, on_resume, on_suspend, on_close, on_ui_refresh, &ops);
 }
 
-AEM_APP_DEFINE(AEM_APP_ID_BREATHE, AEM_DEFAULT_APP, ID_KEY_APP_BREATHE, IMG_SCENE_APPLIST_RES_BREATHE_PIC_ICON, aem_breathe_create);
+//AEM_APP_DEFINE(AEM_APP_ID_BREATHE, AEM_DEFAULT_APP, ID_KEY_APP_BREATHE, IMG_SCENE_APPLIST_RES_BREATHE_PIC_ICON, aem_breathe_create);

application/aem_watch/src/application/health/heart_rate/aem_heart_rate.c

@@ -1202,4 +1202,4 @@ void aem_heart_rate_create()
     aem_app_launch(AEM_APP_ID_HEART_RATE, AEM_APP_HEARTRATE, on_start, on_resume, on_suspend, on_close, on_ui_refresh, &ops);
 }
 
-AEM_APP_DEFINE(AEM_APP_ID_HEART_RATE, AEM_DEFAULT_APP, ID_KEY_APP_HEART_RATE, IMG_SCENE_APPLIST_RES_HEARTRATE_PIC_ICON, aem_heart_rate_create);
+//AEM_APP_DEFINE(AEM_APP_ID_HEART_RATE, AEM_DEFAULT_APP, ID_KEY_APP_HEART_RATE, IMG_SCENE_APPLIST_RES_HEARTRATE_PIC_ICON, aem_heart_rate_create);

application/aem_watch/src/application/pop_window/pop_widget/aem_pop_health.c

@@ -438,4 +438,4 @@ const aem_pop_window_ops_t s_pop_health_ops = {
     .ui_refr_evt = on_ui_refr_evt,
 };
 
-AEM_POP_WINDOW_REGISTER(AEM_POP_ID_HEALTH, &s_pop_health_ops);
+//AEM_POP_WINDOW_REGISTER(AEM_POP_ID_HEALTH, &s_pop_health_ops);

application/aem_watch/src/application/pop_window/pop_widget/aem_pop_low_battery.c

@@ -253,4 +253,4 @@ const aem_pop_window_ops_t s_pop_low_battery_ops = {
     .ui_refr_evt = on_ui_refr_evt,
 };
 
-AEM_POP_WINDOW_REGISTER(AEM_POP_ID_LOW_BATTERY, &s_pop_low_battery_ops);
+//AEM_POP_WINDOW_REGISTER(AEM_POP_ID_LOW_BATTERY, &s_pop_low_battery_ops);

application/aem_watch/src/application/pop_window/pop_widget/aem_pop_low_shutdown.c

@@ -199,4 +199,4 @@ const aem_pop_window_ops_t s_pop_low_shutdown_ops = {
     .key_evt_info = on_key_evt_info,
 };
 
-AEM_POP_WINDOW_REGISTER(AEM_POP_ID_LOW_SHUTDOWN, &s_pop_low_shutdown_ops);
+//AEM_POP_WINDOW_REGISTER(AEM_POP_ID_LOW_SHUTDOWN, &s_pop_low_shutdown_ops);

application/aem_watch/src/application/power_saving_mode/aem_power_saving_tips.c

@@ -148,4 +148,4 @@ int aem_power_save_tips_create(void *user_data)
     return aem_activity_create(ACTIVITY_ID, msg_handler);
 }
 
-AEM_ACTIVITY_DEFINE(AEM_POWER_SAVE_TIPS, aem_power_save_tips_create);
+//AEM_ACTIVITY_DEFINE(AEM_POWER_SAVE_TIPS, aem_power_save_tips_create);

application/aem_watch/src/application/settings/aem_battery_manager.c

@@ -171,4 +171,4 @@ int aem_battery_manager_create(void *user_data)
     return aem_activity_create(ACTIVITY_ID, msg_handler);
 }
 
-AEM_ACTIVITY_DEFINE(AEM_SET_BATTERY_MANAGER, aem_battery_manager_create);
+//AEM_ACTIVITY_DEFINE(AEM_SET_BATTERY_MANAGER, aem_battery_manager_create);

application/app_demo/lvgl_demo/prj.conf

@@ -185,7 +185,7 @@ CONFIG_OTA_BACKEND_BLUETOOTH=y
 CONFIG_SENSOR_MANAGER=y
 CONFIG_SENSOR_ALGO_HR_GH30X=n
 CONFIG_SENSOR_ALGO_HR_VCARE=n
-CONFIG_SENSOR_ALGO_HR_HX3605=y
+CONFIG_SENSOR_ALGO_HR_HX3605=n
 CONFIG_SENSOR_ALGO_HR_HX3690=n
 CONFIG_SENSOR_ALGO_MOTION_CYWEE=y
 CONFIG_SENSOR_ALGO_MOTION_CYWEE_DML=n

application/bt_watch/prj.conf

@@ -266,7 +266,7 @@ CONFIG_OTA_RES_PATCH=n
 CONFIG_SENSOR_MANAGER=y
 CONFIG_SENSOR_ALGO_HR_GH30X=n
 CONFIG_SENSOR_ALGO_HR_VCARE=n
-CONFIG_SENSOR_ALGO_HR_HX3605=y
+CONFIG_SENSOR_ALGO_HR_HX3605=n
 CONFIG_SENSOR_ALGO_HR_HX3690=n
 CONFIG_SENSOR_ALGO_MOTION_CYWEE=y
 CONFIG_SENSOR_ALGO_MOTION_CYWEE_DML=n
@@ -328,7 +328,7 @@ CONFIG_MONKEY_TEST=y
 #CONFIG_MINIMAL_LIBC_MALLOC_ARENA_SIZE=10240
 
 #CONFIG_NSM_APP=y
-CONFIG_CHARGER_APP=y
+#CONFIG_CHARGER_APP=y
 
 #=========== deep sleep ===========
 CONFIG_DEEP_SUSPEND=y

bootloader/boards/arm/ats3085s4_dev_watch_ext_nor/ats3085s4_dev_watch_ext_nor_defconfig

@@ -65,6 +65,10 @@ CONFIG_UART_ACTS_PORT_0=y
 CONFIG_UART_ACTS_PORT_0_NAME="UART_0"
 CONFIG_UART_ACTS_PORT_0_BAUD_RATE=115200
 CONFIG_UART_ACTS_PORT_0_PRIORITY=0
+CONFIG_UART_ACTS_PORT_2=y
+CONFIG_UART_ACTS_PORT_2_NAME="UART_2"
+CONFIG_UART_ACTS_PORT_2_BAUD_RATE=115200
+CONFIG_UART_ACTS_PORT_2_PRIORITY=0
 
 # I2C
 CONFIG_I2C=y
@@ -191,6 +195,8 @@ CONFIG_INPUT_DEV_ACTS_ONOFF_KEY=y
 CONFIG_INPUT_DEV_ACTS_TP_KEY=y
 CONFIG_INPUT_DEV_ACTS_CST816S_TP_KEY=y
 CONFIG_INPUT_DEV_ACTS_GPIOKEY=y
+CONFIG_INPUT_DEV_ACTS_SD8563_TIMER=y
+CONFIG_INPUT_DEV_ACTS_SGM832A=y
 
 #mpu
 CONFIG_MPU_ACTS=n
@@ -201,8 +207,8 @@ CONFIG_MPU_MONITOR_USER_DATA=y
 CONFIG_MPU_MONITOR_ROMFUNC_WRITE=y
 
 #PWM
-CONFIG_PWM=y
-CONFIG_PWM_ACTS=y
+CONFIG_PWM=n
+CONFIG_PWM_ACTS=n
 
 #libc
 CONFIG_LIBC_STRING_BROM=y

bootloader/boards/arm/ats3085s4_dev_watch_ext_nor/board.c

@@ -46,6 +46,14 @@ static const struct acts_pin_config board_pin_config[] = {
     PIN_MFP_SET(GPIO_17,  UART1_MFP_CFG),
 #endif
 
+    /*UART2 */
+#if IS_ENABLED(CONFIG_UART_2)
+    /* uart2 tx */
+    PIN_MFP_SET(GPIO_26,  UART2_MFP_CFG),
+    /* uart2 rx */
+    PIN_MFP_SET(GPIO_27,  UART2_MFP_CFG),
+#endif
+
 #if IS_ENABLED(CONFIG_SPI_FLASH_0)
     /* SPI0 CS */
     PIN_MFP_SET(GPIO_0,   SPINOR_MFP_CFG),
@@ -67,9 +75,9 @@ static const struct acts_pin_config board_pin_config[] = {
 
 #if IS_ENABLED(CONFIG_I2CMT_0)
     /* I2C CLK*/
-    PIN_MFP_SET(GPIO_18, I2CMT_MFP_CFG(MFP0_I2CMT)),
+    PIN_MFP_SET(GPIO_53, I2CMT_MFP_CFG(MFP0_I2CMT)),
     /* I2C DATA*/
-    PIN_MFP_SET(GPIO_19, I2CMT_MFP_CFG(MFP0_I2CMT)),
+    PIN_MFP_SET(GPIO_54, I2CMT_MFP_CFG(MFP0_I2CMT)),
 #endif
 
 #if IS_ENABLED(CONFIG_I2CMT_1)
@@ -81,9 +89,9 @@ static const struct acts_pin_config board_pin_config[] = {
 
 #if IS_ENABLED(CONFIG_I2C_0)
     /* I2C CLK*/
-    PIN_MFP_SET(GPIO_57, I2C_MFP_CFG(MFP0_I2C)),
+    PIN_MFP_SET(GPIO_74, I2C_MFP_CFG(MFP0_I2C)),
     /* I2C DATA*/
-    PIN_MFP_SET(GPIO_58, I2C_MFP_CFG(MFP0_I2C)),
+    PIN_MFP_SET(GPIO_22, I2C_MFP_CFG(MFP0_I2C)),
 #endif
 
 #if IS_ENABLED(CONFIG_I2C_1)
@@ -102,9 +110,9 @@ static const struct acts_pin_config board_pin_config[] = {
 
 #if IS_ENABLED(CONFIG_I2C_3)
     /* I2C CLK*/
-    PIN_MFP_SET(GPIO_60, I2C_MFP_CFG(MFP3_I2C)),
+    PIN_MFP_SET(GPIO_24, I2C_MFP_CFG(MFP3_I2C)),
     /* I2C DATA*/
-    PIN_MFP_SET(GPIO_59, I2C_MFP_CFG(MFP3_I2C)),
+    PIN_MFP_SET(GPIO_25, I2C_MFP_CFG(MFP3_I2C)),
 #endif
 
 #if IS_ENABLED(CONFIG_CEC)
@@ -336,6 +344,15 @@ void uart_poll_out_ch(int c)
     /* send a character */
     uart->txdat = (uint32_t)c;
 
+}
+void uart2_poll_out_ch(int c)
+{
+    struct acts_uart_reg *uart = (struct acts_uart_reg*)UART2_REG_BASE;
+    /* Wait for transmitter to be ready */
+    while (uart->stat &  BIT(6));
+    /* send a character */
+    uart->txdat = (uint32_t)c;
+
 }
 /*for early printk*/
 int arch_printk_char_out(int c)

bootloader/boards/arm/ats3085s4_dev_watch_ext_nor/board.h

@@ -17,22 +17,32 @@
 	GPION_CTL(5), /*lcd backlight enable*/			\
 	/*sensor*/ \
 	/*//GPION_CTL(18), not use defaut highz*/ 		\
-	GPION_CTL(19), /*EN_NTC. user in sleep*/ 		\
+	GPION_CTL(19), /*SD8563 INT, not user in sleep*/ 		\
 	/*//GPION_CTL(20), not use defaut highz*/ 		\
-	GPION_CTL(21), /*sensor irq ,use in sleep*/ 	\
-	GPION_CTL(25), /*VDD1.8 eanble ,use in sleep*/	\
-	GPION_CTL(33), /*GPS wake up Host ,use in sleep*/	\
+	GPION_CTL(24), /*SCL, not use in sleep*/	\
+	GPION_CTL(25), /*SDA, not use in sleep*/	\
 	/*TP*/ \
 	/*//GPION_CTL(26), not use defaut highz*/ 		\
 	/* //GPION_CTL(27), not use，defaut highz*/ 		\
-	GPION_CTL(32), /*tp irq*/				\
+	GPION_CTL(32), /*LCD reset*/				\
 	/*i2c0*/  \
-	GPION_CTL(57), /*not use in sleep*/  \
-	GPION_CTL(58), /*not use in sleep*/  \
+	GPION_CTL(74), /*SCL, not use in sleep*/  \
+	GPION_CTL(22), /*SDA, not use in sleep*/  \
 	/*i2c1*/  \
-	GPION_CTL(59), /*not use in sleep*/  \
-	GPION_CTL(60), /*not use in sleep*/	 \
-
+	GPION_CTL(51), /*SCL, not use in sleep*/  \
+	GPION_CTL(52), /*SDA, not use in sleep*/	 \
+    GPION_CTL(49), /*RST, not use in sleep*/	 \
+	/*LCD*/  \
+	GPION_CTL(21), /*LCD_D7, not use in sleep*/ 	\
+	GPION_CTL(33), /*LCD_RD#, not use in sleep*/	\
+	GPION_CTL(14), /*LCD_D0, not use in sleep*/ 	\
+	GPION_CTL(15), /*LCD_D1, not use in sleep*/ 	\
+	GPION_CTL(16), /*LCD_D2, not use in sleep*/ 	\
+	GPION_CTL(17), /*LCD_D3, not use in sleep*/ 	\
+	GPION_CTL(30), /*LCD_CE, not use in sleep*/ 	\
+	GPION_CTL(32), /*LCD_RESET, not use in sleep*/ 	\
+	GPION_CTL(34), /*LCD_CLK, not use in sleep*/ 	\
+	GPION_CTL(35), /*LCD_TE, not use in sleep*/ 	\
 
 #define CONFIG_SD_USE_GPIO_DET      0
 #define CONFIG_SD_GPIO_DET_NUM      64    /*GPIO64*/

bootloader/boards/arm/ats3085s4_dev_watch_ext_nor/board_cfg.h

@@ -51,7 +51,7 @@
 #define CONFIG_UART_0_NAME      			"UART_0"
 #define CONFIG_UART_1           				0
 #define CONFIG_UART_1_NAME      			"UART_1"
-#define CONFIG_UART_2           				0
+#define CONFIG_UART_2           				1
 #define CONFIG_UART_2_NAME      			"UART_2"
 #define CONFIG_UART_3           				0
 #define CONFIG_UART_3_NAME      			"UART_3"
@@ -61,7 +61,7 @@
 #define CONFIG_PWM          					1
 #define CONFIG_PWM_NAME      				"PWM"
 
-#define CONFIG_I2C_0           					0
+#define CONFIG_I2C_0           					1
 #define CONFIG_I2C_0_NAME      				"I2C_0"
 #define CONFIG_I2C_1           					1
 #define CONFIG_I2C_1_NAME      				"I2C_1"
@@ -109,7 +109,7 @@
 #define CONFIG_ADCKEY                           0
 #define CONFIG_INPUT_DEV_ACTS_ADCKEY_NAME   "keyadc"
 
-#define CONFIG_GPIOKEY                          1
+#define CONFIG_GPIOKEY                          0
 #define CONFIG_INPUT_DEV_ACTS_GPIOKEY_NAME  "keygpio"
 
 #define CONFIG_ONOFFKEY                         1
@@ -118,9 +118,15 @@
 #define CONFIG_TPKEY							1
 #define CONFIG_TPKEY_DEV_NAME				 "tpkey"
 
-#define CONFIG_ACTS_BATTERY						1
+#define CONFIG_ACTS_BATTERY						0
 #define CONFIG_ACTS_BATTERY_DEV_NAME         "batadc"
 
+#define CONFIG_SD8563							1
+#define CONFIG_SD8563_DEV_NAME				 "sd8563"
+
+#define CONFIG_SGM832A							1
+#define CONFIG_SGM832A_DEV_NAME				 "sgm832a"
+
 #define CONFIG_CEC				 				0
 #define CONFIG_ACTS_BATTERY_NTC 				0
 
@@ -226,6 +232,8 @@
 
 #define CONFIG_UART_1_IRQ_PRI   				0
 
+#define CONFIG_UART_2_IRQ_PRI   				0
+
 #define CONFIG_MMC_0_IRQ_PRI        			0
 
 #define CONFIG_MMC_1_IRQ_PRI        			0
@@ -337,6 +345,7 @@ uart board cfg
 */
 #define CONFIG_UART_0_SPEED     2000000
 #define CONFIG_UART_1_SPEED     115200
+#define CONFIG_UART_2_SPEED     115200
 
 /*
 pwm board cfg
@@ -348,7 +357,7 @@ pwm board cfg
 I2C board cfg
 */
 #define CONFIG_I2C_0_CLK_FREQ  100000
-#define CONFIG_I2C_0_MAX_ASYNC_ITEMS 10
+#define CONFIG_I2C_0_MAX_ASYNC_ITEMS 3//10
 
 #define CONFIG_I2C_1_CLK_FREQ  100000
 #define CONFIG_I2C_1_MAX_ASYNC_ITEMS 3
@@ -814,6 +823,15 @@ audio board cfg
 #define CONFIG_TPKEY_I2C_NAME		CONFIG_I2C_1_NAME
 #define CONFIG_TPKEY_LOWPOWER		(1)
 
+/*
+ * sd8563 cfg
+ */
+#define CONFIG_SD8563_I2C_NAME		CONFIG_I2C_0_NAME
+
+/*
+ * sgm832a cfg
+ */
+#define CONFIG_SGM832A_I2C_NAME		CONFIG_I2C_0_NAME  
 
 /*
 PMU cfg

bootloader/drivers/display/panel/panel_device.h

@@ -182,6 +182,7 @@ extern const struct lcd_panel_config lcd_panel_icna3311_config;
 extern const struct lcd_panel_config lcd_panel_rm690b0_config;
 extern const struct lcd_panel_config lcd_panel_rm69090_config;
 extern const struct lcd_panel_config lcd_panel_sh8601z0_config;
+extern const struct lcd_panel_config lcd_panel_st77916_config;
 
 /* TR panels */
 extern const struct lcd_panel_config lcd_panel_lpm015m135a_config;

bootloader/drivers/input/CMakeLists.txt

@@ -9,5 +9,7 @@ zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_QUAD_DECODER quad_decoder_act
 zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_IR_CAPTURE capture_protocol.c)
 zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_IR_CAPTURE capture_controller.c)
 zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_IR_CAPTURE capture_data.c)
+zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_SD8563_TIMER sd8563_timer_acts.c)
+zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_SGM832A sgm832a_acts.c)
 
 add_subdirectory_ifdef(CONFIG_INPUT_DEV_ACTS_TP_KEY tpkey)

bootloader/drivers/input/Kconfig

@@ -101,4 +101,19 @@ config INPUT_DEV_ACTS_IR_CAPTURE
 	default n
 	help
 	  Enable support for Actions SoC IR capture driver.
+
+config INPUT_DEV_ACTS_SD8563_TIMER
+    bool "Actions SoC Timer driver"
+	depends on SOC_FAMILY_ACTS
+    default n
+    help
+      Enable support for Actions SoC timer driver.
+
+config INPUT_DEV_ACTS_SGM832A
+	bool "Actions SoC Sgm832a driver"
+	depends on SOC_FAMILY_ACTS
+	default n
+	help
+	  Enable support for Actions SoC sgm832a driver.	  
+	  
 endif # INPUT_DEV

bootloader/include/drivers/cfg_drv/pinctrl_lark.h

@@ -43,8 +43,8 @@
 #define I2C_MFP_CFG(x)	(GPIO_CTL_MFP(x)|GPIO_CTL_PULLUP|GPIO_CTL_PADDRV_LEVEL(3))
 
 
-#define gpio22_i2c0_clk_node	PIN_MFP_SET(22, I2C_MFP_CFG(MFP0_I2C))
-#define gpio23_i2c0_data_node	PIN_MFP_SET(23, I2C_MFP_CFG(MFP0_I2C))
+#define gpio74_i2c0_clk_node	PIN_MFP_SET(74, I2C_MFP_CFG(MFP0_I2C))
+#define gpio22_i2c0_data_node	PIN_MFP_SET(22, I2C_MFP_CFG(MFP0_I2C))
 
 #define gpio24_i2c0_clk_node	PIN_MFP_SET(24, I2C_MFP_CFG(MFP0_I2C))
 #define gpio25_i2c0_data_node	PIN_MFP_SET(25, I2C_MFP_CFG(MFP0_I2C))
@@ -251,6 +251,8 @@
 #define UART2_MFP_CFG (GPIO_CTL_MFP(UART2_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PULLUP_STRONG | GPIO_CTL_PADDRV_LEVEL(4))
 #define gpio20_uart2_tx_node		PIN_MFP_SET(20, UART2_MFP_CFG)
 #define gpio21_uart2_rx_node		PIN_MFP_SET(21, UART2_MFP_CFG)
+#define gpio26_uart2_tx_node		PIN_MFP_SET(26, UART2_MFP_CFG)
+#define gpio27_uart2_rx_node		PIN_MFP_SET(27, UART2_MFP_CFG)
 
 
 /* SPDIFTX */

bootloader/include/drivers/cfg_drv/pinctrl_leopard.h

@@ -47,8 +47,8 @@
 #define I2C_MFP_CFG(x)	(GPIO_CTL_MFP(x)|GPIO_CTL_PULLUP_4K7|GPIO_CTL_PADDRV_LEVEL(3))
 
 
-#define gpio22_i2c0_clk_node	PIN_MFP_SET(22, I2C_MFP_CFG(MFP0_I2C))
-#define gpio23_i2c0_data_node	PIN_MFP_SET(23, I2C_MFP_CFG(MFP0_I2C))
+#define gpio74_i2c0_clk_node	PIN_MFP_SET(74, I2C_MFP_CFG(MFP0_I2C))
+#define gpio22_i2c0_data_node	PIN_MFP_SET(22, I2C_MFP_CFG(MFP0_I2C))
 
 #define gpio24_i2c0_clk_node	PIN_MFP_SET(24, I2C_MFP_CFG(MFP0_I2C))
 #define gpio25_i2c0_data_node	PIN_MFP_SET(25, I2C_MFP_CFG(MFP0_I2C))
@@ -255,6 +255,8 @@
 #define UART2_MFP_CFG (GPIO_CTL_MFP(UART2_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PULLUP_STRONG | GPIO_CTL_PADDRV_LEVEL(4))
 #define gpio53_uart2_tx_node		PIN_MFP_SET(53, UART2_MFP_CFG)
 #define gpio54_uart2_rx_node		PIN_MFP_SET(54, UART2_MFP_CFG)
+#define gpio26_uart2_tx_node		PIN_MFP_SET(26, UART2_MFP_CFG)
+#define gpio27_uart2_rx_node		PIN_MFP_SET(27, UART2_MFP_CFG)
 
 
 /* SPDIFTX */

framework/bluetooth/bt_manager/bt_manager_check_mac_name.c

@@ -105,7 +105,7 @@ uint32_t hardware_randomizer_gen_rand(void)
 	return trng_low;
 }
 #endif
-
+#if 0
 static void bt_manager_bt_name(uint8_t *mac_str)
 {
 #ifdef CONFIG_PROPERTY
@@ -141,6 +141,7 @@ try_ble_name:
 	}
 #endif
 }
+#endif
 
 
 static void bt_manager_bt_mac(uint8_t *mac_str)
@@ -183,10 +184,17 @@ void bt_manager_check_mac_name(void)
 {
 	uint8_t mac_str[MAC_STR_LEN];
 	uint32_t seed = 0, i;
+	char bt_name[BT_NAME_LEN] = "WINGCOOL_";
 
 	memset(mac_str, 0, MAC_STR_LEN);
-	bt_manager_bt_mac(mac_str);
-	bt_manager_bt_name(mac_str);
+	bt_manager_bt_mac(mac_str);  //get mac address
+
+	memcpy(&bt_name[9], mac_str, strlen(mac_str));  //bt_name + mac address
+
+	property_set_factory(CFG_BT_NAME, bt_name, 9 + strlen(mac_str));  //set to nvram
+	property_set_factory(CFG_BLE_NAME, bt_name, 9 + strlen(mac_str));  //set to nvram
+
+	//bt_manager_bt_name(mac_str);
 
 	for (i=0; i<MAC_STR_LEN; i++) {
 		seed = seed*131 + mac_str[i];

framework/system/sys_standby.c

@@ -105,9 +105,9 @@ static os_sem wakeup_sem;
 
 static int _sys_standby_check_auto_powerdown(void)
 {
-	int ret = 0;
+	int ret = 1;
 
-	return ret;
+	return ret;  //返回1不进入休眠，返回0进入休眠
 }
 
 static int _sys_standby_enter_s1(void)

thirdparty/lib/aem/adapter/def_settings/aem_adapter_def_settings.c

@@ -26,22 +26,22 @@ const static aem_language_table_t s_aem_language_table[] =
 #ifdef CONFIG_BOARD_ATS3085S4_DEV_WATCH_EXT_NOR
 // 预置表盘，文件不可删除，默认表盘为此数组第一个表盘
 const static uint32_t s_inside_wf[] = {
-    10,
+    80,
 };
 // 预置表盘，文件可删除
 const static uint32_t s_outside_wf[] = {
-    3,
-    4,
-    11,
+    79,
 };
 #else
 // 预置表盘，文件不可删除，默认表盘为此数组第一个表盘
 const static uint32_t s_inside_wf[] = {
-    80,
+    10,
 };
 // 预置表盘，文件可删除
 const static uint32_t s_outside_wf[] = {
-    79,
+    3,
+    4,
+    11,
 };
 #endif
 

thirdparty/lib/aem/adapter/lv_port/aem_lv_display.c

@@ -15,7 +15,7 @@
 #include "aem_log.h"
 
 #define AEM_DEBUG_FPS 1
-#define AEM_466_ROUND_CLIP 1
+#define AEM_466_ROUND_CLIP 0
 
 /**********************
  *      TYPEDEFS

thirdparty/lib/aem/adapter/peripheral/aem_adapter_dev.c

@@ -149,7 +149,7 @@ static uint8_t get_charge_status(void)
 #endif
     return status;
 }
-
+extern uint8_t read_time_data[7];
 static uint8_t get_rtc_time(aem_time_t *time)
 {
     uint8_t ret = AEM_OK;
@@ -165,15 +165,23 @@ static uint8_t get_rtc_time(aem_time_t *time)
 
     if (rtc)
     {
-        rtc_get_time(rtc, &rtc_time);
-        time->year = rtc_time.tm_year + 1900;
-        time->month = rtc_time.tm_mon + 1;
-        time->day = rtc_time.tm_mday;
-        time->wday = rtc_time.tm_wday;
-        time->hour = rtc_time.tm_hour;
-        time->min = rtc_time.tm_min;
-        time->second = rtc_time.tm_sec;
-        time->ms = rtc_time.tm_ms;
+        //rtc_get_time(rtc, &rtc_time);
+        //time->year = rtc_time.tm_year + 1900;
+        //time->month = rtc_time.tm_mon + 1;
+        //time->day = rtc_time.tm_mday;
+        //time->wday = rtc_time.tm_wday;
+        //time->hour = rtc_time.tm_hour;
+        //time->min = rtc_time.tm_min;
+        //time->second = rtc_time.tm_sec;
+        //time->ms = rtc_time.tm_ms;
+
+        time->year = read_time_data[6] + 2000;
+	    time->month = read_time_data[5];
+        time->wday = read_time_data[4];
+        time->day = read_time_data[3];
+        time->hour = read_time_data[2];
+        time->min = read_time_data[1];
+        time->second = read_time_data[0];
     }
 #elif defined(CONFIG_SIMULATOR)
     SYSTEMTIME lt;

zephyr/boards/arm/ats3085s4_dev_watch_ext_nor/Kconfig.defconfig

@@ -14,7 +14,7 @@ config SPIMT_LEOPARD
 
 if DISPLAY
 
-config PANEL_ICNA3310B
+config PANEL_ST77916
     default y
 
 endif # DISPLAY

zephyr/boards/arm/ats3085s4_dev_watch_ext_nor/ats3085s4_dev_watch_ext_nor_defconfig

@@ -11,7 +11,7 @@ CONFIG_SOC_SERIES_LEOPARD=y
 CONFIG_SOC_LEOPARD=y
 CONFIG_IRQ_VECTOR_IN_SRAM=y
 CONFIG_SLEEP_FUNC_IN_SRAM=y
-CONFIG_SOC_WKEN_BAT=n
+CONFIG_SOC_WKEN_BAT=y  #VBAT power supply can work
 
 # Enable MPU
 #CONFIG_ARM_MPU=y
@@ -72,6 +72,10 @@ CONFIG_UART_ACTS_PORT_0=y
 CONFIG_UART_ACTS_PORT_0_NAME="UART_0"
 CONFIG_UART_ACTS_PORT_0_BAUD_RATE=115200
 CONFIG_UART_ACTS_PORT_0_PRIORITY=0
+CONFIG_UART_ACTS_PORT_2=y
+CONFIG_UART_ACTS_PORT_2_NAME="UART_2"
+CONFIG_UART_ACTS_PORT_2_BAUD_RATE=115200
+CONFIG_UART_ACTS_PORT_2_PRIORITY=0
 
 # I2C
 CONFIG_I2C=y
@@ -202,13 +206,13 @@ CONFIG_BOARD_EXTERNAL_PA_ENABLE=y
 CONFIG_AUDIO_ANTIPOP_PROCESS=n
 
 #power
-CONFIG_POWER_SUPPLY=y
-CONFIG_POWER_SUPPLY_ACTS_BATTERY=y
-CONFIG_ACTS_LEOPARD_BATTERY_SUPPLY_INTERNAL=y
+CONFIG_POWER_SUPPLY=n
+CONFIG_POWER_SUPPLY_ACTS_BATTERY=n
+CONFIG_ACTS_LEOPARD_BATTERY_SUPPLY_INTERNAL=n
 CONFIG_ACTS_LEOPARD_BATTERY_SUPPLY_EXTERNAL=n
 CONFIG_ACTS_BATTERY_SUPPLY_EXT_COULOMETER=n
-CONFIG_ACTS_BATTERY_SUPPORT_CHARGER_NTC=y
-CONFIG_ACTS_BATTERY_SUPPORT_MINI_CHARGER_NTC=y
+CONFIG_ACTS_BATTERY_SUPPORT_CHARGER_NTC=n
+CONFIG_ACTS_BATTERY_SUPPORT_MINI_CHARGER_NTC=n
 CONFIG_ACTS_BATTERY_SUPPORT_FAST_CHARGER=n
 CONFIG_ACTS_BATTERY_WAKEUP_PERIOD_MINUTE=10
 CONFIG_SYS_POWER_MANAGEMENT=y
@@ -231,8 +235,10 @@ CONFIG_INPUT_DEV=y
 CONFIG_INPUT_DEV_ACTS_ONOFF_KEY=y
 CONFIG_INPUT_DEV_ACTS_TP_KEY=y
 CONFIG_INPUT_DEV_ACTS_CST820_TP_KEY=y
-CONFIG_INPUT_DEV_ACTS_GPIOKEY=y
+CONFIG_INPUT_DEV_ACTS_GPIOKEY=n
 CONFIG_INPUT_DEV_ACTS_KNOB=n
+CONFIG_INPUT_DEV_ACTS_SD8563_TIMER=y
+CONFIG_INPUT_DEV_ACTS_SGM832A=y
 
 #RTC
 CONFIG_RTC_ACTS=y
@@ -250,12 +256,12 @@ CONFIG_MPU_MONITOR_ROMFUNC_WRITE=y
 CONFIG_ACTIONS_ARM_MPU=y
 
 #PWM
-CONFIG_PWM=y
-CONFIG_PWM_ACTS=y
+CONFIG_PWM=n
+CONFIG_PWM_ACTS=n
 
 #VIBRATOR
-CONFIG_VIBRATOR=y
-CONFIG_VIBRATOR_ACTS=y
+#CONFIG_VIBRATOR=y
+#CONFIG_VIBRATOR_ACTS=y
 
 #libc
 CONFIG_LIBC_STRING_BROM=y
@@ -271,14 +277,14 @@ CONFIG_JPEG_HW=y
 CONFIG_JPEG_HAL=y
 
 #sensor
-CONFIG_SENSOR_HAL=y
+CONFIG_SENSOR_HAL=n
 CONFIG_SENSOR_ACC_LIS2DW12=n
-CONFIG_SENSOR_ACC_STK8321=y
+CONFIG_SENSOR_ACC_STK8321=n
 CONFIG_SENSOR_ACC_SC7A20=n
-CONFIG_SENSOR_ACC_QMA6100=y
+CONFIG_SENSOR_ACC_QMA6100=n
 CONFIG_SENSOR_HR_GH3011=n
 CONFIG_SENSOR_HR_VC9201=n
-CONFIG_SENSOR_HR_HX3605=y
+CONFIG_SENSOR_HR_HX3605=n
 CONFIG_SENSOR_HR_HX3690=n
 CONFIG_SENSOR_MAG_MMC5603NJ=n
 CONFIG_SENSOR_BARO_ICP10125=n

zephyr/boards/arm/ats3085s4_dev_watch_ext_nor/board.c

@@ -35,6 +35,14 @@ static const struct acts_pin_config board_pin_config[] = {
     PIN_MFP_SET(GPIO_17,  UART1_MFP_CFG),
 #endif
 
+    /*UART2 */
+#if IS_ENABLED(CONFIG_UART_2)
+    /* uart2 tx */
+    PIN_MFP_SET(GPIO_26,  UART2_MFP_CFG),
+    /* uart2 rx */
+    PIN_MFP_SET(GPIO_27,  UART2_MFP_CFG),
+#endif
+
 #if IS_ENABLED(CONFIG_SPI_FLASH_0)
     /* SPI0 CS */
     PIN_MFP_SET(GPIO_0,   SPINOR_MFP_CFG),
@@ -52,9 +60,9 @@ static const struct acts_pin_config board_pin_config[] = {
 
 #if IS_ENABLED(CONFIG_I2CMT_0)
     /* I2C CLK*/
-    PIN_MFP_SET(GPIO_18, I2CMT_MFP_CFG(MFP0_I2CMT)),
+    PIN_MFP_SET(GPIO_53, I2CMT_MFP_CFG(MFP0_I2CMT)),
     /* I2C DATA*/
-    PIN_MFP_SET(GPIO_19, I2CMT_MFP_CFG(MFP0_I2CMT)),
+    PIN_MFP_SET(GPIO_54, I2CMT_MFP_CFG(MFP0_I2CMT)),
 #endif
 
 #if IS_ENABLED(CONFIG_I2CMT_1)
@@ -66,9 +74,9 @@ static const struct acts_pin_config board_pin_config[] = {
 
 #if IS_ENABLED(CONFIG_I2C_0)
     /* I2C CLK*/
-    PIN_MFP_SET(GPIO_57, I2C_MFP_CFG(MFP0_I2C)),
+    PIN_MFP_SET(GPIO_74, I2C_MFP_CFG(MFP0_I2C)),
     /* I2C DATA*/
-    PIN_MFP_SET(GPIO_58, I2C_MFP_CFG(MFP0_I2C)),
+    PIN_MFP_SET(GPIO_22, I2C_MFP_CFG(MFP0_I2C)),
 #endif
 
 #if IS_ENABLED(CONFIG_I2C_1)
@@ -87,9 +95,9 @@ static const struct acts_pin_config board_pin_config[] = {
 
 #if IS_ENABLED(CONFIG_I2C_3)
     /* I2C CLK*/
-    PIN_MFP_SET(GPIO_60, I2C_MFP_CFG(MFP3_I2C)),
+    PIN_MFP_SET(GPIO_24, I2C_MFP_CFG(MFP3_I2C)),
     /* I2C DATA*/
-    PIN_MFP_SET(GPIO_59, I2C_MFP_CFG(MFP3_I2C)),
+    PIN_MFP_SET(GPIO_25, I2C_MFP_CFG(MFP3_I2C)),
 #endif
 
 
@@ -339,6 +347,15 @@ void uart_poll_out_ch(int c)
     /* send a character */
     uart->txdat = (uint32_t)c;
 
+}
+void uart2_poll_out_ch(int c)
+{
+    struct acts_uart_reg *uart = (struct acts_uart_reg*)UART2_REG_BASE;
+    /* Wait for transmitter to be ready */
+    while (uart->stat &  BIT(6));
+    /* send a character */
+    uart->txdat = (uint32_t)c;
+
 }
 /*for early printk*/
 int arch_printk_char_out(int c)

zephyr/boards/arm/ats3085s4_dev_watch_ext_nor/board.h

@@ -14,22 +14,35 @@
 
 /*Configure GPIO high resistance before sleep and restore GPIO after wakeup */
 #define SLEEP_GPIO_REG_SET_HIGHZ      				\
+	GPION_CTL(5), /*lcd backlight enable*/			\
 	/*sensor*/ \
-	/*//GPION_CTL(18), not use defaut highz*/		\
-	/*//GPION_CTL(20), not use defaut highz*/		\
-	GPION_CTL(25), /*audio PA1_EN */	\
-	GPION_CTL(26), /*TP_PWR */	\
+	/*//GPION_CTL(18), not use defaut highz*/ 		\
+	GPION_CTL(19), /*SD8563 INT, not user in sleep*/ 		\
+	/*//GPION_CTL(20), not use defaut highz*/ 		\
+	GPION_CTL(24), /*SCL, not use in sleep*/	\
+	GPION_CTL(25), /*SDA, not use in sleep*/	\
 	/*TP*/ \
-	/*//GPION_CTL(26), not use defaut highz*/		\
-	/* //GPION_CTL(27), not use，defaut highz*/		\
-	GPION_CTL(49), /*tp rst*/				\
-	GPION_CTL(50), /*tp irq*/				\
-	/*i2c0 charger */  \
-	GPION_CTL(57), /*not use in sleep*/  \
-	GPION_CTL(58), /*not use in sleep*/  \
-	/*i2c3 audio PA/LCD I2c/Electricity meter*/  \
-	GPION_CTL(51), /*not use in sleep*/  \
-	GPION_CTL(52), /*not use in sleep*/  \
+	/*//GPION_CTL(26), not use defaut highz*/ 		\
+	/* //GPION_CTL(27), not use，defaut highz*/ 		\
+	GPION_CTL(32), /*LCD reset*/				\
+	/*i2c0*/  \
+	GPION_CTL(74), /*SCL, not use in sleep*/  \
+	GPION_CTL(22), /*SDA, not use in sleep*/  \
+	/*i2c1*/  \
+	GPION_CTL(51), /*SCL, not use in sleep*/  \
+	GPION_CTL(52), /*SDA, not use in sleep*/	 \
+    GPION_CTL(49), /*RST, not use in sleep*/	 \
+	/*LCD*/  \
+	GPION_CTL(21), /*LCD_D7, not use in sleep*/ 	\
+	GPION_CTL(33), /*LCD_RD#, not use in sleep*/	\
+	GPION_CTL(14), /*LCD_D0, not use in sleep*/ 	\
+	GPION_CTL(15), /*LCD_D1, not use in sleep*/ 	\
+	GPION_CTL(16), /*LCD_D2, not use in sleep*/ 	\
+	GPION_CTL(17), /*LCD_D3, not use in sleep*/ 	\
+	GPION_CTL(30), /*LCD_CE, not use in sleep*/ 	\
+	GPION_CTL(32), /*LCD_RESET, not use in sleep*/ 	\
+	GPION_CTL(34), /*LCD_CLK, not use in sleep*/ 	\
+	GPION_CTL(35), /*LCD_TE, not use in sleep*/ 	\
 
 #if IS_ENABLED(CONFIG_KNOB_ENCODER)
 #define SLEEP_KNOB_REG_SET_HIGHZ      	\
@@ -70,6 +83,12 @@
 #define CONFIG_KNOBGPIO_INIB  PIN_MFP_SET(GPIO_63,   GPIOKNOB_MFP_INT_CFG)
 #endif
 
+#define CONFIG_SD8563_GPIO_SCL_NUM	 		74
+#define CONFIG_SD8563_GPIO_SDA_NUM	 		22
+
+#define CONFIG_SGM832A_GPIO_SCL_NUM	 		74
+#define CONFIG_SGM832A_GPIO_SDA_NUM	 		22
+
 #define CONFIG_SPINAND_USE_GPIO_POWER       1
 #define CONFIG_SPINAND_POWER_GPIO           64    /* GPIO64 */
 #define CONFIG_SPINAND_GPIO_POWER_LEVEL     0     /* The GPIO level(0: low voltage 1:high voltage) to indicates the spinand power on */
@@ -81,9 +100,9 @@
 #define CONFIG_SENSOR_ACC_TRIG_IO           5     /* PPI_triger5 */
 
 /* Heart-rate Sensor GPIO Config */
-#define CONFIG_SENSOR_HR_POWER_GPIO        22    /* GPIO22 */
-#define CONFIG_SENSOR_HR_RESET_GPIO        0    /* GPIO62 */
-#define CONFIG_SENSOR_HR_ISR_GPIO          74    /* GPIO74 */
+#define CONFIG_SENSOR_HR_POWER_GPIO        9    /* GPIO9 */
+#define CONFIG_SENSOR_HR_RESET_GPIO        62    /* GPIO62 */
+#define CONFIG_SENSOR_HR_ISR_GPIO          63    /* GPIO63 */
 #define CONFIG_SENSOR_HR_TRIG_IO           6     /* PPI_triger6 */
 
 /* Magnet Sensor GPIO Config */

zephyr/boards/arm/ats3085s4_dev_watch_ext_nor/board_cfg.h

@@ -55,7 +55,7 @@
 #define CONFIG_UART_0_NAME      			"UART_0"
 #define CONFIG_UART_1           				0
 #define CONFIG_UART_1_NAME      			"UART_1"
-#define CONFIG_UART_2           				0
+#define CONFIG_UART_2           				1
 #define CONFIG_UART_2_NAME      			"UART_2"
 #define CONFIG_UART_3           				0
 #define CONFIG_UART_3_NAME      			"UART_3"
@@ -65,7 +65,7 @@
 #define CONFIG_PWM          					1
 #define CONFIG_PWM_NAME      				"PWM"
 
-#define CONFIG_I2C_0           					0
+#define CONFIG_I2C_0           					1
 #define CONFIG_I2C_0_NAME      				"I2C_0"
 #define CONFIG_I2C_1           					1
 #define CONFIG_I2C_1_NAME      				"I2C_1"
@@ -126,7 +126,7 @@
 #define CONFIG_ADCKEY                           0
 #define CONFIG_INPUT_DEV_ACTS_ADCKEY_NAME   "keyadc"
 
-#define CONFIG_GPIOKEY                          1
+#define CONFIG_GPIOKEY                          0
 #define CONFIG_INPUT_DEV_ACTS_GPIOKEY_NAME  "keygpio"
 
 #define CONFIG_ONOFFKEY                         1
@@ -135,17 +135,24 @@
 #define CONFIG_TPKEY							1
 #define CONFIG_TPKEY_DEV_NAME				 "tpkey"
 
-#define CONFIG_ACTS_BATTERY						1
+#define CONFIG_ACTS_BATTERY						0
 #define CONFIG_ACTS_BATTERY_DEV_NAME         "batadc"
 
-#define CONFIG_VIBRATOR                         1
+#define CONFIG_VIBRATOR                         0
 #define CONFIG_VIBRATOR_DEV_NAME             "VIBRATOR"
 
 #define CONFIG_CEC				 				0
-#define CONFIG_ACTS_BATTERY_NTC 				1
+#define CONFIG_ACTS_BATTERY_NTC 				0
 
-#define CONFIG_KNOB_ENCODER	   					1
+#define CONFIG_KNOB_ENCODER	   					0
 #define CONFIG_KNOB_ENCODER_DEV_NAME 		"knobencoder"
+
+#define CONFIG_SD8563							1
+#define CONFIG_SD8563_DEV_NAME				 "sd8563"
+
+#define CONFIG_SGM832A							1
+#define CONFIG_SGM832A_DEV_NAME				 "sgm832a"
+
 #define CONFIG_UART_0_USE_TX_DMA   1
 #define CONFIG_UART_0_TX_DMA_CHAN  0x2
 #define CONFIG_UART_0_TX_DMA_ID    1
@@ -248,6 +255,8 @@
 
 #define CONFIG_UART_1_IRQ_PRI   				0
 
+#define CONFIG_UART_2_IRQ_PRI   				0
+
 #define CONFIG_MMC_0_IRQ_PRI        			0
 
 #define CONFIG_MMC_1_IRQ_PRI        			0
@@ -362,6 +371,7 @@ uart board cfg
 */
 #define CONFIG_UART_0_SPEED     2000000
 #define CONFIG_UART_1_SPEED     115200
+#define CONFIG_UART_2_SPEED     115200
 
 /*
 pwm board cfg
@@ -373,7 +383,7 @@ pwm board cfg
 I2C board cfg
 */
 #define CONFIG_I2C_0_CLK_FREQ  100000
-#define CONFIG_I2C_0_MAX_ASYNC_ITEMS 10
+#define CONFIG_I2C_0_MAX_ASYNC_ITEMS 3//10
 
 #define CONFIG_I2C_1_CLK_FREQ  100000
 #define CONFIG_I2C_1_MAX_ASYNC_ITEMS 3
@@ -871,9 +881,9 @@ audio board cfg
 /* Accepted values: 1, 2, 4, 8 */
 #define CONFIG_PANEL_PORT_SPI_AHB_CLK_DIVISION (2)
 /* X-Resolution */
-#define CONFIG_PANEL_TIMING_HACTIVE	(360)
+#define CONFIG_PANEL_TIMING_HACTIVE (360)
 /* Y-Resolution */
-#define CONFIG_PANEL_TIMING_VACTIVE	(360)
+#define CONFIG_PANEL_TIMING_VACTIVE (360)
 /* Pixel transfer clock rate in KHz */
 #define CONFIG_PANEL_TIMING_PIXEL_CLK_KHZ (60000)
 /* Refresh rate in Hz */
@@ -897,7 +907,7 @@ audio board cfg
 #define CONFIG_PANEL_TE_SCANLINE	(300)
 
 /* fixed screen offset due to material or other issue */
-#define CONFIG_PANEL_FIX_OFFSET_X (6)
+#define CONFIG_PANEL_FIX_OFFSET_X (0)
 #define CONFIG_PANEL_FIX_OFFSET_Y (0)
 /* (logical) resolution area reported to user */
 #define CONFIG_PANEL_HOR_RES	(CONFIG_PANEL_TIMING_HACTIVE)
@@ -941,6 +951,15 @@ audio board cfg
 #define CONFIG_TPKEY_I2C_NAME		CONFIG_I2C_1_NAME
 #define CONFIG_TPKEY_LOWPOWER		(1)
 
+/*
+ * sd8563 cfg
+ */
+#define CONFIG_SD8563_I2C_NAME		CONFIG_I2C_0_NAME
+
+/*
+ * sgm832a cfg
+ */
+#define CONFIG_SGM832A_I2C_NAME		CONFIG_I2C_0_NAME  
 
 /*
 PMU cfg

zephyr/drivers/display/panel/CMakeLists.txt

@@ -8,7 +8,7 @@ zephyr_sources_ifdef(CONFIG_PANEL_ICNA3311 panel_device.c panel_icna3311.c)
 zephyr_sources_ifdef(CONFIG_PANEL_RM69090 panel_device.c panel_rm69090.c)
 zephyr_sources_ifdef(CONFIG_PANEL_RM690B0 panel_device.c panel_rm690b0.c)
 zephyr_sources_ifdef(CONFIG_PANEL_SH8601Z0 panel_device.c panel_sh8601z0.c)
-
+zephyr_sources_ifdef(CONFIG_PANEL_ST77916 panel_device.c panel_st77916.c)
 # TR panels
 zephyr_sources_ifdef(CONFIG_PANEL_LPM015M135A panel_device.c panel_lpm015m135a.c)
 

zephyr/drivers/display/panel/Kconfig

@@ -36,6 +36,11 @@ config PANEL_RM69090
 	bool "RM69090 display driver"
 	help
 	  Enable driver for RM69090 display driver.
+	
+config PANEL_ST77916
+	bool "ST77916 display driver"
+	help
+	  Enable driver for ST77916 display driver.
 
 config PANEL_RM690B0
 	bool "RM690B0 display driver"

zephyr/drivers/display/panel/panel_device.c

@@ -7,6 +7,7 @@
 #include <device.h>
 #include <tracing/tracing.h>
 #include "panel_device.h"
+#include <drivers/hrtimer.h>
 
 #include <logging/log.h>
 LOG_MODULE_REGISTER(lcd_panel, CONFIG_DISPLAY_LOG_LEVEL);
@@ -74,6 +75,9 @@ static const struct lcd_panel_config *const lcd_panel_configs[] = {
 #ifdef CONFIG_PANEL_SH8601Z0
 	&lcd_panel_sh8601z0_config,
 #endif
+#ifdef CONFIG_PANEL_ST77916
+	&lcd_panel_st77916_config,
+#endif
 
 	/* TR-panels */
 #ifdef CONFIG_PANEL_LPM015M135A
@@ -81,6 +85,7 @@ static const struct lcd_panel_config *const lcd_panel_configs[] = {
 #endif
 };
 
+static bool bDevEnterSuspend = false;  // 0: not enter suspend, 1: enter suspend
 /**********************
  *      MACROS
  **********************/
@@ -120,7 +125,7 @@ static void _panel_reset(const struct device *dev)
 #endif
 
 #ifdef CONFIG_PANEL_POWER1_GPIO
-	gpio_pin_set(data->power1_gpio, pincfg->power1_cfg.gpion, 1);
+	//gpio_pin_set(data->power1_gpio, pincfg->power1_cfg.gpion, 1);
 #endif
 
 #if IS_TR_PANEL == 0
@@ -863,6 +868,9 @@ static int _lcd_panel_init(const struct device *dev)
 #endif
 
 	_panel_pm_late_resume(dev);
+
+	bDevEnterSuspend = false;
+
 	return 0;
 }
 
@@ -892,6 +900,8 @@ static int _panel_pm_early_suspend(const struct device *dev, bool in_turnoff)
 	_panel_power_off(dev, in_turnoff);
 
 	data->pm_state = PM_DEVICE_STATE_SUSPENDED;
+
+	bDevEnterSuspend = true;
 	return 0;
 }
 
@@ -915,6 +925,23 @@ static int _panel_pm_late_resume(const struct device *dev)
 	return 0;
 }
 
+static struct hrtimer g_panel_backlight_ht_ctrl;
+static void htimer_fun(struct hrtimer *ttimer, void *expiry_fn_arg)
+{
+	const struct device *dev = DEVICE_GET(lcd_panel);
+	struct lcd_panel_data *data = dev->data;
+	const struct lcd_panel_pincfg *pincfg = dev->config;
+
+#ifdef CONFIG_PANEL_POWER1_GPIO
+	gpio_pin_set(data->power1_gpio, pincfg->power1_cfg.gpion, 1);
+#endif	
+}
+static void htimer_panel_backlight(unsigned int ms)
+{
+	hrtimer_init(&g_panel_backlight_ht_ctrl, htimer_fun, NULL);
+	hrtimer_start(&g_panel_backlight_ht_ctrl, 1000*ms, 0);
+}
+
 static void _panel_pm_resume_handler(struct k_work *work)
 {
 	const struct device *dev = DEVICE_GET(lcd_panel);
@@ -934,6 +961,19 @@ static void _panel_pm_resume_handler(struct k_work *work)
 
 	lcd_panel_wake_unlock();
 
+#ifdef CONFIG_PANEL_POWER1_GPIO
+	if (bDevEnterSuspend)
+	{
+		bDevEnterSuspend = false;
+        htimer_panel_backlight(40);
+	}
+	else
+	{
+        htimer_panel_backlight(500);
+	}
+#endif	
+
+
 	LOG_INF("panel active");
 }
 

zephyr/drivers/display/panel/panel_device.h

@@ -182,7 +182,7 @@ extern const struct lcd_panel_config lcd_panel_icna3311_config;
 extern const struct lcd_panel_config lcd_panel_rm690b0_config;
 extern const struct lcd_panel_config lcd_panel_rm69090_config;
 extern const struct lcd_panel_config lcd_panel_sh8601z0_config;
-
+extern const struct lcd_panel_config lcd_panel_st77916_config;
 /* TR panels */
 extern const struct lcd_panel_config lcd_panel_lpm015m135a_config;
 

zephyr/drivers/display/panel/panel_st77916.c

@@ -0,0 +1,863 @@
+/*
+ * Copyright (c) 2020 Actions Technology Co., Ltd
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <sys/byteorder.h>
+#include "panel_st77916.h"
+#include "panel_device.h"
+
+/*********************
+ *      DEFINES
+ *********************/
+
+/**********************
+ *      TYPEDEFS
+ **********************/
+
+/**********************
+ *  STATIC PROTOTYPES
+ **********************/
+
+/**********************
+ *  STATIC VARIABLES
+ **********************/
+
+/**********************
+ *      MACROS
+ **********************/
+
+/**********************
+ *  FUNCTIONS
+ **********************/
+static void _panel_transmit(const struct device *dev, uint32_t cmd,
+		const uint8_t *tx_data, size_t tx_count)
+{
+	struct lcd_panel_data *data = dev->data;
+
+	//assert(data->transfering == 0);
+
+	display_controller_write_config(data->lcdc_dev, ST77916_WR_CMD(cmd), tx_data, tx_count);
+}
+
+static inline void _panel_transmit_cmd(const struct device *dev, uint32_t cmd)
+{
+	_panel_transmit(dev, cmd, NULL, 0);
+}
+
+static inline void _panel_transmit_p1(const struct device *dev, uint32_t cmd, uint8_t tx_data)
+{
+	_panel_transmit(dev, cmd, &tx_data, 1);
+}
+
+static void _panel_transmit_p2(const struct device *dev, uint32_t cmd, uint8_t data1, uint8_t data2)
+{
+	uint8_t data_array[2] = {
+		data1,
+		data2,
+	};
+
+	_panel_transmit(dev, cmd, data_array, 2);
+}
+
+static int _panel_set_brightness(const struct device *dev, uint8_t brightness)
+{
+	_panel_transmit_p1(dev, DDIC_CMD_WRDISBV, brightness);
+	return 0;
+}
+
+static int _panel_set_mem_area(const struct device *dev, uint16_t x, uint16_t y, uint16_t w,
+			       uint16_t h)
+{
+	uint16_t cmd_data[2];
+
+	x += CONFIG_PANEL_MEM_OFFSET_X; // add 12 pixel offset ?
+	y += CONFIG_PANEL_MEM_OFFSET_Y;
+
+	cmd_data[0] = sys_cpu_to_be16(x);
+	cmd_data[1] = sys_cpu_to_be16(x + w - 1);
+	_panel_transmit(dev, DDIC_CMD_CASET, (uint8_t *)&cmd_data[0], 4);
+
+	cmd_data[0] = sys_cpu_to_be16(y);
+	cmd_data[1] = sys_cpu_to_be16(y + h - 1);
+	_panel_transmit(dev, DDIC_CMD_RASET, (uint8_t *)&cmd_data[0], 4);
+
+	return 0;
+}
+#if 0
+static void _panel_exit_sleep(const struct device *dev)
+{
+	struct lcd_panel_data *data = dev->data;
+
+	_panel_transmit_cmd(dev, DDIC_CMD_SLPOUT);
+	k_msleep(120);
+
+	data->in_sleep = 0;
+	
+//	_panel_transmit_cmd(dev, 0xFE);
+//	_panel_transmit_cmd(dev, 0xEF);
+//	_panel_transmit_cmd(dev, 0x11);
+//	k_msleep(120);
+//	_panel_transmit_cmd(dev, 0x29);
+	
+	//printk("st77916 panel exit sleep \r\n ");
+}
+#endif
+static int _panel_blanking_on(const struct device *dev)
+{
+	//printk("st77916 panel blanking on \r\n ");
+	
+	//_panel_transmit_cmd(dev, DDIC_CMD_DISPOFF);
+	//_panel_transmit_cmd(dev, DDIC_CMD_SLPIN);
+	return 0;
+}
+
+static int _panel_blanking_off(const struct device *dev)
+{
+	//struct lcd_panel_data *data = dev->data;
+	
+	//printk("st77916 panel blanking off \r\n ");
+
+	//if (data->in_sleep)
+	//	_panel_exit_sleep(dev);
+
+	//_panel_transmit_cmd(dev, DDIC_CMD_DISPON);
+	k_msleep(80);
+
+	return 0;
+}
+
+static int _panel_lowpower_enter(const struct device *dev)
+{
+	//printk("st77916 panel lowpower enter \r\n ");
+	
+	//_panel_transmit_p1(dev, 0xFE, 0x01);
+	/* 0x01 60Hz, 0x41 30Hz, 0x43 15Hz, 0x4B 5Hz, 0x7B 1Hz */
+	//_panel_transmit_p1(dev, 0x29, 0x4B);
+	//_panel_transmit_p1(dev, 0xFE, 0x00);
+	return 0;
+}
+
+static int _panel_lowpower_exit(const struct device *dev)
+{
+	//printk("st77916 panel lowpower exit \r\n ");
+	
+	//_panel_transmit_p1(dev, 0xFE, 0x01);
+	//_panel_transmit_p1(dev, 0x29, 0x01);
+	//_panel_transmit_p1(dev, 0xFE, 0x00);
+	return 0;
+}
+
+//static void _panel_init_te(const struct device *dev)
+//{
+//	const struct lcd_panel_config *config = dev->config;
+
+//	if (config->videomode.flags & (DISPLAY_FLAGS_TE_HIGH | DISPLAY_FLAGS_TE_LOW)) {
+//		uint8_t tmp[2];
+
+//		sys_put_be16(CONFIG_PANEL_TE_SCANLINE, tmp);
+//		_panel_transmit(dev, DDIC_CMD_STESL, tmp, 2);
+
+//		tmp[0] = 0x02;
+//		_panel_transmit(dev, DDIC_CMD_TEON, tmp, 1);
+//	} else {
+//		_panel_transmit(dev, DDIC_CMD_TEOFF, NULL, 0);
+//	}
+//}
+
+static int _panel_init(const struct device *dev)
+{
+    /* Sleep Out */
+	//_panel_exit_sleep(dev);
+	
+    // internal reg enable
+	//_panel_transmit(dev, DDIC_CMD_INTERREG_EN1, NULL, 0);
+	//_panel_transmit(dev, DDIC_CMD_INTERREG_EN2, NULL, 0);
+	
+	printk("st77916 panel_init \r\n ");
+	
+#if 1
+	_panel_transmit_p1(dev, 0xf0, 0x08);
+	_panel_transmit_p1(dev, 0xF2, 0x08);
+	_panel_transmit_p1(dev, 0x9B, 0x51);
+	_panel_transmit_p1(dev, 0x86, 0x53);
+
+	_panel_transmit_p1(dev, 0xF2, 0x80);  
+	_panel_transmit_p1(dev, 0xF0, 0x00);
+	_panel_transmit_p1(dev, 0xF0, 0x01);
+	_panel_transmit_p1(dev, 0xF1, 0x01);
+
+	_panel_transmit_p1(dev, 0xB0, 0x54);
+	_panel_transmit_p1(dev, 0xB1, 0x3F);
+	_panel_transmit_p1(dev, 0xB2, 0x2A);
+	_panel_transmit_p1(dev, 0xB4, 0x46);
+
+	_panel_transmit_p1(dev, 0xB5, 0x34);
+	_panel_transmit_p1(dev, 0xB6, 0xD5);
+	_panel_transmit_p1(dev, 0xB7, 0x30);
+	//_panel_transmit_p1(dev, 0xB8, 0x04); 
+
+	_panel_transmit_p1(dev, 0xBA, 0x00);
+	_panel_transmit_p1(dev, 0xBB, 0x08);
+	_panel_transmit_p1(dev, 0xBC, 0x08);
+	_panel_transmit_p1(dev, 0xBD, 0x00);
+
+	_panel_transmit_p1(dev, 0xC0, 0x80);
+	_panel_transmit_p1(dev, 0xC1, 0x10);
+	_panel_transmit_p1(dev, 0xC2, 0x37);
+	_panel_transmit_p1(dev, 0xC3, 0x80);
+
+	_panel_transmit_p1(dev, 0xC4, 0x10);
+	_panel_transmit_p1(dev, 0xC5, 0x37);
+	_panel_transmit_p1(dev, 0xC6, 0xA9);
+	_panel_transmit_p1(dev, 0xC7, 0x41);
+
+	_panel_transmit_p1(dev, 0xC8, 0x51);
+	_panel_transmit_p1(dev, 0xC9, 0xA9);
+	_panel_transmit_p1(dev, 0xCA, 0x41);
+	_panel_transmit_p1(dev, 0xCB, 0x51);
+
+	_panel_transmit_p1(dev, 0xD0, 0x91);
+	_panel_transmit_p1(dev, 0xD1, 0x68);
+	_panel_transmit_p1(dev, 0xD2, 0x69);
+
+	const uint8_t data_0xf5[] = {
+		0x00,
+		0xA5,
+	};
+	_panel_transmit(dev, 0xF5, data_0xf5, sizeof(data_0xf5));
+
+	_panel_transmit_p1(dev, 0xDD, 0x3F); 
+	_panel_transmit_p1(dev, 0xDE, 0x3F);
+	_panel_transmit_p1(dev, 0xF1, 0x10);
+	_panel_transmit_p1(dev, 0xF0, 0x00);
+	_panel_transmit_p1(dev, 0xF0, 0x02);
+
+	const uint8_t data_0xe0[] = {
+		0xF0, 0x06, 0x0B, 0x09, 0x09, 0x16, 0x32, 0x44, 0x4A, 0x37, 0x13, 0x13, 0x2E, 0x34,
+	};
+
+	_panel_transmit(dev, 0xE0, data_0xe0, sizeof(data_0xe0));
+
+	const uint8_t data_0xe1[] = {
+		0xF0, 0x06, 0x0B, 0x09, 0x08, 0x05, 0x32, 0x33, 0x49, 0x17, 0x13, 0x13, 0x2E, 0x34,
+	};
+	_panel_transmit(dev, 0xE1, data_0xe1, sizeof(data_0xe1));
+
+	_panel_transmit_p1(dev, 0xF0, 0x10);
+	_panel_transmit_p1(dev, 0xF3, 0x10);
+	_panel_transmit_p1(dev, 0xE0, 0x0A);
+	_panel_transmit_p1(dev, 0xE1, 0x00);
+
+	_panel_transmit_p1(dev, 0xE2, 0x00); 
+	_panel_transmit_p1(dev, 0xE3, 0x00);
+	_panel_transmit_p1(dev, 0xE4, 0xE0);
+	_panel_transmit_p1(dev, 0xE5, 0x06);
+
+	_panel_transmit_p1(dev, 0xE6, 0x21);
+	_panel_transmit_p1(dev, 0xE7, 0x00);
+	_panel_transmit_p1(dev, 0xE8, 0x05);
+	_panel_transmit_p1(dev, 0xE9, 0x82);
+
+	_panel_transmit_p1(dev, 0xEA, 0xDF);
+	_panel_transmit_p1(dev, 0xEB, 0x89);
+	_panel_transmit_p1(dev, 0xEC, 0x20);
+	_panel_transmit_p1(dev, 0xED, 0x14);
+
+	_panel_transmit_p1(dev, 0xEE, 0xFF);
+	_panel_transmit_p1(dev, 0xEF, 0x00);
+	_panel_transmit_p1(dev, 0xF8, 0xFF);
+	_panel_transmit_p1(dev, 0xF9, 0x00);
+
+	_panel_transmit_p1(dev, 0xFA, 0x00);
+	_panel_transmit_p1(dev, 0xFB, 0x30);
+	_panel_transmit_p1(dev, 0xFC, 0x00);
+	_panel_transmit_p1(dev, 0xFD, 0x00);
+
+	_panel_transmit_p1(dev, 0xFE, 0x00);
+	_panel_transmit_p1(dev, 0xFF, 0x00);
+	_panel_transmit_p1(dev, 0x60, 0x42);
+	_panel_transmit_p1(dev, 0x61, 0xE0);
+
+	_panel_transmit_p1(dev, 0x62, 0x40);
+	_panel_transmit_p1(dev, 0x63, 0x40);
+	_panel_transmit_p1(dev, 0x64, 0x02);
+	_panel_transmit_p1(dev, 0x65, 0x00);
+
+	_panel_transmit_p1(dev, 0x66, 0x40);
+	_panel_transmit_p1(dev, 0x67, 0x03);
+	_panel_transmit_p1(dev, 0x68, 0x00);
+	_panel_transmit_p1(dev, 0x69, 0x00);
+
+	_panel_transmit_p1(dev, 0x6A, 0x00);
+	_panel_transmit_p1(dev, 0x6B, 0x00);
+	_panel_transmit_p1(dev, 0x70, 0x42);
+	_panel_transmit_p1(dev, 0x71, 0xE0);
+
+	_panel_transmit_p1(dev, 0x72, 0x40);
+	_panel_transmit_p1(dev, 0x73, 0x40);
+	_panel_transmit_p1(dev, 0x74, 0x02);
+	_panel_transmit_p1(dev, 0x75, 0x00);
+
+	_panel_transmit_p1(dev, 0x76, 0x40);
+	_panel_transmit_p1(dev, 0x77, 0x03);
+	_panel_transmit_p1(dev, 0x78, 0x00);
+	_panel_transmit_p1(dev, 0x79, 0x00);
+
+	_panel_transmit_p1(dev, 0x7A, 0x00);
+	_panel_transmit_p1(dev, 0x7B, 0x00);
+	_panel_transmit_p1(dev, 0x80, 0x48);
+	_panel_transmit_p1(dev, 0x81, 0x00);
+
+	_panel_transmit_p1(dev, 0x82, 0x05);
+	_panel_transmit_p1(dev, 0x83, 0x02);
+	_panel_transmit_p1(dev, 0x84, 0xDD);
+	_panel_transmit_p1(dev, 0x85, 0x00);
+
+	_panel_transmit_p1(dev, 0x86, 0x00);
+	_panel_transmit_p1(dev, 0x87, 0x00);
+	_panel_transmit_p1(dev, 0x88, 0x48);
+	_panel_transmit_p1(dev, 0x89, 0x00);
+
+	_panel_transmit_p1(dev, 0x8A, 0x07);
+	_panel_transmit_p1(dev, 0x8B, 0x02);
+	_panel_transmit_p1(dev, 0x8C, 0xDF);
+	_panel_transmit_p1(dev, 0x8D, 0x00);
+
+	_panel_transmit_p1(dev, 0x8E, 0x00);
+	_panel_transmit_p1(dev, 0x8F, 0x00);
+	_panel_transmit_p1(dev, 0x90, 0x48);
+	_panel_transmit_p1(dev, 0x91, 0x00);
+
+	_panel_transmit_p1(dev, 0x92, 0x09);
+	_panel_transmit_p1(dev, 0x93, 0x02);
+	_panel_transmit_p1(dev, 0x94, 0xE1);
+	_panel_transmit_p1(dev, 0x95, 0x00);
+
+	_panel_transmit_p1(dev, 0x96, 0x00);
+	_panel_transmit_p1(dev, 0x97, 0x00);
+	_panel_transmit_p1(dev, 0x98, 0x48);
+	_panel_transmit_p1(dev, 0x99, 0x00);
+
+	_panel_transmit_p1(dev, 0x9A, 0x0B);
+	_panel_transmit_p1(dev, 0x9B, 0x02);
+	_panel_transmit_p1(dev, 0x9C, 0xE3);
+	_panel_transmit_p1(dev, 0x9D, 0x00);
+
+	_panel_transmit_p1(dev, 0x9E, 0x00);
+	_panel_transmit_p1(dev, 0x9F, 0x00);
+	_panel_transmit_p1(dev, 0xA0, 0x48);
+	_panel_transmit_p1(dev, 0xA1, 0x00);
+
+	_panel_transmit_p1(dev, 0xA2, 0x04);  
+	_panel_transmit_p1(dev, 0xA3, 0x02);
+	_panel_transmit_p1(dev, 0xA4, 0xDC);
+	_panel_transmit_p1(dev, 0xA5, 0x00);
+
+	_panel_transmit_p1(dev, 0xA6, 0x00);
+	_panel_transmit_p1(dev, 0xA7, 0x00);
+	_panel_transmit_p1(dev, 0xA8, 0x48);
+	_panel_transmit_p1(dev, 0xA9, 0x00);
+
+	_panel_transmit_p1(dev, 0xAA, 0x06);
+	_panel_transmit_p1(dev, 0xAB, 0x02);
+	_panel_transmit_p1(dev, 0xAC, 0xDE);
+	_panel_transmit_p1(dev, 0xAD, 0x00);
+
+	_panel_transmit_p1(dev, 0xAE, 0x00);
+	_panel_transmit_p1(dev, 0xAF, 0x00);
+	_panel_transmit_p1(dev, 0xB0, 0x48);
+	_panel_transmit_p1(dev, 0xB1, 0x00);
+
+	_panel_transmit_p1(dev, 0xB2, 0x08);
+	_panel_transmit_p1(dev, 0xB3, 0x02);
+	_panel_transmit_p1(dev, 0xB4, 0xE0);
+	_panel_transmit_p1(dev, 0xB5, 0x00);
+
+	_panel_transmit_p1(dev, 0xB6, 0x00);
+	_panel_transmit_p1(dev, 0xB7, 0x00);
+	_panel_transmit_p1(dev, 0xB8, 0x48);
+	_panel_transmit_p1(dev, 0xB9, 0x00);
+
+	_panel_transmit_p1(dev, 0xBA, 0x0A);
+	_panel_transmit_p1(dev, 0xBB, 0x02);
+	_panel_transmit_p1(dev, 0xBC, 0xE2);
+	_panel_transmit_p1(dev, 0xBD, 0x00);
+
+	_panel_transmit_p1(dev, 0xBE, 0x00);
+	_panel_transmit_p1(dev, 0xBF, 0x00);
+	_panel_transmit_p1(dev, 0xC0, 0x12);
+	_panel_transmit_p1(dev, 0xC1, 0xAA);
+
+	_panel_transmit_p1(dev, 0xC2, 0x65);
+	_panel_transmit_p1(dev, 0xC3, 0x74);
+	_panel_transmit_p1(dev, 0xC4, 0x47);
+	_panel_transmit_p1(dev, 0xC5, 0x56);
+
+	_panel_transmit_p1(dev, 0xC6, 0x00);
+	_panel_transmit_p1(dev, 0xC7, 0x88);
+	_panel_transmit_p1(dev, 0xC8, 0x99);
+	_panel_transmit_p1(dev, 0xC9, 0x33);
+
+	_panel_transmit_p1(dev, 0xD0, 0x21);
+	_panel_transmit_p1(dev, 0xD1, 0xAA);
+	_panel_transmit_p1(dev, 0xD2, 0x65);
+	_panel_transmit_p1(dev, 0xD3, 0x74);
+
+	_panel_transmit_p1(dev, 0xD4, 0x47);
+	_panel_transmit_p1(dev, 0xD5, 0x56);
+	_panel_transmit_p1(dev, 0xD6, 0x00);
+	_panel_transmit_p1(dev, 0xD7, 0x88);
+
+	_panel_transmit_p1(dev, 0xD8, 0x99);
+	_panel_transmit_p1(dev, 0xD9, 0x33);
+	_panel_transmit_p1(dev, 0xF3, 0x01);
+	_panel_transmit_p1(dev, 0xF0, 0x00);
+
+	_panel_transmit_p1(dev, 0xF0, 0x01);
+	_panel_transmit_p1(dev, 0xF1, 0x01);
+	_panel_transmit_p1(dev, 0xA0, 0x0B);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2A);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2B);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2C);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2D);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2E);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2F);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x30);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x31);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x32);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x33);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA0, 0x09);
+	_panel_transmit_p1(dev, 0xF1, 0x10);
+	_panel_transmit_p1(dev, 0xF0, 0x00);
+
+	const uint8_t data_0x2a[] = {
+		0x00,
+		0x00,
+		0x01,
+		0x67,
+	};
+	_panel_transmit(dev, 0x2a, data_0x2a, sizeof(data_0x2a));
+
+	const uint8_t data_0x2b[] = {
+		0x01,
+		0x68,
+		0x01,
+		0x68,
+	};
+	_panel_transmit(dev, 0x2b, data_0x2b, sizeof(data_0x2b));
+
+	_panel_transmit_p1(dev, 0x4D, 0x00);
+	_panel_transmit_p1(dev, 0x4E, 0x00);
+	_panel_transmit_p1(dev, 0x4F, 0x00);
+	_panel_transmit_p1(dev, 0x4C, 0x01);
+	k_msleep(10);
+
+	_panel_transmit_p1(dev, 0x4C, 0x00);
+	_panel_transmit(dev, 0x2a, data_0x2a, sizeof(data_0x2a));
+	_panel_transmit(dev, 0x2b, data_0x2a, sizeof(data_0x2a));
+
+	_panel_transmit_cmd(dev, 0x21);
+
+	/* TE */
+	_panel_transmit_p2(dev, DDIC_CMD_STESL, CONFIG_PANEL_TE_SCANLINE >> 8,
+			   CONFIG_PANEL_TE_SCANLINE & 0xff);
+	_panel_transmit_p1(dev, DDIC_CMD_TEON, 0x00);
+
+	_panel_transmit_p1(dev, 0x53, 0x20);
+
+	_panel_transmit_cmd(dev, 0x11); /* Sleep Out */
+	k_msleep(120);
+	_panel_transmit_p1(dev, 0x3a, 0x55);
+	_panel_transmit_cmd(dev, 0x29); /* Display On */
+	k_msleep(50);
+	//_panel_transmit_cmd(dev, 0x1c);
+	//k_msleep(120);
+	
+#else
+
+  _panel_transmit_p1(dev, 0xf0, 0x08);
+	_panel_transmit_p1(dev, 0xF2, 0x08);
+	_panel_transmit_p1(dev, 0x9B, 0x51);
+	_panel_transmit_p1(dev, 0x86, 0x53);
+
+	_panel_transmit_p1(dev, 0xF2, 0x08);
+	_panel_transmit_p1(dev, 0xF0, 0x00);
+	_panel_transmit_p1(dev, 0xF0, 0x01);
+	_panel_transmit_p1(dev, 0xF1, 0x01);
+
+	_panel_transmit_p1(dev, 0xB0, 0x54);
+	_panel_transmit_p1(dev, 0xB1, 0x3F);
+	_panel_transmit_p1(dev, 0xB2, 0x2A);
+	_panel_transmit_p1(dev, 0xB4, 0x46);
+
+	_panel_transmit_p1(dev, 0xB5, 0x34);
+	_panel_transmit_p1(dev, 0xB6, 0xD5);
+	_panel_transmit_p1(dev, 0xB7, 0x30);
+	_panel_transmit_p1(dev, 0xB8, 0x04);
+
+	_panel_transmit_p1(dev, 0xBA, 0x00);
+	_panel_transmit_p1(dev, 0xBB, 0x08);
+	_panel_transmit_p1(dev, 0xBC, 0x08);
+	_panel_transmit_p1(dev, 0xBD, 0x00);
+
+	_panel_transmit_p1(dev, 0xC0, 0x80);
+	_panel_transmit_p1(dev, 0xC1, 0x10);
+	_panel_transmit_p1(dev, 0xC2, 0x37);
+	_panel_transmit_p1(dev, 0xC3, 0x80);
+
+	_panel_transmit_p1(dev, 0xC4, 0x10);
+	_panel_transmit_p1(dev, 0xC5, 0x37);
+	_panel_transmit_p1(dev, 0xC6, 0xA9);
+	_panel_transmit_p1(dev, 0xC7, 0x41);
+
+	_panel_transmit_p1(dev, 0xC8, 0x51);
+	_panel_transmit_p1(dev, 0xC9, 0xA9);
+	_panel_transmit_p1(dev, 0xCA, 0x41);
+	_panel_transmit_p1(dev, 0xCB, 0x51);
+
+	_panel_transmit_p1(dev, 0xD0, 0x91);
+	_panel_transmit_p1(dev, 0xD1, 0x68);
+	_panel_transmit_p1(dev, 0xD2, 0x69);
+
+	const uint8_t data_0xf5[] = {
+		0x00,
+		0xA5,
+	};
+	_panel_transmit(dev, 0xF5, data_0xf5, sizeof(data_0xf5));
+
+	_panel_transmit_p1(dev, 0xDD, 0x35);
+	_panel_transmit_p1(dev, 0xDE, 0x35);
+	_panel_transmit_p1(dev, 0xF1, 0x10);
+	_panel_transmit_p1(dev, 0xF0, 0x00);
+	_panel_transmit_p1(dev, 0xF0, 0x02);
+
+	const uint8_t data_0xe0[] = {
+		0x70, 0x09, 0x12, 0x0C, 0x0B, 0x27, 0x38, 0x54, 0x4E, 0x19, 0x15, 0x15, 0x2C, 0x2F,
+	};
+
+	_panel_transmit(dev, 0xE0, data_0xe0, sizeof(data_0xe0));
+
+	const uint8_t data_0xe1[] = {
+		0x70, 0x08, 0x11, 0x0C, 0x0B, 0x27, 0x38, 0x43, 0x4C, 0x18, 0x14, 0x14, 0x2B, 0x2D,
+	};
+	_panel_transmit(dev, 0xE1, data_0xe1, sizeof(data_0xe1));
+
+	_panel_transmit_p1(dev, 0xF0, 0x10);
+	_panel_transmit_p1(dev, 0xF3, 0x10);
+	_panel_transmit_p1(dev, 0xE0, 0x0A);
+	_panel_transmit_p1(dev, 0xE1, 0x00);
+
+	_panel_transmit_p1(dev, 0xE2, 0x0B);
+	_panel_transmit_p1(dev, 0xE3, 0x00);
+	_panel_transmit_p1(dev, 0xE4, 0xE0);
+	_panel_transmit_p1(dev, 0xE5, 0x06);
+
+	_panel_transmit_p1(dev, 0xE6, 0x21);
+	_panel_transmit_p1(dev, 0xE7, 0x00);
+	_panel_transmit_p1(dev, 0xE8, 0x05);
+	_panel_transmit_p1(dev, 0xE9, 0x82);
+
+	_panel_transmit_p1(dev, 0xEA, 0xDF);
+	_panel_transmit_p1(dev, 0xEB, 0x89);
+	_panel_transmit_p1(dev, 0xEC, 0x20);
+	_panel_transmit_p1(dev, 0xED, 0x14);
+
+	_panel_transmit_p1(dev, 0xEE, 0xFF);
+	_panel_transmit_p1(dev, 0xEF, 0x00);
+	_panel_transmit_p1(dev, 0xF8, 0xFF);
+	_panel_transmit_p1(dev, 0xF9, 0x00);
+
+	_panel_transmit_p1(dev, 0xFA, 0x00);
+	_panel_transmit_p1(dev, 0xFB, 0x30);
+	_panel_transmit_p1(dev, 0xFC, 0x00);
+	_panel_transmit_p1(dev, 0xFD, 0x00);
+
+	_panel_transmit_p1(dev, 0xFE, 0x00);
+	_panel_transmit_p1(dev, 0xFF, 0x00);
+	_panel_transmit_p1(dev, 0x60, 0x42);
+	_panel_transmit_p1(dev, 0x61, 0xE0);
+
+	_panel_transmit_p1(dev, 0x62, 0x40);
+	_panel_transmit_p1(dev, 0x63, 0x40);
+	_panel_transmit_p1(dev, 0x64, 0x02);
+	_panel_transmit_p1(dev, 0x65, 0x00);
+
+	_panel_transmit_p1(dev, 0x66, 0x40);
+	_panel_transmit_p1(dev, 0x67, 0x03);
+	_panel_transmit_p1(dev, 0x68, 0x00);
+	_panel_transmit_p1(dev, 0x69, 0x00);
+
+	_panel_transmit_p1(dev, 0x6A, 0x00);
+	_panel_transmit_p1(dev, 0x6B, 0x00);
+	_panel_transmit_p1(dev, 0x70, 0x42);
+	_panel_transmit_p1(dev, 0x71, 0xE0);
+
+	_panel_transmit_p1(dev, 0x72, 0x40);
+	_panel_transmit_p1(dev, 0x73, 0x40);
+	_panel_transmit_p1(dev, 0x74, 0x02);
+	_panel_transmit_p1(dev, 0x75, 0x00);
+
+	_panel_transmit_p1(dev, 0x76, 0x40);
+	_panel_transmit_p1(dev, 0x77, 0x03);
+	_panel_transmit_p1(dev, 0x78, 0x00);
+	_panel_transmit_p1(dev, 0x79, 0x00);
+
+	_panel_transmit_p1(dev, 0x7A, 0x00);
+	_panel_transmit_p1(dev, 0x7B, 0x00);
+	_panel_transmit_p1(dev, 0x80, 0x38);
+	_panel_transmit_p1(dev, 0x81, 0x00);
+
+	_panel_transmit_p1(dev, 0x82, 0x04);
+	_panel_transmit_p1(dev, 0x83, 0x02);
+	_panel_transmit_p1(dev, 0x84, 0xDC);
+	_panel_transmit_p1(dev, 0x85, 0x00);
+
+	_panel_transmit_p1(dev, 0x86, 0x00);
+	_panel_transmit_p1(dev, 0x87, 0x00);
+	_panel_transmit_p1(dev, 0x88, 0x38);
+	_panel_transmit_p1(dev, 0x89, 0x00);
+
+	_panel_transmit_p1(dev, 0x8A, 0x06);
+	_panel_transmit_p1(dev, 0x8B, 0x02);
+	_panel_transmit_p1(dev, 0x8C, 0xDE);
+	_panel_transmit_p1(dev, 0x8D, 0x00);
+
+	_panel_transmit_p1(dev, 0x8E, 0x00);
+	_panel_transmit_p1(dev, 0x8F, 0x00);
+	_panel_transmit_p1(dev, 0x90, 0x38);
+	_panel_transmit_p1(dev, 0x91, 0x00);
+
+	_panel_transmit_p1(dev, 0x92, 0x08);
+	_panel_transmit_p1(dev, 0x93, 0x02);
+	_panel_transmit_p1(dev, 0x94, 0xE0);
+	_panel_transmit_p1(dev, 0x95, 0x00);
+
+	_panel_transmit_p1(dev, 0x96, 0x00);
+	_panel_transmit_p1(dev, 0x97, 0x00);
+	_panel_transmit_p1(dev, 0x98, 0x38);
+	_panel_transmit_p1(dev, 0x99, 0x00);
+
+	_panel_transmit_p1(dev, 0x9A, 0x0A);
+	_panel_transmit_p1(dev, 0x9B, 0x02);
+	_panel_transmit_p1(dev, 0x9C, 0xE2);
+	_panel_transmit_p1(dev, 0x9D, 0x00);
+
+	_panel_transmit_p1(dev, 0x9E, 0x00);
+	_panel_transmit_p1(dev, 0x9F, 0x00);
+	_panel_transmit_p1(dev, 0xA0, 0x38);
+	_panel_transmit_p1(dev, 0xA1, 0x00);
+
+	_panel_transmit_p1(dev, 0xA2, 0x03);
+	_panel_transmit_p1(dev, 0xA3, 0x02);
+	_panel_transmit_p1(dev, 0xA4, 0xDB);
+	_panel_transmit_p1(dev, 0xA5, 0x00);
+
+	_panel_transmit_p1(dev, 0xA6, 0x00);
+	_panel_transmit_p1(dev, 0xA7, 0x00);
+	_panel_transmit_p1(dev, 0xA8, 0x38);
+	_panel_transmit_p1(dev, 0xA9, 0x00);
+
+	_panel_transmit_p1(dev, 0xAA, 0x05);
+	_panel_transmit_p1(dev, 0xAB, 0x02);
+	_panel_transmit_p1(dev, 0xAC, 0xDD);
+	_panel_transmit_p1(dev, 0xAD, 0x00);
+
+	_panel_transmit_p1(dev, 0xAE, 0x00);
+	_panel_transmit_p1(dev, 0xAF, 0x00);
+	_panel_transmit_p1(dev, 0xB0, 0x38);
+	_panel_transmit_p1(dev, 0xB1, 0x00);
+
+	_panel_transmit_p1(dev, 0xB2, 0x07);
+	_panel_transmit_p1(dev, 0xB3, 0x02);
+	_panel_transmit_p1(dev, 0xB4, 0xDF);
+	_panel_transmit_p1(dev, 0xB5, 0x00);
+
+	_panel_transmit_p1(dev, 0xB6, 0x00);
+	_panel_transmit_p1(dev, 0xB7, 0x00);
+	_panel_transmit_p1(dev, 0xB8, 0x38);
+	_panel_transmit_p1(dev, 0xB9, 0x00);
+
+	_panel_transmit_p1(dev, 0xBA, 0x09);
+	_panel_transmit_p1(dev, 0xBB, 0x02);
+	_panel_transmit_p1(dev, 0xBC, 0xE1);
+	_panel_transmit_p1(dev, 0xBD, 0x00);
+
+	_panel_transmit_p1(dev, 0xBE, 0x00);
+	_panel_transmit_p1(dev, 0xBF, 0x00);
+	_panel_transmit_p1(dev, 0xC0, 0x22);
+	_panel_transmit_p1(dev, 0xC1, 0xAA);
+
+	_panel_transmit_p1(dev, 0xC2, 0x65);
+	_panel_transmit_p1(dev, 0xC3, 0x74);
+	_panel_transmit_p1(dev, 0xC4, 0x47);
+	_panel_transmit_p1(dev, 0xC5, 0x56);
+
+	_panel_transmit_p1(dev, 0xC6, 0x00);
+	_panel_transmit_p1(dev, 0xC7, 0x88);
+	_panel_transmit_p1(dev, 0xC8, 0x99);
+	_panel_transmit_p1(dev, 0xC9, 0x33);
+
+	_panel_transmit_p1(dev, 0xD0, 0x11);
+	_panel_transmit_p1(dev, 0xD1, 0xAA);
+	_panel_transmit_p1(dev, 0xD2, 0x65);
+	_panel_transmit_p1(dev, 0xD3, 0x74);
+
+	_panel_transmit_p1(dev, 0xD4, 0x47);
+	_panel_transmit_p1(dev, 0xD5, 0x56);
+	_panel_transmit_p1(dev, 0xD6, 0x00);
+	_panel_transmit_p1(dev, 0xD7, 0x88);
+
+	_panel_transmit_p1(dev, 0xD8, 0x99);
+	_panel_transmit_p1(dev, 0xD9, 0x33);
+	_panel_transmit_p1(dev, 0xF3, 0x01);
+	_panel_transmit_p1(dev, 0xF0, 0x00);
+
+	_panel_transmit_p1(dev, 0xF0, 0x01);
+	_panel_transmit_p1(dev, 0xF1, 0x01);
+	_panel_transmit_p1(dev, 0xA0, 0x0B);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2A);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2B);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2C);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2D);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2E);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x2F);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x30);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x31);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x32);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA3, 0x33);
+	_panel_transmit_p1(dev, 0xA5, 0xC3);
+	k_msleep(1);
+
+	_panel_transmit_p1(dev, 0xA0, 0x09);
+	_panel_transmit_p1(dev, 0xF1, 0x10);
+	_panel_transmit_p1(dev, 0xF0, 0x00);
+
+	const uint8_t data_0x2a[] = {
+		0x00,
+		0x00,
+		0x01,
+		0x67,
+	};
+	_panel_transmit(dev, 0x2a, data_0x2a, sizeof(data_0x2a));
+
+	const uint8_t data_0x2b[] = {
+		0x01,
+		0x68,
+		0x01,
+		0x68,
+	};
+	_panel_transmit(dev, 0x2b, data_0x2b, sizeof(data_0x2b));
+
+	_panel_transmit_p1(dev, 0x4D, 0x00);
+	_panel_transmit_p1(dev, 0x4E, 0x00);
+	_panel_transmit_p1(dev, 0x4F, 0x00);
+	_panel_transmit_p1(dev, 0x4C, 0x01);
+	k_msleep(10);
+
+	_panel_transmit_p1(dev, 0x4C, 0x00);
+	_panel_transmit(dev, 0x2a, data_0x2a, sizeof(data_0x2a));
+	_panel_transmit(dev, 0x2b, data_0x2a, sizeof(data_0x2a));
+
+	_panel_transmit_cmd(dev, 0x21);
+
+            	/* TE */
+	_panel_transmit_p2(dev, DDIC_CMD_STESL,
+			CONFIG_PANEL_TE_SCANLINE >> 8, CONFIG_PANEL_TE_SCANLINE & 0xff);
+	_panel_transmit_p1(dev, DDIC_CMD_TEON, 0x00);
+
+    _panel_transmit_p1(dev, 0x53, 0x20);
+
+	_panel_transmit_cmd(dev, 0x11); /* Sleep Out */
+	k_msleep(120);
+
+	_panel_transmit_cmd(dev, 0x29); /* Display On */
+	k_msleep(120);
+	
+	_panel_transmit_cmd(dev, 0x1c);
+	k_msleep(120);
+#endif
+	// _panel_init_te(dev);
+	printk("st77916 panel_init exit\r\n ");
+	return 0;
+}
+
+static const struct lcd_panel_ops lcd_panel_ops = {
+	.init = _panel_init,
+	.blanking_on = _panel_blanking_on,
+	.blanking_off = _panel_blanking_off,
+	.lowpower_enter = _panel_lowpower_enter,
+	.lowpower_exit = _panel_lowpower_exit,
+	.set_brightness = _panel_set_brightness,
+	.write_prepare = _panel_set_mem_area,
+};
+
+const struct lcd_panel_config lcd_panel_st77916_config = {
+	.videoport = PANEL_VIDEO_PORT_INITIALIZER,
+	.videomode = PANEL_VIDEO_MODE_INITIALIZER,
+	.ops = &lcd_panel_ops,
+	.cmd_ramwr = (0x32 << 24 | DDIC_CMD_RAMWR << 8),
+	.cmd_ramwc = (0x32 << 24 | DDIC_CMD_RAMWRC << 8),
+	.tw_reset = 10,
+	.ts_reset = 120,
+};

zephyr/drivers/display/panel/panel_st77916.h

@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2020 Actions Technology Co., Ltd
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef PANEL_ST77916_DRIVER_H__
+#define PANEL_ST77916_DRIVER_H__
+
+#define DDIC_CMD_NOP			0x00
+#define DDIC_CMD_SWRESET		0x01 /* Software Reset */
+#define DDIC_CMD_RDDID			0x04 /* Read Display ID */
+#define DDIC_CMD_RDNUMED		0x05 /* Read Number of Errors on DSI */
+#define DDIC_CMD_RDDPM			0x0A /* Read Display Power Mode */
+#define DDIC_CMD_RDDMADCTR	0x0B /* Read Display MADCTR */
+#define DDIC_CMD_RDDCOLMOD	0x0C /* Read Display Pixel Format */
+#define DDIC_CMD_RDDIM			0x0D /* Read Display Image Mode */
+#define DDIC_CMD_RDDSM			0x0E /* Read Display Signal Mode */
+#define DDIC_CMD_RDDSDR			0x0F /* Read Display Self-Diagnostic Result */
+#define DDIC_CMD_SLPIN			0x10 /* Sleep In */
+#define DDIC_CMD_SLPOUT			0x11 /* Sleep Out */
+#define DDIC_CMD_PTLON 			0x12 /* Partial Display Mode On */
+#define DDIC_CMD_NORON 			0x13 /* Normal Display Mode On */
+#define DDIC_CMD_INVOFF			0x20 /* Display Inversion Off */
+#define DDIC_CMD_INVON			0x21 /* Display Inversion On */
+#define DDIC_CMD_ALLPOFF 		0x22 /* All Pixel Off */
+#define DDIC_CMD_ALLPON 		0x23 /* All Pixel On */
+#define DDIC_CMD_DISPOFF		0x28 /* Display Off */
+#define DDIC_CMD_DISPON			0x29 /* Display On */
+#define DDIC_CMD_CASET 			0x2A /* Set Column Start Address */
+#define DDIC_CMD_RASET 			0x2B /* Set Row Start Address */
+#define DDIC_CMD_RAMWR			0x2C /* Memory Write */
+#define DDIC_CMD_PTLAR 			0x30 /* Partial Area */
+#define DDIC_CMD_VPTLAR 		0x31 /* Vertical Partial Area */
+#define DDIC_CMD_TEOFF			0x34 /* Tearing Effect Line OFF */
+#define DDIC_CMD_TEON				0x35 /* Tearing Effect Line ON */
+#define DDIC_CMD_MADCTR 		0x36 /* Scan Direction Control */
+#define DDIC_CMD_IDMOFF			0x38 /* Idle Mode Off */
+#define DDIC_CMD_IDMON			0x39 /* Idle Mode On */
+#define DDIC_CMD_COLMOD			0x3A /* Interface Pixel Format */
+#define DDIC_CMD_RAMWRC 		0x3C /* Memory Continuous Write */
+
+#define DDIC_CMD_STESL 			0x44 /* Set Tear Scanline */
+#define DDIC_CMD_GSL 				0x45 /* Get Scanline */
+#define DDIC_CMD_DSTBON 		0x4F /* Deep Standby Mode On */
+#define DDIC_CMD_WRDISBV 		0x51 /* Write Display Brightness */
+#define DDIC_CMD_RDDISBV 		0x52 /* Read Display Brightness */
+#define DDIC_CMD_WRCTRLD 		0x53 /* Write Display Control */
+#define DDIC_CMD_RDCTRLD 		0x54 /* Read Display Control */
+#define DDIC_CMD_WRRADACL 	0x55 /* RAD_ACL Control */
+#define DDIC_CMD_SCE 				0x58 /* Set Color Enhance */
+#define DDIC_CMD_GCE 				0x59 /* Read Color Enhance */
+#define DDIC_CMD_WRHBMDISBV 0x63 /* Write HBM Display Brightness */
+#define DDIC_CMD_RDHBMDISBV 0x64 /* Read HBM Display Brightness */
+#define DDIC_CMD_HBM 				0x66 /* Set HBM Mode */
+#define DDIC_CMD_DEEPIDM 		0x67 /* Set Deep Idle Mode */
+
+#define DDIC_CMD_COLSET 		0x70 /* Interface Pixel Format Set */
+#define DDIC_CMD_COLOPT 		0x80 /* Interface Pixel Format Option */
+#define DDIC_CMD_RDDDBS 		0xA1 /* Read DDB Start */
+#define DDIC_CMD_RDDDBC 		0xA8 /* Read DDB Continous */
+#define DDIC_CMD_RDFCS			0xAA /* Read First Checksum */
+#define DDIC_CMD_RDCCS 			0xAF /* Read Continue Checksum */
+#define DDIC_CMD_SETDISPMOD 0xC2 /* Set DISP Mode */
+#define DDIC_CMD_SETDSPIMOD 0xC4 /* Set DSPI Mode */
+
+#define DDIC_CMD_RDID1			0xDA /* Read ID1 */
+#define DDIC_CMD_RDID2			0xDB /* Read ID2 */
+#define DDIC_CMD_RDID3			0xDC /* Read ID3 */
+#define DDIC_CMD_MAUCCTR 		0xFE /* CMD Mode Switch */
+#define DDIC_CMD_RDMAUCCTR 	0xFF /* Read CMD Status */
+
+#define ST77916_RD_CMD(cmd) ((0x33 << 24) | ((uint32_t)(cmd) << 8))
+#define ST77916_WR_CMD(cmd) ((0x32 << 24) | ((uint32_t)(cmd) << 8))
+
+#endif /* PANEL_ST77916_DRIVER_H__ */

zephyr/drivers/input/CMakeLists.txt

@@ -10,5 +10,7 @@ zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_IR_CAPTURE capture_protocol.c
 zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_IR_CAPTURE capture_controller.c)
 zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_IR_CAPTURE capture_data.c)
 zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_KNOB knobencoder_acts.c)
+zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_SD8563_TIMER sd8563_timer_acts.c)
+zephyr_library_sources_ifdef(CONFIG_INPUT_DEV_ACTS_SGM832A sgm832a_acts.c)
 
 add_subdirectory_ifdef(CONFIG_INPUT_DEV_ACTS_TP_KEY tpkey)

zephyr/drivers/input/Kconfig

@@ -108,4 +108,18 @@ config INPUT_DEV_ACTS_KNOB
 	default n
 	help
 	Enable support for Actions SoC mx knob encoder driver.
+	
+config INPUT_DEV_ACTS_SD8563_TIMER
+    bool "Actions SoC Timer driver"
+    depends on SOC_FAMILY_ACTS
+    default n
+    help
+      Enable support for Actions SoC timer driver.
+
+config INPUT_DEV_ACTS_SGM832A
+    bool "Actions SoC Sgm832a driver"
+    depends on SOC_FAMILY_ACTS
+    default n
+    help
+      Enable support for Actions SoC sgm832a driver.
 endif # INPUT_DEV

zephyr/drivers/input/sd8563_timer_acts.c

@@ -0,0 +1,516 @@
+ /*
+ * Copyright (c) 2024 Wingcool Technology Co., Ltd
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief SD8563 Timer driver for Actions SoC
+ */
+
+#include <errno.h>
+#include <kernel.h>
+#include <string.h>
+//#include <stdbool.h>
+#include <init.h>
+#include <irq.h>
+#include <drivers/adc.h>
+#include <drivers/input/input_dev.h>
+#include <sys/util.h>
+#include <sys/byteorder.h>
+#include <board.h>
+#include <soc_pmu.h>
+#include <logging/log.h>
+#include <device.h>
+#include <drivers/gpio.h>
+#include <soc.h>
+#include <string.h>
+#include <drivers/i2c.h>
+//#include <board_cfg.h>
+#include <drivers/uart.h>
+
+LOG_MODULE_REGISTER(sd8563, CONFIG_SYS_LOG_INPUT_DEV_LEVEL);
+
+#define rtc_slaver_addr            (0xA2 >> 1)// 0x51 
+
+//#ifndef CONFIG_MERGE_WORK_Q
+//#define CONFIG_USED_TP_WORK_QUEUE 0
+//#endif
+
+#ifdef CONFIG_USED_TP_WORK_QUEUE
+#define CONFIG_TIMER_WORK_Q_STACK_SIZE 1280
+struct k_work_q timer_drv_q;
+K_THREAD_STACK_DEFINE(timer_work_q_stack, CONFIG_TIMER_WORK_Q_STACK_SIZE);
+#endif
+
+
+struct acts_timer_data {
+	input_notify_t notify;
+	const  struct device *i2c_dev;
+	const  struct device *gpio_dev;
+	const  struct device *this_dev;
+	struct gpio_callback key_gpio_cb;
+	struct k_work init_timer;
+	bool inited;
+#ifdef CONFIG_PM_DEVICE
+	uint32_t pm_state;
+#endif
+};
+
+uint16_t timer_crc[2] __attribute((used)) = {0};
+
+static struct acts_timer_data timer_acts_ddata;
+
+static void _sd8563_read_time(const struct device *i2c_dev);
+
+extern void uart2_poll_out_ch(int c);
+
+#include <drivers/hrtimer.h>
+#if 1
+static struct hrtimer g_rtc_ht_read;
+static void timer_acts_handler(struct k_work *work)
+{
+	static struct acts_timer_data *external_rtc = &timer_acts_ddata;
+    _sd8563_read_time(external_rtc->i2c_dev);  //不在ISR中完成，防止中断嵌套
+}
+K_WORK_DEFINE(timer_acts, timer_acts_handler);
+static void htimer_fun(struct hrtimer *ttimer, void *expiry_fn_arg)
+{
+	//static int t;
+	//static struct acts_timer_data *external_rtc = &timer_acts_ddata;
+	//printk("%d ---htimer--\n", t++);
+	//_sd8563_read_time(external_rtc->i2c_dev);
+	k_work_submit(&timer_acts);  //向系统工作队列提交一个工作项，让工作队列的线程将执行该工作
+}
+
+static void htimer_read(unsigned int ms)
+{
+	hrtimer_init(&g_rtc_ht_read, htimer_fun, NULL);
+	hrtimer_start(&g_rtc_ht_read, 1000*ms, 1000*ms);
+}
+#endif
+
+static void _sd8563_open_write_protection(const struct device *i2c_dev)
+{
+#if 1	
+	static uint8_t write_cmd[2] = {0};
+	static uint8_t read_cmd[7] = {0};
+	int ret = 0;
+
+	printk("_sd8563_read_write_protection\n");
+
+	ret = i2c_write_read(i2c_dev, rtc_slaver_addr, write_cmd, 1, read_cmd, 1);
+	if (ret != 0)
+	{
+	    printk("i2c_write_read ERR\n");
+	}
+
+    printk("CTR1 = %d\n", read_cmd[0]);
+
+	if (read_cmd[0] & 0x40)  //bit6:WRTC=1,write_protection has been opened
+	{
+		printk("write_protection has been opened\n");
+        return; 
+	}
+
+    //open_write_protection: 0E寄存器的bit6~bit2依次写入b0000、b10101、b01010、b10111
+
+    write_cmd[0] = 0x0E;
+    ret = i2c_write_read(i2c_dev, rtc_slaver_addr, write_cmd, 1, read_cmd, 1);
+	if (ret != 0)
+	{
+	    printk("i2c_write_read ERR\n");
+	} 
+
+	read_cmd[0] = (read_cmd[0] & 0x83); 
+
+    //bit6~bit2 write b0000 
+    write_cmd[1] = read_cmd[0];
+
+	ret = i2c_write(i2c_dev, write_cmd, 2, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("step1 i2c write ERR\n");
+		return;
+	}
+	//bit6~bit2 write b10101 
+    write_cmd[1] = read_cmd[0] | 0x54;
+
+	ret = i2c_write(i2c_dev, write_cmd, 2, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("step2 i2c write ERR\n");
+		return;
+	}
+    //bit6~bit2 write b01010 
+    write_cmd[1] = read_cmd[0] | 0x28;
+
+	ret = i2c_write(i2c_dev, write_cmd, 2, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("step3 i2c write ERR\n");
+		return;
+	}
+	//bit6~bit2 write b10111 
+    write_cmd[1] = read_cmd[0] | 0x5C;
+
+	ret = i2c_write(i2c_dev, write_cmd, 2, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("step4 i2c write ERR\n");
+		return;
+	}
+
+	k_msleep(1);
+
+    write_cmd[0] = 0;  //CTR1
+    ret = i2c_write_read(i2c_dev, rtc_slaver_addr, write_cmd, 1, read_cmd, 1);
+	if (ret != 0)
+	{
+	    printk("i2c_write_read ERR\n");
+	}
+
+    printk("CTR1 = %d\n", read_cmd[0]);
+
+	if (read_cmd[0] & 0x40)  //bit6:WRTC=1,write_protection has been opened
+	{
+		printk("write_protection has been opened\n");
+	}
+
+	printk("_sd8563_open_write_protection exit\n");
+#endif	
+}
+
+static int _sd8563_close_write_protection(const struct device *i2c_dev)
+{
+#if 1	
+	static uint8_t write_cmd[2] = {0};
+	static uint8_t read_cmd[7] = {0};
+	int ret = 0;
+
+	printk("_sd8563_read_write_protection\n");
+
+	ret = i2c_write_read(i2c_dev, rtc_slaver_addr, write_cmd, 1, read_cmd, 1);
+	if (ret != 0)
+	{
+	    printk("i2c_write_read ERR\n");
+		return 0;
+	}
+
+    printk("CTR1 = %d\n", read_cmd[0]);
+
+	if ((read_cmd[0] & 0x40) == 0)  //bit6:WRTC = 0,write_protection has been closed
+	{
+		printk("write_protection has been closed\n");
+        return 1; 
+	}
+
+    //close_write_protection: 0E寄存器的bit6~bit2依次写入b0000、b11100、b00011、b01110
+
+    write_cmd[0] = 0x0E;
+    ret = i2c_write_read(i2c_dev, rtc_slaver_addr, write_cmd, 1, read_cmd, 1);
+	if (ret != 0)
+	{
+	    printk("i2c_write_read ERR\n");
+		return 0;
+	} 
+
+	read_cmd[0] = (read_cmd[0] & 0x83); 
+
+    //bit6~bit2 write b0000 
+    write_cmd[1] = read_cmd[0];
+
+	ret = i2c_write(i2c_dev, write_cmd, 2, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("step1 i2c write ERR\n");
+		return 0;
+	}
+	//bit6~bit2 write b11100 
+    write_cmd[1] = read_cmd[0] | 0x70;
+
+	ret = i2c_write(i2c_dev, write_cmd, 2, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("step2 i2c write ERR\n");
+		return 0;
+	}
+    //bit6~bit2 write b00011 
+    write_cmd[1] = read_cmd[0] | 0x0C;
+
+	ret = i2c_write(i2c_dev, write_cmd, 2, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("step3 i2c write ERR\n");
+		return 0;
+	}
+	//bit6~bit2 write b01110 
+    write_cmd[1] = read_cmd[0] | 0x38;
+
+	ret = i2c_write(i2c_dev, write_cmd, 2, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("step4 i2c write ERR\n");
+		return 0;
+	}
+
+	k_msleep(1);
+
+    write_cmd[0] = 0;  //CTR1
+    ret = i2c_write_read(i2c_dev, rtc_slaver_addr, write_cmd, 1, read_cmd, 1);
+	if (ret != 0)
+	{
+	    printk("i2c_write_read ERR\n");
+		return 0;
+	}
+
+    printk("CTR1 = %d\n", read_cmd[0]);
+
+	if ((read_cmd[0] & 0x40) == 0)  //bit6:WRTC = 0,write_protection has been closed
+	{
+		printk("write_protection has been closed\n");
+		return 1;
+	}
+
+	printk("_sd8563_close_write_protection exit\n");
+
+	return 0;
+#else
+    return 1;
+#endif	
+}
+
+static void _sd8563_set_time(const struct device *i2c_dev)
+{
+#if 1	
+	static uint8_t write_cmd[8] = {0};
+	static uint8_t read_cmd[7] = {0};
+	int ret = 0;
+
+	printk("_sd8563_set_time start\n");
+
+    write_cmd[0] = 0x02;  //sec
+	ret = i2c_write_read(i2c_dev, rtc_slaver_addr, write_cmd, 1, read_cmd, 1);
+	if (ret != 0)
+	{
+	    printk("i2c_write_read ERR\n");
+		return;
+	}
+
+    printk("read_cmd[0] = %d\n", read_cmd[0]);
+	if ((read_cmd[0] & 0x80) == 0)  //bit7:0SF/
+	{
+		printk("bit7:0SF is 0,The time has been set\n");
+        return;
+	}
+
+	//BCD code
+    write_cmd[1] = 0;  //sec
+	write_cmd[2] = 0x35;  //min
+	write_cmd[3] = 0x11;  //hour
+	write_cmd[4] = 0x12;  //day
+	write_cmd[5] = 0x06;  //week
+	write_cmd[6] = 0x10;  //mon
+	write_cmd[7] = 0x24;  //year
+
+    ret = i2c_write(i2c_dev, write_cmd, 8, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("i2c write ERR\n");
+		return;
+	}
+
+    k_msleep(1);
+
+	ret = i2c_write_read(i2c_dev, rtc_slaver_addr, write_cmd, 1, read_cmd, 7);
+	if (ret != 0)
+	{
+	    printk("i2c_write_read ERR\n");
+		return;
+	}
+
+	printk("y:20%d, mon:%d, week:%d, d:%d, h:%d, min:%d, sec:%d\n",
+			read_cmd[6], read_cmd[5], read_cmd[4], read_cmd[3], read_cmd[2], read_cmd[1], read_cmd[0]);
+
+    printk("_sd8563_set_time exit\n");
+#endif	
+}
+uint8_t read_time_data[7] = {0};
+static void _sd8563_read_time(const struct device *i2c_dev)
+{
+#if 1	
+    uint8_t i, check_sum = 0x52;
+	static uint8_t write_cmd[1] = {0x02};
+	//static uint8_t read_time_data[7] = {0};
+	int ret = 0;
+
+	printk("_sd8563_read_time\n");
+
+	ret = i2c_write_read(i2c_dev, rtc_slaver_addr, write_cmd, 1, read_time_data, 7);
+	//ret = i2c_burst_read(i2c_dev, rtc_slaver_addr, 0x02, read_cmd, 3);
+	//ret = i2c_read(i2c_dev, read_time_data, 7, rtc_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("i2c_write_read ERR\n");
+	}
+
+	read_time_data[0] = read_time_data[0] & 0x7F; //bit7:0SF/
+	read_time_data[5] = read_time_data[5] & 0x7F; //bit7:C/century
+
+    //uart2 send data start ==============================================//
+    uart2_poll_out_ch(0x5A);  //报文表头
+	uart2_poll_out_ch(0x54);
+
+    for (i = 0; i < 7; i++)
+	{
+		read_time_data[i] = (read_time_data[i] / 16) * 10  + read_time_data[i] % 16;  //DEC TO BCD CODE
+
+		check_sum += read_time_data[i];
+
+		uart2_poll_out_ch(read_time_data[i]);  
+	}
+
+    uart2_poll_out_ch(check_sum);  //checksum
+    //uart2 send data end ==============================================//
+
+	printk("y:20%d, mon:%d, week:%d, d:%d, h:%d, min:%d, sec:%d\n",
+			read_time_data[6], read_time_data[5], read_time_data[4], read_time_data[3], read_time_data[2], read_time_data[1], read_time_data[0]);
+
+#endif	
+}
+
+static void _sd8563_init_work(struct k_work *work)
+{
+	struct acts_timer_data *external_rtc = &timer_acts_ddata;
+
+	printk("sd8563 init work\n");
+
+	external_rtc->inited = true;
+
+	if (_sd8563_close_write_protection(external_rtc->i2c_dev) == 1)
+	{
+		//k_msleep(2);
+
+        _sd8563_set_time(external_rtc->i2c_dev);
+
+        //k_msleep(2);
+
+		_sd8563_open_write_protection(external_rtc->i2c_dev);
+	}
+#if 0
+    uint8_t i;
+
+	for (i=0; i < 20; i++)
+    {
+        k_msleep(1000);
+    
+	    _sd8563_read_time(external_rtc->i2c_dev);
+	}
+#endif    
+	htimer_read(1000);  //1000ms = 1s
+
+	printk("sd8563 init work exit\n");
+}
+
+
+static int _sd8563_acts_init(const struct device *dev)
+{
+	struct acts_timer_data *external_rtc = dev->data;
+
+	printk("sd8563 acts init\n");
+#if 1
+	external_rtc->this_dev = (struct device *)dev;
+
+	external_rtc->i2c_dev = (struct device *)device_get_binding(CONFIG_SD8563_I2C_NAME);
+	if (!external_rtc->i2c_dev) {
+		printk("can not access right i2c device\n");
+		return -1;
+	}
+
+	external_rtc->inited = false;
+
+	k_work_init(&external_rtc->init_timer, _sd8563_init_work);
+
+#ifdef CONFIG_USED_TP_WORK_QUEUE
+	k_work_queue_start(&timer_drv_q, timer_work_q_stack, K_THREAD_STACK_SIZEOF(timer_work_q_stack), 7, NULL);
+	k_work_submit_to_queue(&timer_drv_q, &external_rtc->init_timer);
+#else
+	k_work_submit(&external_rtc->init_timer);
+#endif
+#endif
+
+	printk("sd8563 acts init exit\n");
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_DEVICE
+static void _sd8563_suspend(const struct device *dev)
+{
+	//struct acts_timer_data *external_rtc = (struct acts_timer_data *)dev->data;
+
+    printk("sd8563 suspend\n");
+
+    hrtimer_stop(&g_rtc_ht_read);
+}
+static void _sd8563_resume(const struct device *dev)
+{
+	struct acts_timer_data *external_rtc = (struct acts_timer_data *)dev->data;
+
+    external_rtc->i2c_dev = (struct device *)device_get_binding(CONFIG_SD8563_I2C_NAME);
+	if (!external_rtc->i2c_dev) {
+		printk("can not access right i2c device\n");
+		return;
+	}
+
+	external_rtc->inited = false;
+
+	k_work_init(&external_rtc->init_timer, _sd8563_init_work);
+
+    printk("sd8563 resume\n");
+#ifdef CONFIG_USED_TP_WORK_QUEUE
+	k_work_submit_to_queue(&tp_drv_q, &external_rtc->init_timer);
+#else
+	k_work_submit(&external_rtc->init_timer);
+#endif
+
+}
+
+static int _sd8563_pm_control(const struct device *dev,  enum pm_device_action action)
+{
+	int ret = 0;
+	
+    //printk("sd8563 pm control\n");
+
+	switch (action) {
+	case PM_DEVICE_ACTION_SUSPEND:
+
+		break;
+	case PM_DEVICE_ACTION_RESUME:
+		break;
+	case PM_DEVICE_ACTION_EARLY_SUSPEND:
+		_sd8563_suspend(dev);
+		break;
+	case PM_DEVICE_ACTION_LATE_RESUME:
+		_sd8563_resume(dev);
+		break;
+	default:
+		break;
+	}
+
+	return ret;
+}
+#else /* CONFIG_PM_DEVICE */
+static int _sd8563_pm_control(const struct device *dev, uint32_t ctrl_command,
+				 void *context, device_pm_cb cb, void *arg)
+{
+
+}
+#endif
+
+#if IS_ENABLED(CONFIG_SD8563)
+DEVICE_DEFINE(sd8563, CONFIG_SD8563_DEV_NAME, _sd8563_acts_init,
+			_sd8563_pm_control, &timer_acts_ddata, NULL, POST_KERNEL,
+			50, NULL);
+#endif

zephyr/drivers/input/sgm832a_acts.c

@@ -0,0 +1,433 @@
+ /*
+ * Copyright (c) 2024 Wingcool Technology Co., Ltd
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief SGM832A Timer driver for Actions SoC
+ */
+
+#include <errno.h>
+#include <kernel.h>
+#include <string.h>
+//#include <stdbool.h>
+#include <init.h>
+#include <irq.h>
+#include <drivers/adc.h>
+#include <drivers/input/input_dev.h>
+#include <sys/util.h>
+#include <sys/byteorder.h>
+#include <board.h>
+#include <soc_pmu.h>
+#include <logging/log.h>
+#include <device.h>
+#include <drivers/gpio.h>
+#include <soc.h>
+#include <string.h>
+#include <drivers/i2c.h>
+//#include <board_cfg.h>
+#include <drivers/uart.h>
+
+LOG_MODULE_REGISTER(sgm832a, CONFIG_SYS_LOG_INPUT_DEV_LEVEL);
+
+#define sgm832_typec0_slaver_addr            (0x8A >> 1) 
+#define sgm832_typec1_slaver_addr            (0x82 >> 1) 
+
+//sgm832 Register Address
+#define CONFIGURATION_REGISTER    0x00
+#define SHUNT_VOLTAGE_REGISTER    0x01
+#define BUS_VOLTAGE_REGISTER      0x02
+#define POWER_REGISTER            0x03
+#define CURRENT_REGISTER          0x04
+#define CALIBRATION_REGISTER      0x05
+#define MASK_ENABLE_REGISTER      0x06
+#define ALERT_LIMIT_REGISTER      0x07
+#define MANUFACTURER_ID_REGISTER  0xFE
+#define DIE_ID_REGISTER           0xFF
+
+//#ifndef CONFIG_MERGE_WORK_Q
+//#define CONFIG_USED_TP_WORK_QUEUE 0
+//#endif
+
+#ifdef CONFIG_USED_TP_WORK_QUEUE
+#define CONFIG_TIMER_WORK_Q_STACK_SIZE 1280
+struct k_work_q timer_drv_q;
+K_THREAD_STACK_DEFINE(timer_work_q_stack, CONFIG_TIMER_WORK_Q_STACK_SIZE);
+#endif
+
+
+struct acts_sgm_data {
+	input_notify_t notify;
+	const  struct device *i2c_dev;
+	const  struct device *gpio_dev;
+	const  struct device *this_dev;
+	struct gpio_callback key_gpio_cb;
+	struct k_work init_timer;
+	bool inited;
+#ifdef CONFIG_PM_DEVICE
+	uint32_t pm_state;
+#endif
+};
+
+uint16_t sgm_crc[2] __attribute((used)) = {0};
+
+static struct acts_sgm_data sgm_acts_ddata;
+
+static void sgm832_typec_get_data(const struct device *i2c_dev, uint16_t sgm832_typec_slaver_addr, uint8_t typec_num);
+//static void sgm832_typec1_get_data(const struct device *i2c_dev);
+
+extern void uart2_poll_out_ch(int c);
+
+#include <drivers/hrtimer.h>
+#if 1
+static struct hrtimer g_sgm_ht_read;
+static void sgm832_acts_handler(struct k_work *work)
+{
+	static struct acts_sgm_data *power_consumption = &sgm_acts_ddata;
+    sgm832_typec_get_data(power_consumption->i2c_dev, sgm832_typec0_slaver_addr, 0);  //不在ISR中完成，防止中断嵌套
+	sgm832_typec_get_data(power_consumption->i2c_dev, sgm832_typec1_slaver_addr, 1);  //不在ISR中完成，防止中断嵌套
+	//sgm832_typec1_get_data(power_consumption->i2c_dev);  //不在ISR中完成，防止中断嵌套
+}
+K_WORK_DEFINE(sgm832_acts, sgm832_acts_handler);
+static void htimer_fun(struct hrtimer *ttimer, void *expiry_fn_arg)
+{
+	//static int t;
+	//printk("%d ---htimer--\n", t++);
+	k_work_submit(&sgm832_acts);  //向系统工作队列提交一个工作项，让工作队列的线程将执行该工作
+}
+
+static void htimer_read(unsigned int ms)
+{
+	hrtimer_init(&g_sgm_ht_read, htimer_fun, NULL);
+	hrtimer_start(&g_sgm_ht_read, 1000*ms, 1000*ms);
+}
+#endif
+float f_ShuntVoltage[2] = {0.0}, f_BusVoltage[2] = {0.0}, f_Power[2] = {0.0}, f_Current[2] = {0.0};
+static void sgm832_typec_get_data(const struct device *i2c_dev, uint16_t sgm832_typec_slaver_addr, uint8_t typec_num)
+{
+#if 1	
+    //uint8_t i;
+	//float f_ShuntVoltage = 0.0, f_BusVoltage = 0.0, f_Power = 0.0, f_Current = 0.0;
+    //uint16_t u16_ShuntVoltage;
+	static uint8_t write_cmd[10] = {CONFIGURATION_REGISTER, SHUNT_VOLTAGE_REGISTER, 
+								   BUS_VOLTAGE_REGISTER, POWER_REGISTER,           
+                                   CURRENT_REGISTER, CALIBRATION_REGISTER,
+                                   MASK_ENABLE_REGISTER, ALERT_LIMIT_REGISTER,
+								   MANUFACTURER_ID_REGISTER, DIE_ID_REGISTER};
+	static uint16_t read_data[1] = {0};
+	int ret = 0;
+
+	printk("sgm832 typec%d get data\n", typec_num);
+
+    //00H Configuartion Register
+	ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, write_cmd, 1, read_data, 2);
+	if (ret != 0)
+	{
+	    printk("sgm832 typec%d i2c_write_read Configuartion Register ERR\n", typec_num);
+	}
+	
+	read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+	printk("ConfigReg: 0x%04x\n", read_data[0]);
+
+    //01H Shunt Voltage Register
+	ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, &write_cmd[1], 1, read_data, 2);
+	if (ret == 0)
+	{
+		read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+	    if (read_data[0] & 0x8000) {
+            // Sign-extend for negative ShuntVoltage
+            read_data[0] = ~read_data[0] + 1;
+        }
+
+        f_ShuntVoltage[typec_num] = read_data[0] * 2.5 * 0.001;
+	}
+	else
+	{
+		printk("sgm832 typec%d i2c_write_read Shunt_Voltage ERR\n", typec_num);
+	}
+    printk("Shunt_Voltage: %.4f mV\n", f_ShuntVoltage[typec_num]);
+	//printk("ConfigReg: 0x%04x, ShuntVoltage: %.4f mV, BusVoltage: %.3f V, Power: 0x%04x, Current: 0x%04x, Calibration: 0x%04x, MaskEnable: 0x%04x, AlertLimit: 0x%04x\n",
+	//		read_data[0], f_ShuntVoltage, f_BusVoltage, read_data[3], read_data[4], read_data[5], read_data[6], read_data[7]);
+
+    //02H Bus Voltage Register
+    ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, &write_cmd[2], 1, read_data, 2);
+	if (ret != 0)
+	{
+	    printk("sgm832 typec%d i2c_write_read Bus Voltage Register ERR\n", typec_num);
+	}
+
+    read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+    f_BusVoltage[typec_num] = (float)read_data[0] * 1.25 * 0.001;
+	
+	printk("Bus_Voltage: %.3f V\n", f_BusVoltage[typec_num]);
+
+    //03H Power Register
+    ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, &write_cmd[3], 1, read_data, 2);
+	if (ret != 0)
+	{
+	    printk("sgm832 typec%d i2c_write_read Power Register ERR\n", typec_num);
+	}
+
+	read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+	f_Power[typec_num] = (float)read_data[0] * 25 * 0.001;
+	printk("Power: %.3f mW\n", f_Power[typec_num]);
+
+	//04H Current Register
+    ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, &write_cmd[4], 1, read_data, 2);
+	if (ret == 0)
+	{
+		read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+	    if (read_data[0] & 0x8000) {
+            // Sign-extend for negative Current
+            read_data[0] = ~read_data[0] + 1;
+        }
+
+		f_Current[typec_num] = read_data[0] * 0.001;
+	}
+	else
+	{
+		printk("sgm832 typec%d i2c_write_read Current Register ERR\n", typec_num);
+	}
+	printk("Current: %.3f mA\n", f_Current[typec_num]);
+
+	//05H Calibration Register
+    ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, &write_cmd[5], 1, read_data, 2);
+	if (ret != 0)
+	{
+	    printk("sgm832 typec%d i2c_write_read Calibration Register ERR\n", typec_num);
+	}
+
+	read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+	printk("Calibration: 0x%04x\n", read_data[0]);
+
+	//06H Mask/Enable Register
+    ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, &write_cmd[6], 1, read_data, 2);
+	if (ret != 0)
+	{
+	    printk("sgm832 typec%d i2c_write_read Mask/Enable Register ERR\n", typec_num);
+	}
+
+	read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+	printk("Mask/Enable: 0x%04x\n", read_data[0]);
+
+	//07H AlertLimit Register
+    ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, &write_cmd[7], 1, read_data, 2);
+	if (ret != 0)
+	{
+	    printk("sgm832 typec%d i2c_write_read AlertLimit Register ERR\n", typec_num);
+	}
+
+	read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+	printk("AlertLimit: 0x%04x\n", read_data[0]);
+
+    //FEH Manufacturer ID Register
+    ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, &write_cmd[8], 1, read_data, 2);
+	if (ret != 0)
+	{
+	    printk("sgm832 typec%d i2c_write_read Manufacturer ID Register ERR\n", typec_num);
+	}
+
+	read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+	printk("Manufacturer_ID: 0x%04x\n", read_data[0]);
+
+    //FFH Die ID Register
+	ret = i2c_write_read(i2c_dev, sgm832_typec_slaver_addr, &write_cmd[9], 1, read_data, 2);
+	if (ret != 0)
+	{
+	    printk("sgm832 typec%d i2c_write_read Die ID Register ERR\n", typec_num);
+	}
+
+	read_data[0] = ((read_data[0]  & 0xFF00) >> 8) + ((read_data[0] & 0x00FF) << 8);
+	printk("Die_ID: 0x%04x\n", read_data[0]);		
+
+#endif	
+}
+#if 0
+static void sgm832_typec1_get_shuntvoltage(const struct device *i2c_dev)
+{
+#if 1	
+    //uint8_t i;
+	float f_ShuntVoltage = 0.0, f_BusVoltage = 0.0;
+    //uint16_t u16_ShuntVoltage;
+	static uint8_t write_cmd[2] = {CONFIGURATION_REGISTER, MANUFACTURER_ID_REGISTER};
+	static uint16_t read_data[8] = {0};
+	int ret = 0;
+
+	printk("sgm832 typec1 get data\n");
+
+	ret = i2c_write_read(i2c_dev, sgm832_typec1_slaver_addr, write_cmd, 1, read_data, sizeof(read_data));
+	//ret = i2c_burst_read(i2c_dev, sgm832_typec1_slaver_addr, CONFIGURATION_REGISTER, read_data, sizeof(read_data));
+	//ret = i2c_read(i2c_dev, read_data, 7, sgm832_typec1_slaver_addr);
+	if (ret == 0)
+	{
+	    if (read_data[1] & 0x8000) {
+            // Sign-extend for negative ShuntVoltage
+            read_data[1] = ~read_data[1] + 1;
+            //printf( "ShuntVoltage: 0x%04x\n", u16_ShuntVoltage);
+            f_ShuntVoltage = read_data[1] * 2.5 * 0.001;
+        }
+        else {
+            f_ShuntVoltage = read_data[1] * 2.5 * 0.001;
+        }
+      
+        //read_data[2] = ((read_data[2]  & 0xFF00) >> 8) + ((read_data[2] & 0x00FF) << 8);
+        f_BusVoltage = (float)read_data[2] * 1.25 * 0.001;
+		
+		//uart2_poll_out_ch(read_data[i]);  //uart2 send data
+	}
+	else
+	{
+		printk("sgm832 typec1 i2c_write_read ERR\n");
+	}
+
+	printk("ConfigReg: 0x%04x, ShuntVoltage: %.4f mV, BusVoltage: %.3f V, Power: 0x%04x, Current: 0x%04x, Calibration: 0x%04x, MaskEnable: 0x%04x, AlertLimit: 0x%04x\n",
+			read_data[0], f_ShuntVoltage, f_BusVoltage, read_data[3], read_data[4], read_data[5], read_data[6], read_data[7]);
+
+    ret = i2c_write_read(i2c_dev, sgm832_typec1_slaver_addr, &write_cmd[1], 1, read_data, 4);
+	//ret = i2c_burst_read(i2c_dev, sgm832_typec1_slaver_addr, CONFIGURATION_REGISTER, read_data, sizeof(read_data));
+	//ret = i2c_read(i2c_dev, read_data, 7, sgm832_typec1_slaver_addr);
+	if (ret == 0)
+	{
+	    
+	}
+	else
+	{
+		printk("sgm832 typec1 i2c_write_read ERR\n");
+	}
+
+	printk("ManufacturerID: 0x%04x, DieID: 0x%04x\n",
+			read_data[0], read_data[1]);
+
+#endif	
+}
+#endif
+
+static void sgm832_typec_calibration(const struct device *i2c_dev, uint16_t sgm832_typec_slaver_addr, uint8_t typec_num)
+{
+    static uint8_t write_data[3] = {CALIBRATION_REGISTER, 0x0A, 0};
+    int ret = 0;
+
+	ret = i2c_write(i2c_dev, write_data, 3, sgm832_typec_slaver_addr);
+	if (ret != 0)
+	{
+	    printk("i2c write sgm832_typec%d Calibration Register ERR\n", typec_num);
+	}
+}
+
+static void _sgm832a_init_work(struct k_work *work)
+{
+	struct acts_sgm_data *power_consumption = &sgm_acts_ddata;
+	
+	printk("sgm832a init work\n");
+
+	power_consumption->inited = true;
+
+    //write Calibration Register
+	sgm832_typec_calibration(power_consumption->i2c_dev, sgm832_typec0_slaver_addr, 0);
+    sgm832_typec_calibration(power_consumption->i2c_dev, sgm832_typec1_slaver_addr, 1);
+   
+	htimer_read(1000);  //1000ms = 1s
+}
+
+static int _sgm832a_acts_init(const struct device *dev)
+{
+	struct acts_sgm_data *power_consumption = dev->data;
+
+	printk("sgm832a acts init\n");
+#if 1
+	power_consumption->this_dev = (struct device *)dev;
+
+	power_consumption->i2c_dev = (struct device *)device_get_binding(CONFIG_SGM832A_I2C_NAME);
+	if (!power_consumption->i2c_dev) {
+		printk("can not access right i2c device\n");
+		return -1;
+	}
+
+	power_consumption->inited = false;
+
+	k_work_init(&power_consumption->init_timer, _sgm832a_init_work);
+
+#ifdef CONFIG_USED_TP_WORK_QUEUE
+	k_work_queue_start(&timer_drv_q, timer_work_q_stack, K_THREAD_STACK_SIZEOF(timer_work_q_stack), 7, NULL);
+	k_work_submit_to_queue(&timer_drv_q, &power_consumption->init_timer);
+#else
+	k_work_submit(&power_consumption->init_timer);
+#endif
+#endif
+
+	printk("sgm832a acts init exit\n");
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_DEVICE
+static void _sgm832a_suspend(const struct device *dev)
+{
+	//struct acts_sgm_data *power_consumption = (struct acts_sgm_data *)dev->data;
+
+    printk("sgm832a suspend\n");
+
+    hrtimer_stop(&g_sgm_ht_read);
+}
+static void _sgm832a_resume(const struct device *dev)
+{
+	struct acts_sgm_data *power_consumption = (struct acts_sgm_data *)dev->data;
+
+    power_consumption->i2c_dev = (struct device *)device_get_binding(CONFIG_SGM832A_I2C_NAME);
+	if (!power_consumption->i2c_dev) {
+		printk("can not access right i2c device\n");
+		return;
+	}
+
+	power_consumption->inited = false;
+
+	k_work_init(&power_consumption->init_timer, _sgm832a_init_work);
+
+    printk("sgm832a resume\n");
+#ifdef CONFIG_USED_TP_WORK_QUEUE
+	k_work_submit_to_queue(&tp_drv_q, &power_consumption->init_timer);
+#else
+	k_work_submit(&power_consumption->init_timer);
+#endif
+
+}
+
+static int _sgm832a_pm_control(const struct device *dev,  enum pm_device_action action)
+{
+	int ret = 0;
+	
+    //printk("sgm832a pm control\n");
+
+	switch (action) {
+	case PM_DEVICE_ACTION_SUSPEND:
+
+		break;
+	case PM_DEVICE_ACTION_RESUME:
+		break;
+	case PM_DEVICE_ACTION_EARLY_SUSPEND:
+		_sgm832a_suspend(dev);
+		break;
+	case PM_DEVICE_ACTION_LATE_RESUME:
+		_sgm832a_resume(dev);
+		break;
+	default:
+		break;
+	}
+
+	return ret;
+}
+#else /* CONFIG_PM_DEVICE */
+static int _sgm832a_pm_control(const struct device *dev, uint32_t ctrl_command,
+				 void *context, device_pm_cb cb, void *arg)
+{
+
+}
+#endif
+
+#if IS_ENABLED(CONFIG_SGM832A)
+DEVICE_DEFINE(sgm832a, CONFIG_SGM832A_DEV_NAME, _sgm832a_acts_init,
+			_sgm832a_pm_control, &sgm_acts_ddata, NULL, POST_KERNEL,
+			50, NULL);
+#endif

zephyr/drivers/serial/Kconfig.acts

@@ -125,3 +125,43 @@ config UART_ACTS_PORT_1_PRIORITY
 	help
 	  Port 1 device driver initialization priority.
 
+# ---------- Port 2 ----------
+
+menuconfig UART_ACTS_PORT_2
+	bool "Enable Actions SoC UART Port 2"
+	default n
+	depends on UART_ACTS
+	help
+	  This tells the driver to configure the UART port at boot, depending on
+	  the additional configure options below.
+
+config UART_ACTS_PORT_2_NAME
+	string "Port 2 Device Name"
+	default "UART_2"
+	depends on UART_ACTS_PORT_2
+	help
+	  This is the device name for UART, and is included in the device
+	  struct. 
+
+config UART_ACTS_PORT_2_BAUD_RATE
+	int "Port 2 Baud Rate"
+	default 115200
+	depends on UART_ACTS_PORT_2
+	help
+	  The baud rate for UART port to be set to at boot.
+
+	  Leave at 0 to skip initialization.
+
+config UART_ACTS_PORT_2_IRQ_PRIORITY
+	int "Port 2 Interrupt Priority"
+	default 1
+	depends on UART_ACTS_PORT_2
+	help
+	  Port 2 Interrupt Priority
+
+config UART_ACTS_PORT_2_PRIORITY
+	int "Port 2 Init priority"
+	default 20
+	depends on UART_ACTS_PORT_2
+	help
+	  Port 2 device driver initialization priority.

zephyr/include/drivers/cfg_drv/pinctrl_lark.h

@@ -43,8 +43,8 @@
 #define I2C_MFP_CFG(x)	(GPIO_CTL_MFP(x)|GPIO_CTL_PULLUP|GPIO_CTL_PADDRV_LEVEL(3))
 
 
-#define gpio22_i2c0_clk_node	PIN_MFP_SET(22, I2C_MFP_CFG(MFP0_I2C))
-#define gpio23_i2c0_data_node	PIN_MFP_SET(23, I2C_MFP_CFG(MFP0_I2C))
+#define gpio74_i2c0_clk_node	PIN_MFP_SET(74, I2C_MFP_CFG(MFP0_I2C))
+#define gpio22_i2c0_data_node	PIN_MFP_SET(22, I2C_MFP_CFG(MFP0_I2C))
 
 #define gpio24_i2c0_clk_node	PIN_MFP_SET(24, I2C_MFP_CFG(MFP0_I2C))
 #define gpio25_i2c0_data_node	PIN_MFP_SET(25, I2C_MFP_CFG(MFP0_I2C))
@@ -251,6 +251,8 @@
 #define UART2_MFP_CFG (GPIO_CTL_MFP(UART2_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PULLUP_STRONG | GPIO_CTL_PADDRV_LEVEL(4))
 #define gpio53_uart2_tx_node		PIN_MFP_SET(53, UART2_MFP_CFG)
 #define gpio54_uart2_rx_node		PIN_MFP_SET(54, UART2_MFP_CFG)
+#define gpio26_uart2_tx_node		PIN_MFP_SET(26, UART2_MFP_CFG)
+#define gpio27_uart2_rx_node		PIN_MFP_SET(27, UART2_MFP_CFG)
 
 
 /* SPDIFTX */

zephyr/include/drivers/cfg_drv/pinctrl_leopard.h

@@ -47,8 +47,8 @@
 #define I2C_MFP_CFG(x)	(GPIO_CTL_MFP(x)|GPIO_CTL_PULLUP_4K7|GPIO_CTL_PADDRV_LEVEL(3))
 
 
-#define gpio22_i2c0_clk_node	PIN_MFP_SET(22, I2C_MFP_CFG(MFP0_I2C))
-#define gpio23_i2c0_data_node	PIN_MFP_SET(23, I2C_MFP_CFG(MFP0_I2C))
+#define gpio74_i2c0_clk_node	PIN_MFP_SET(74, I2C_MFP_CFG(MFP0_I2C))
+#define gpio22_i2c0_data_node	PIN_MFP_SET(22, I2C_MFP_CFG(MFP0_I2C))
 
 #define gpio24_i2c0_clk_node	PIN_MFP_SET(24, I2C_MFP_CFG(MFP0_I2C))
 #define gpio25_i2c0_data_node	PIN_MFP_SET(25, I2C_MFP_CFG(MFP0_I2C))
@@ -260,6 +260,8 @@
 #define UART2_MFP_CFG (GPIO_CTL_MFP(UART2_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PULLUP_STRONG | GPIO_CTL_PADDRV_LEVEL(4))
 #define gpio53_uart2_tx_node		PIN_MFP_SET(53, UART2_MFP_CFG)
 #define gpio54_uart2_rx_node		PIN_MFP_SET(54, UART2_MFP_CFG)
+#define gpio26_uart2_tx_node		PIN_MFP_SET(26, UART2_MFP_CFG)
+#define gpio27_uart2_rx_node		PIN_MFP_SET(27, UART2_MFP_CFG)
 
 
 /* SPDIFTX */

zephyr/soc/arm/actions/leopard/soc_sleep.c

@@ -147,7 +147,7 @@ static const uint32_t backup_regs_gpio[] = {
 	/*heart_rate meter*/
 	GPION_CTL(18), /*i2cmt0 clk*/
 	GPION_CTL(19), /*i2cmt0 dat*/
-	GPION_CTL(74), /*int*/
+	GPION_CTL(63), /*int*/
 #endif
 
 #if 0