dev_leopard.h 3.5 KB

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  1. /*
  2. * Copyright (c) 2020 Linaro Limited
  3. * SPDX-License-Identifier: Apache-2.0
  4. */
  5. #ifndef DEV_LEOPARD_H_
  6. #define DEV_LEOPARD_H_
  7. /*
  8. dma cfg
  9. */
  10. #define CONFIG_DMA_0_NAME "DMA_0"
  11. #define CONFIG_DMA_0_PCHAN_NUM 10
  12. #define CONFIG_DMA_0_VCHAN_NUM 10
  13. #define CONFIG_DMA_0_VCHAN_PCHAN_NUM 6
  14. #define CONFIG_DMA_0_VCHAN_PCHAN_START 4
  15. /*
  16. pwm cfg
  17. */
  18. #define CONFIG_PWM_CHANS 4
  19. /*
  20. DSP cfg
  21. */
  22. #define CONFIG_DSP_NAME "DSP"
  23. /*
  24. ANC cfg
  25. */
  26. #define CONFIG_ANC_NAME "anc"
  27. /*
  28. BTC cfg
  29. */
  30. #define CONFIG_BTC_NAME "BTC"
  31. /*
  32. * Audio cfg
  33. */
  34. #ifndef CONFIG_AUDIO_OUT_ACTS_DEV_NAME
  35. #define CONFIG_AUDIO_OUT_ACTS_DEV_NAME "audio_out"
  36. #endif
  37. #ifndef CONFIG_AUDIO_IN_ACTS_DEV_NAME
  38. #define CONFIG_AUDIO_IN_ACTS_DEV_NAME "audio_in"
  39. #endif
  40. /*
  41. * DSP cfg
  42. */
  43. #ifndef CONFIG_DSP_ACTS_DEV_NAME
  44. #define CONFIG_DSP_ACTS_DEV_NAME "dsp_acts"
  45. #endif
  46. /*
  47. PMUADC cfg
  48. */
  49. #define PMUADC_ID_CHARGI (0)
  50. #define PMUADC_ID_BATV (1)
  51. #define PMUADC_ID_DC5V (2)
  52. #define PMUADC_ID_SENSOR (3)
  53. #define PMUADC_ID_SVCC (4)
  54. #define PMUADC_ID_LRADC1 (5)
  55. #define PMUADC_ID_LRADC2 (6)
  56. #define PMUADC_ID_LRADC3 (7)
  57. #define PMUADC_ID_LRADC4 (8)
  58. #define PMUADC_ID_LRADC5 (9)
  59. #define PMUADC_ID_LRADC6 (10)
  60. #define PMUADC_ID_LRADC7 (11)
  61. /**
  62. * LCD panel cfg (sync drivers/display/display_controller.h and drivers/display.h)
  63. */
  64. /* Enumeration with possible display major port type */
  65. #define PANEL_PORT_Unknown (0)
  66. #define PANEL_PORT_MCU (1)
  67. #define PANEL_PORT_TR (2)
  68. #define PANEL_PORT_SPI (4)
  69. /* Enumeration with possible display mcu port type */
  70. #define PANEL_MCU_8080 (0) /* Intel 8080 */
  71. #define PANEL_MCU_6800 (1) /* Moto 6800 */
  72. /* Enumeration with possible display spi port type */
  73. #define PANEL_SPI_3LINE_1 (0)
  74. #define PANEL_SPI_3LINE_2 (1)
  75. #define PANEL_SPI_4LINE_1 (2)
  76. #define PANEL_SPI_4LINE_2 (3)
  77. #define PANEL_QSPI (4)
  78. #define PANEL_QSPI_SYNC (5)
  79. #define PANEL_QSPI_DDR_0 (6)
  80. #define PANEL_QSPI_DDR_1 (7)
  81. #define PANEL_QSPI_DDR_2 (8)
  82. /* Enumeration of full port type */
  83. #define PANEL_PORT_TYPE(major, minor) (((major) << 8) | (minor))
  84. #define PANEL_PORT_MCU_8080 PANEL_PORT_TYPE(PANEL_PORT_MCU, PANEL_MCU_8080)
  85. #define PANEL_PORT_MCU_6800 PANEL_PORT_TYPE(PANEL_PORT_MCU, PANEL_MCU_6800)
  86. #define PANEL_PORT_SPI_3LINE_1 PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_SPI_3LINE_1)
  87. #define PANEL_PORT_SPI_3LINE_2 PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_SPI_3LINE_2)
  88. #define PANEL_PORT_SPI_4LINE_1 PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_SPI_4LINE_1)
  89. #define PANEL_PORT_SPI_4LINE_2 PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_SPI_4LINE_2)
  90. #define PANEL_PORT_QSPI PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI)
  91. #define PANEL_PORT_QSPI_SYNC PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI_SYNC)
  92. #define PANEL_PORT_QSPI_DDR_0 PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI_DDR_0)
  93. #define PANEL_PORT_QSPI_DDR_1 PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI_DDR_1)
  94. #define PANEL_PORT_QSPI_DDR_2 PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI_DDR_2)
  95. /* Enumeration with possible display TR port type */
  96. #define PANEL_PORT_TR_LCD PANEL_PORT_TYPE(PANEL_PORT_TR, 0)
  97. /* Display pixel format enumeration. */
  98. #define PANEL_PIXEL_FORMAT_RGB_888 (0x1 << 0)
  99. #define PANEL_PIXEL_FORMAT_ARGB_8888 (0x1 << 3)
  100. #define PANEL_PIXEL_FORMAT_RGB_565 (0x1 << 4)
  101. #define PANEL_PIXEL_FORMAT_BGR_565 (0x1 << 5)
  102. #define PANEL_PIXEL_FORMAT_BGR_888 (0x1 << 6)
  103. #define PANEL_PIXEL_FORMAT_XRGB_8888 (0x1 << 7)
  104. #endif /* DEV_LEOPARD_H_ */