capture_controller.c 11 KB

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  1. /*
  2. * Copyright (c) 2017 Actions Semiconductor Co., Ltd
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. /**
  7. * @file
  8. * @brief TP Keyboard driver for Actions SoC
  9. */
  10. #include <errno.h>
  11. #include <kernel.h>
  12. #include <string.h>
  13. #include <init.h>
  14. #include <irq.h>
  15. #include <drivers/adc.h>
  16. #include <drivers/input/input_dev.h>
  17. #include <sys/util.h>
  18. #include <sys/byteorder.h>
  19. #include <board.h>
  20. #include <soc_pmu.h>
  21. #include <logging/log.h>
  22. #include <device.h>
  23. #include <drivers/gpio.h>
  24. #include <soc.h>
  25. #include <string.h>
  26. LOG_MODULE_REGISTER(quad_decoder, CONFIG_SYS_LOG_INPUT_DEV_LEVEL);
  27. #define DT_DRV_COMPAT actions_capture
  28. /* capture ctl reg */
  29. #define CAP_CTL_FIFO_LEV_IRQ_SEL_(X) (X << 31)
  30. #define CAP_CTL_FIFO_LEV_IRQ_SEL_4BYTE CAP_CTL_FIFO_LEV_IRQ_SEL_(1)
  31. #define CAP_CTL_FIFO_LEV_IRQ_SEL_1BYTE CAP_CTL_FIFO_LEV_IRQ_SEL_(0)
  32. #define CAP_CTL_FIFO_LEV_IRQ_EN (1 << 30)
  33. #define CAP_CTL_CC_IRQ_EN (1 << 26)
  34. #define CAP_CTL_INLEVEL (1 << 24)
  35. #define CAP_CTL_SS (1 << 5)
  36. #define CAP_CTL_ES_SEL(X) (X << 3)
  37. #define CAP_CTL_RISE_EDGE CAP_CTL_ES_SEL(0)
  38. #define CAP_CTL_FALLING_EDGE CAP_CTL_ES_SEL(1)
  39. #define CAP_CTL_BOTH_EDGE CAP_CTL_ES_SEL(2)
  40. #define CAP_CTL_MS_SEL(X) (X << 1)
  41. #define CAP_CTL_COUNTER_MODE CAP_CTL_MS_SEL(0)
  42. #define CAP_CTL_CAPTURE_MODE CAP_CTL_MS_SEL(1)
  43. #define CAP_CTL_TIMER_MODE CAP_CTL_MS_SEL(2)
  44. #define CAP_CTL_EN (1 << 0)
  45. /* capture cnt reg */
  46. #define CAP_CNT_RE_SEL_(X) (X << 15)
  47. #define CAP_CNT_FALLING_EDGE CAP_CNT_RE_SEL_(0)
  48. #define CAP_CNT_RISEING_EDGE CAP_CNT_RE_SEL_(1)
  49. #define CAP_CNT_CNT(X) (X << 0)
  50. /* capture sta reg */
  51. #define CAP_STA_FIFO1_ERR (1 << 24)
  52. #define CAP_STA_C1_OVF (1 << 23)
  53. #define CAP_STA_RXFL1 (20)//20~22 READ
  54. #define CAP_STA_RXFF1 (1 << 19)
  55. #define CAP_STA_RXFE1 (1 << 18)
  56. #define CAP_STA_FF_LEV_PD1 (1 << 17)
  57. #define CAP_STA_CT_PD1 (1 << 16)
  58. #define CAP_STA_FIFO0_ERR (1 << 8)
  59. #define CAP_STA_C0_OVF (1 << 7)
  60. #define CAP_STA_RXFL0 (4)//4~6 READ
  61. #define CAP_STA_RXFF0 (1 << 3)
  62. #define CAP_STA_RXFE0 (1 << 2)
  63. #define CAP_STA_FF_LEV_PD0 (1 << 1)
  64. #define CAP_STA_CT_PD0 (1 << 0)
  65. /* capture dbc ctl */
  66. #define CAP_DBC_CTL_DBC1(X) (X << 24)
  67. #define CAP_DBC_CTL_DB_EN1 (1 << 16)
  68. #define CAP_DBC_CTL_DBC0(X) (X << 8)
  69. #define CAP_DBC_CTL_DB_EN0 (1 << 0)
  70. /* capture demod ctl */
  71. #define CAP_DEM_CTL_INPUT_INV (1 << 10)
  72. #define CAP_DEM_CTL_DC_IRQ_EN (1 << 9)
  73. #define CAP_DEM_CTL_SPACE_ERR_IRQ_EN (1 << 8)
  74. #define CAP_DEM_CTL_MC(X) (X << 3)
  75. #define CAP_DEM_CTL_MC_VAL(val) ((val & 0x78) >> 3)
  76. #define CAP_DEM_CTL_LC(X) (X << 1)
  77. #define CAP_DEM_CTL_EN (1 << 0)
  78. /* capture demod sta */
  79. #define CAP_DEM_STA_DC_PD0 (1 << 1)
  80. #define CAP_DEM_STA_SPACE_ERR_PD0 (1 << 0)
  81. struct capture_acts_controller {
  82. volatile uint32_t capture0_ctl;
  83. volatile uint32_t capture0_cnt;
  84. volatile uint32_t capture0_val;
  85. volatile uint32_t reserve_1[5];
  86. volatile uint32_t capture1_ctl;
  87. volatile uint32_t capture1_cnt;
  88. volatile uint32_t capture1_val;
  89. volatile uint32_t reserve_2[1];
  90. volatile uint32_t capture_sta;
  91. volatile uint32_t reserve_3[3];
  92. volatile uint32_t capture_dbc_ctl;
  93. volatile uint32_t capture_demod_ctl;
  94. volatile uint32_t capture_demod_sta;
  95. volatile uint32_t capture_demod_timeout;
  96. volatile uint32_t capture_measure_cnt;
  97. volatile uint32_t capture_measure_high_cnt;
  98. };
  99. struct acts_capture_data {
  100. input_notify_t notify;
  101. struct k_delayed_work timer;
  102. const struct device *this_dev;
  103. u32_t capture_data[100];
  104. u32_t byte_cnt;
  105. u32_t carrier_rate;//khz
  106. };
  107. struct acts_capture_config {
  108. struct capture_acts_controller *base;
  109. void (*irq_config_func)(void);
  110. uint8_t clock_id;
  111. uint8_t reset_id;
  112. uint8_t pinmux_size;
  113. uint32_t poll_total_ms;
  114. uint16_t poll_interval_ms;
  115. const struct acts_pin_config *pinmux;
  116. };
  117. static struct acts_capture_data capture_acts_ddata;
  118. static const struct acts_pin_config pins_capture[] = {FOREACH_PIN_MFP(0)};
  119. static void capture_acts_irq_config(void);
  120. static const struct acts_capture_config capture_acts_cdata = {
  121. .base = (struct capture_acts_controller *)DT_INST_REG_ADDR(0),
  122. .irq_config_func = capture_acts_irq_config,
  123. .pinmux = pins_capture,
  124. .pinmux_size = ARRAY_SIZE(pins_capture),
  125. .clock_id = DT_INST_PROP(0, clkid),
  126. .reset_id = DT_INST_PROP(0, rstid),
  127. .poll_interval_ms = DT_INST_PROP(0, poll_interval_ms),
  128. .poll_total_ms = DT_INST_PROP(0, poll_total_ms),
  129. };
  130. static void capture_acts_disable(struct device *dev);
  131. static void capture_acts_enable(struct device *dev);
  132. static void capture_acts_reg_dump(struct device *dev)
  133. {
  134. const struct acts_capture_config *cfg = dev->config;
  135. struct capture_acts_controller *capture = cfg->base;
  136. LOG_DBG("enable capture");
  137. printk("capture0_cnt:0x%x\n", capture->capture0_cnt);
  138. printk("capture0_ctl:0x%x\n", capture->capture0_ctl);
  139. printk("capture0_val:0x%x\n", capture->capture0_val);
  140. printk("capture1_cnt:0x%x\n", capture->capture1_cnt);
  141. printk("capture1_ctl:0x%x\n", capture->capture1_ctl);
  142. printk("capture1_val:0x%x\n", capture->capture1_val);
  143. printk("capture_dbc_ctl:0x%x\n", capture->capture_dbc_ctl);
  144. printk("capture_demod_ctl:0x%x\n", capture->capture_demod_ctl);
  145. printk("capture_demod_sta:0x%x\n", capture->capture_demod_sta);
  146. printk("capture_demod_timeout:0x%x\n", capture->capture_demod_timeout);
  147. printk("capture_measure_cnt:0x%x\n", capture->capture_measure_cnt);
  148. printk("capture_measure_high_cnt:0x%x\n", capture->capture_measure_high_cnt);
  149. printk("capture_sta:0x%x\n", capture->capture_sta);
  150. }
  151. static void capture_acts_isr(void *arg)
  152. {
  153. struct device *dev = (struct device *)arg;
  154. struct acts_capture_data *data = dev->data;
  155. const struct acts_capture_config *cfg = dev->config;
  156. struct capture_acts_controller *capture = cfg->base;
  157. data->carrier_rate = 6000000 * CAP_DEM_CTL_MC_VAL(capture->capture_demod_ctl)/capture->capture_measure_cnt/1000;
  158. // printk("high cnt:%d, mc:%d\n", capture->capture_measure_high_cnt, capture->capture_measure_cnt);
  159. while((capture->capture_sta & CAP_STA_RXFE0) == 0) {
  160. data->capture_data[data->byte_cnt] = capture->capture0_cnt;
  161. data->byte_cnt++;
  162. if(data->byte_cnt >= 100)
  163. data->byte_cnt = 99;
  164. }
  165. capture->capture_sta = capture->capture_sta;
  166. while(capture->capture_sta & (CAP_STA_CT_PD1 | CAP_STA_CT_PD0));
  167. if(data->byte_cnt == 99) {
  168. capture_acts_disable(dev);
  169. k_delayed_work_submit(&data->timer, K_NO_WAIT);
  170. }
  171. }
  172. static void capture_acts_set_clk(const struct acts_capture_config *cfg, uint32_t freq_hz)
  173. {
  174. #if 1
  175. clk_set_rate(cfg->clock_id, freq_hz);
  176. k_busy_wait(100);
  177. #endif
  178. }
  179. static void capture_acts_poll(struct k_work *work)
  180. {
  181. struct acts_capture_data *data = CONTAINER_OF(work, struct acts_capture_data, timer);
  182. const struct device *dev = data->this_dev;
  183. const struct acts_capture_config *cfg = dev->config;
  184. struct capture_acts_controller *capture = cfg->base;
  185. int ret;
  186. struct input_value val;
  187. val.ir.protocol.carry_rate = data->carrier_rate;
  188. val.ir.protocol.data = data->capture_data;
  189. if(data->notify != NULL)
  190. data->notify(NULL, &val);
  191. }
  192. static void capture_acts_enable(struct device *dev)
  193. {
  194. const struct acts_capture_config *cfg = dev->config;
  195. struct capture_acts_controller *capture = cfg->base;
  196. LOG_DBG("enable capture");
  197. capture->capture_demod_timeout = 0x1770;
  198. capture->capture_demod_ctl |= CAP_DEM_CTL_INPUT_INV;//depend on peripheral circuit
  199. capture->capture_demod_ctl = capture->capture_demod_ctl & (~(CAP_DEM_CTL_MC(0xf)));
  200. capture->capture_demod_ctl |= CAP_DEM_CTL_EN | CAP_DEM_CTL_MC(3);
  201. capture->capture0_ctl = CAP_CTL_FIFO_LEV_IRQ_EN | CAP_CTL_CC_IRQ_EN | CAP_CTL_SS | CAP_CTL_CAPTURE_MODE | CAP_CTL_EN;
  202. }
  203. static void capture_acts_disable(struct device *dev)
  204. {
  205. const struct acts_capture_config *cfg = dev->config;
  206. struct capture_acts_controller *capture = cfg->base;
  207. LOG_DBG("disable capture");
  208. capture->capture0_ctl = 0;
  209. }
  210. static void capture_acts_inquiry(struct device *dev, struct input_value *val)
  211. {
  212. LOG_DBG("inquiry capture");
  213. }
  214. static void capture_acts_register_notify(struct device *dev, input_notify_t notify)
  215. {
  216. LOG_DBG("register notify 0x%x", (uint32_t)notify);
  217. struct acts_capture_data *capture = dev->data;
  218. capture->notify = notify;
  219. }
  220. static void capture_acts_unregister_notify(struct device *dev, input_notify_t notify)
  221. {
  222. LOG_DBG("unregister notify 0x%x", (uint32_t)notify);
  223. struct acts_capture_data *capture = dev->data;
  224. capture->notify = NULL;
  225. }
  226. const struct input_dev_driver_api capture_acts_driver_api = {
  227. .enable = capture_acts_enable,
  228. .disable = capture_acts_disable,
  229. .inquiry = capture_acts_inquiry,
  230. .register_notify = capture_acts_register_notify,
  231. .unregister_notify = capture_acts_unregister_notify,
  232. };
  233. static int capture_acts_init(const struct device *dev)
  234. {
  235. struct acts_capture_data *data = dev->data;
  236. const struct acts_capture_config *cfg = dev->config;
  237. const struct acts_pin_config *pinconf = cfg->pinmux;
  238. struct capture_acts_controller *capture = cfg->base;
  239. acts_pinmux_setup_pins(cfg->pinmux, cfg->pinmux_size);
  240. capture_acts_set_clk(cfg, 4000);
  241. /* enable capture controller clock */
  242. acts_clock_peripheral_enable(cfg->clock_id);
  243. /* reset capture controller */
  244. acts_reset_peripheral(cfg->reset_id);
  245. data->this_dev = dev;
  246. data->byte_cnt = 0;
  247. cfg->irq_config_func();
  248. k_delayed_work_init(&data->timer, capture_acts_poll);
  249. // capture_test(dev);
  250. return 0;
  251. }
  252. #if DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay)
  253. DEVICE_DEFINE(capture, DT_INST_LABEL(0),
  254. capture_acts_init, NULL,
  255. &capture_acts_ddata, &capture_acts_cdata,
  256. POST_KERNEL, 60,
  257. &capture_acts_driver_api);
  258. static void capture_acts_irq_config(void)
  259. {
  260. IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
  261. capture_acts_isr,
  262. DEVICE_GET(capture), 0);
  263. irq_enable(DT_INST_IRQN(0));
  264. }
  265. #endif // DT_NODE_HAS_STATUS