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zephyr
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include
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drivers
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cfg_drv
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dev_leopard.h

dev_leopard.h 3.4 KB
Cronologia Originale

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  1. /*
    2. 

  2.  * Copyright (c) 2020 Linaro Limited
    3. 

  3.  * SPDX-License-Identifier: Apache-2.0
    4. 

  4.  */
    5. 

  5. 

  6. #ifndef DEV_LEOPARD_H_
    7. 

  7. #define DEV_LEOPARD_H_
    8. 

  8. 

  9. /*
    10. 

  10. dma cfg
    11. 

  11. */
    12. 

  12. #define  CONFIG_DMA_0_NAME                  "DMA_0"
    13. 

  13. #define  CONFIG_DMA_0_PCHAN_NUM              10
    14. 

  14. #define  CONFIG_DMA_0_VCHAN_NUM              10
    15. 

  15. #define  CONFIG_DMA_0_VCHAN_PCHAN_NUM        6
    16. 

  16. #define  CONFIG_DMA_0_VCHAN_PCHAN_START      4
    17. 

  17. 

  18. /*
    19. 

  19. pwm cfg
    20. 

  20. */
    21. 

  21. #define  CONFIG_PWM_CHANS                    4
    22. 

  22. 

  23. /*
    24. 

  24. DSP cfg
    25. 

  25. */
    26. 

  26. #define  CONFIG_DSP_NAME                  "DSP"
    27. 

  27. 

  28. 

  29. /*
    30. 

  30. BTC cfg
    31. 

  31. */
    32. 

  32. #define  CONFIG_BTC_NAME                  "BTC"
    33. 

  33. 

  34. /*
    35. 

  35.  * Audio cfg
    36. 

  36.  */
    37. 

  37. #ifndef CONFIG_AUDIO_OUT_ACTS_DEV_NAME
    38. 

  38. #define CONFIG_AUDIO_OUT_ACTS_DEV_NAME  "audio_out"
    39. 

  39. #endif
    40. 

  40. #ifndef CONFIG_AUDIO_IN_ACTS_DEV_NAME
    41. 

  41. #define CONFIG_AUDIO_IN_ACTS_DEV_NAME   "audio_in"
    42. 

  42. #endif
    43. 

  43. 

  44. /*
    45. 

  45.  * DSP cfg
    46. 

  46.  */
    47. 

  47. #ifndef CONFIG_DSP_ACTS_DEV_NAME
    48. 

  48. #define CONFIG_DSP_ACTS_DEV_NAME  "dsp_acts"
    49. 

  49. #endif
    50. 

  50. 

  51. 

  52. /*
    53. 

  53. PMUADC cfg
    54. 

  54. */
    55. 

  55. #define	PMUADC_ID_CHARGI		(0)
    56. 

  56. #define	PMUADC_ID_BATV			(1)
    57. 

  57. #define	PMUADC_ID_DC5V			(2)
    58. 

  58. #define PMUADC_ID_SENSOR		(3)
    59. 

  59. #define PMUADC_ID_SVCC			(4)
    60. 

  60. #define	PMUADC_ID_LRADC1		(5)
    61. 

  61. #define	PMUADC_ID_VCCI		    (6)
    62. 

  62. #define	PMUADC_ID_LRADC2		(7)
    63. 

  63. #define	PMUADC_ID_LRADC3		(8)
    64. 

  64. #define	PMUADC_ID_LRADC4		(9)
    65. 

  65. #define	PMUADC_ID_LRADC5		(10)
    66. 

  66. #define	PMUADC_ID_LRADC6		(11)
    67. 

  67. 

  68. /**
    69. 

  69.  * LCD panel cfg (sync drivers/display/display_controller.h and drivers/display.h)
    70. 

  70.  */
    71. 

  71. /* Enumeration with possible display major port type */
    72. 

  72. #define PANEL_PORT_Unknown  (0)
    73. 

  73. #define PANEL_PORT_MCU      (1)
    74. 

  74. #define PANEL_PORT_TR       (2)
    75. 

  75. #define PANEL_PORT_SPI      (4)
    76. 

  76. 

  77. /* Enumeration with possible display mcu port type */
    78. 

  78. #define PANEL_MCU_8080  (0) /* Intel 8080 */
    79. 

  79. #define PANEL_MCU_6800  (1) /* Moto 6800 */
    80. 

  80. 

  81. /* Enumeration with possible display spi port type */
    82. 

  82. #define PANEL_SPI_3LINE_1  (0)
    83. 

  83. #define PANEL_SPI_3LINE_2  (1)
    84. 

  84. #define PANEL_SPI_4LINE_1  (2)
    85. 

  85. #define PANEL_SPI_4LINE_2  (3)
    86. 

  86. #define PANEL_QSPI         (4)
    87. 

  87. #define PANEL_QSPI_SYNC    (5)
    88. 

  88. #define PANEL_QSPI_DDR_0   (6)
    89. 

  89. #define PANEL_QSPI_DDR_1   (7)
    90. 

  90. #define PANEL_QSPI_DDR_2   (8)
    91. 

  91. 

  92. /* Enumeration of full port type */
    93. 

  93. #define PANEL_PORT_TYPE(major, minor) (((major) << 8) | (minor))
    94. 

  94. 

  95. #define PANEL_PORT_MCU_8080  PANEL_PORT_TYPE(PANEL_PORT_MCU, PANEL_MCU_8080)
    96. 

  96. #define PANEL_PORT_MCU_6800  PANEL_PORT_TYPE(PANEL_PORT_MCU, PANEL_MCU_6800)
    97. 

  97. 

  98. #define PANEL_PORT_SPI_3LINE_1  PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_SPI_3LINE_1)
    99. 

  99. #define PANEL_PORT_SPI_3LINE_2  PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_SPI_3LINE_2)
    100. 

  100. #define PANEL_PORT_SPI_4LINE_1  PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_SPI_4LINE_1)
    101. 

  101. #define PANEL_PORT_SPI_4LINE_2  PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_SPI_4LINE_2)
    102. 

  102. #define PANEL_PORT_QSPI         PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI)
    103. 

  103. #define PANEL_PORT_QSPI_SYNC    PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI_SYNC)
    104. 

  104. #define PANEL_PORT_QSPI_DDR_0   PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI_DDR_0)
    105. 

  105. #define PANEL_PORT_QSPI_DDR_1   PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI_DDR_1)
    106. 

  106. #define PANEL_PORT_QSPI_DDR_2   PANEL_PORT_TYPE(PANEL_PORT_SPI, PANEL_QSPI_DDR_2)
    107. 

  107. 

  108. /* Enumeration with possible display TR port type */
    109. 

  109. #define PANEL_PORT_TR_LCD  PANEL_PORT_TYPE(PANEL_PORT_TR, 0)
    110. 

  110. 

  111. /* Display pixel format enumeration. */
    112. 

  112. #define PANEL_PIXEL_FORMAT_RGB_888   (0x1 << 0)
    113. 

  113. #define PANEL_PIXEL_FORMAT_ARGB_8888 (0x1 << 3)
    114. 

  114. #define PANEL_PIXEL_FORMAT_RGB_565   (0x1 << 4)
    115. 

  115. #define PANEL_PIXEL_FORMAT_BGR_565   (0x1 << 5)
    116. 

  116. #define PANEL_PIXEL_FORMAT_BGR_888   (0x1 << 6)
    117. 

  117. #define PANEL_PIXEL_FORMAT_XRGB_8888 (0x1 << 7)
    118. 

  118. 

  119. #endif /* DEV_LEOPARD_H_ */
    120.