board.c 13 KB

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  1. /*
  2. * Copyright (c) 2019 Actions Semiconductor Co., Ltd
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. /**
  7. * @file
  8. * @brief board init functions
  9. */
  10. #include <kernel.h>
  11. #include <init.h>
  12. #include <device.h>
  13. #include <soc.h>
  14. #include "board.h"
  15. #include <drivers/gpio.h>
  16. #include <board_cfg.h>
  17. #include <drivers/flash.h>
  18. #define CONFIG_GPIO_HIGHZ (0x1000)
  19. static const struct acts_pin_config board_pin_reset_defautl[] = {
  20. };
  21. static void bootloader_pin_reset(void)
  22. {
  23. acts_pinctl_reg_setup_pins(board_pin_reset_defautl, ARRAY_SIZE(board_pin_reset_defautl));
  24. }
  25. void boot_to_application(void)
  26. {
  27. flash_flush(device_get_binding(CONFIG_SPINAND_FLASH_NAME), 0);
  28. bootloader_pin_reset();
  29. boot_to_app(0, BOOT_FLASH_ID_NAND);
  30. }
  31. void boot_to_ota_app(void)
  32. {
  33. //boot_to_part(5, 0, BOOT_FLASH_ID_NAND); // 5=temp part
  34. }
  35. static const struct acts_pin_config board_pin_config[] = {
  36. /*UART0 */
  37. #if IS_ENABLED(CONFIG_UART_0)
  38. /* uart0 tx */
  39. PIN_MFP_SET(GPIO_28, UART0_MFP_CFG),
  40. /* uart0 rx */
  41. PIN_MFP_SET(GPIO_29, UART0_MFP_CFG),
  42. #endif
  43. /*UART1 */
  44. #if IS_ENABLED(CONFIG_UART_1)
  45. /* uart1 tx */
  46. PIN_MFP_SET(GPIO_16, UART1_MFP_CFG),
  47. /* uart1 rx */
  48. PIN_MFP_SET(GPIO_17, UART1_MFP_CFG),
  49. #endif
  50. #if IS_ENABLED(CONFIG_SPI_FLASH_0)
  51. /* SPI0 CS */
  52. PIN_MFP_SET(GPIO_0, SPINOR_MFP_CFG),
  53. /* SPI0 MISO */
  54. PIN_MFP_SET(GPIO_1, SPINOR_MFP_CFG),
  55. /* SPI0 CLK */
  56. PIN_MFP_SET(GPIO_2, SPINOR_MFP_CFG),
  57. /* SPI0 MOSI */
  58. PIN_MFP_SET(GPIO_3, SPINOR_MFP_CFG),
  59. /* SPI0 IO2 */
  60. PIN_MFP_SET(GPIO_6, SPINOR_MFP_PU_CFG),
  61. /* SPI0 IO3 */
  62. PIN_MFP_SET(GPIO_7, SPINOR_MFP_PU_CFG),
  63. #endif
  64. #if IS_ENABLED(CONFIG_ACTS_BATTERY_NTC)
  65. PIN_MFP_SET(GPIO_20, BATNTC_MFP_CFG),
  66. #endif
  67. #if IS_ENABLED(CONFIG_I2CMT_0)
  68. /* I2C CLK*/
  69. PIN_MFP_SET(GPIO_18, I2CMT_MFP_CFG(MFP0_I2CMT)),
  70. /* I2C DATA*/
  71. PIN_MFP_SET(GPIO_19, I2CMT_MFP_CFG(MFP0_I2CMT)),
  72. #endif
  73. #if IS_ENABLED(CONFIG_I2CMT_1)
  74. /* I2C CLK*/
  75. PIN_MFP_SET(GPIO_55, I2CMT_MFP_CFG(MFP1_I2CMT)),
  76. /* I2C DATA*/
  77. PIN_MFP_SET(GPIO_56, I2CMT_MFP_CFG(MFP1_I2CMT)),
  78. #endif
  79. #if IS_ENABLED(CONFIG_I2C_0)
  80. /* I2C CLK*/
  81. PIN_MFP_SET(GPIO_57, I2C_MFP_CFG(MFP0_I2C)),
  82. /* I2C DATA*/
  83. PIN_MFP_SET(GPIO_58, I2C_MFP_CFG(MFP0_I2C)),
  84. #endif
  85. #if IS_ENABLED(CONFIG_I2C_1)
  86. /* I2C CLK*/
  87. PIN_MFP_SET(GPIO_51, I2C_MFP_CFG(MFP1_I2C)),
  88. /* I2C DATA*/
  89. PIN_MFP_SET(GPIO_52, I2C_MFP_CFG(MFP1_I2C)),
  90. #endif
  91. #if IS_ENABLED(CONFIG_I2C_2)
  92. /* I2C CLK*/
  93. PIN_MFP_SET(GPIO_61, I2C_MFP_CFG(MFP2_I2C)),
  94. /* I2C DATA*/
  95. PIN_MFP_SET(GPIO_62, I2C_MFP_CFG(MFP2_I2C)),
  96. #endif
  97. #if IS_ENABLED(CONFIG_I2C_3)
  98. /* I2C CLK*/
  99. PIN_MFP_SET(GPIO_60, I2C_MFP_CFG(MFP3_I2C)),
  100. /* I2C DATA*/
  101. PIN_MFP_SET(GPIO_59, I2C_MFP_CFG(MFP3_I2C)),
  102. #endif
  103. #if IS_ENABLED(CONFIG_CEC)
  104. PIN_MFP_SET(GPIO_12, CEC_MFP_CFG),
  105. #endif
  106. #if IS_ENABLED(CONFIG_AUDIO_I2SRX_0)
  107. /*I2SRX0 mclk*/
  108. PIN_MFP_SET(GPIO_53, I2SRX_MFP_CFG),
  109. /*I2SRX0 bclk*/
  110. PIN_MFP_SET(GPIO_54, I2SRX_MFP_CFG),
  111. /*I2SRX0 lrclk*/
  112. PIN_MFP_SET(GPIO_55, I2SRX_MFP_CFG),
  113. /*I2SRX0 d0*/
  114. PIN_MFP_SET(GPIO_56, I2SRX_MFP_CFG),
  115. #endif
  116. #if IS_ENABLED(CONFIG_SPI_1)
  117. /*SPI SS*/
  118. PIN_MFP_SET(GPIO_24, SPI_MFP_CFG(MFP_SPI1)),
  119. /* SPI CLK*/
  120. PIN_MFP_SET(GPIO_25, SPI_MFP_CFG(MFP_SPI1)),
  121. /* SPI MISO*/
  122. PIN_MFP_SET(GPIO_26, SPI_MFP_CFG(MFP_SPI1)),
  123. /* SPI MOSI*/
  124. PIN_MFP_SET(GPIO_27, SPI_MFP_CFG(MFP_SPI1)),
  125. #endif
  126. #if IS_ENABLED(CONFIG_SPI_2)
  127. /*SPI SS*/
  128. PIN_MFP_SET(GPIO_30, SPI_MFP_CFG(MFP_SPI2)),
  129. /* SPI CLK*/
  130. PIN_MFP_SET(GPIO_31, SPI_MFP_CFG(MFP_SPI2)),
  131. /* SPI MISO*/
  132. PIN_MFP_SET(GPIO_32, SPI_MFP_CFG(MFP_SPI2)),
  133. /* SPI MOSI*/
  134. PIN_MFP_SET(GPIO_33, SPI_MFP_CFG(MFP_SPI2)),
  135. #endif
  136. #if IS_ENABLED(CONFIG_SPI_3)
  137. /*SPI SS*/
  138. PIN_MFP_SET(GPIO_20, SPI_MFP_CFG(MFP_SPI3)),
  139. /* SPI CLK*/
  140. PIN_MFP_SET(GPIO_21, SPI_MFP_CFG(MFP_SPI3)),
  141. /* SPI MISO*/
  142. PIN_MFP_SET(GPIO_22, SPI_MFP_CFG(MFP_SPI3)),
  143. /* SPI MOSI*/
  144. PIN_MFP_SET(GPIO_23, SPI_MFP_CFG(MFP_SPI3)),
  145. #endif
  146. #if IS_ENABLED(CONFIG_SPIMT_0)
  147. /* SPI SS*/
  148. PIN_MFP_SET(GPIO_49, SPIMT_MFP_CFG(MFP0_SPIMT)),
  149. /* SPI CLK*/
  150. PIN_MFP_SET(GPIO_50, SPIMT_MFP_CFG(MFP0_SPIMT)),
  151. /* SPI MISO*/
  152. PIN_MFP_SET(GPIO_51, SPIMT_MFP_CFG(MFP0_SPIMT)),
  153. /* SPI MOSI*/
  154. PIN_MFP_SET(GPIO_52, SPIMT_MFP_CFG(MFP0_SPIMT)),
  155. /* SPI SS1*/
  156. PIN_MFP_SET(GPIO_61, SPIMT_MFP_CFG(MFP0_SPIMT)),
  157. #endif
  158. #if IS_ENABLED(CONFIG_SPIMT_1)
  159. /* SPI SS*/
  160. PIN_MFP_SET(GPIO_53, SPIMT_MFP_CFG(MFP1_SPIMT)),
  161. /* SPI CLK*/
  162. PIN_MFP_SET(GPIO_54, SPIMT_MFP_CFG(MFP1_SPIMT)),
  163. /* SPI MISO*/
  164. PIN_MFP_SET(GPIO_55, SPIMT_MFP_CFG(MFP1_SPIMT)),
  165. /* SPI MOSI*/
  166. PIN_MFP_SET(GPIO_56, SPIMT_MFP_CFG(MFP1_SPIMT)),
  167. #endif
  168. };
  169. #if IS_ENABLED(CONFIG_MMC_0)
  170. static const struct acts_pin_config board_mmc0_config[] = {
  171. /* MMC0 CMD*/
  172. PIN_MFP_SET(GPIO_25, SDC0_MFP_CFG_VAL),
  173. /* MMC0 CLK*/
  174. PIN_MFP_SET(GPIO_24, (GPIO_CTL_MFP(SDC0_MFP_SEL)|GPIO_CTL_PADDRV_LEVEL(3))),
  175. /* MMC0 DATA0 */
  176. PIN_MFP_SET(GPIO_18, SDC0_MFP_CFG_VAL),
  177. /* MMC0 DATA1 */
  178. PIN_MFP_SET(GPIO_19, SDC0_MFP_CFG_VAL),
  179. /* MMC0 DATA2 */
  180. PIN_MFP_SET(GPIO_20, SDC0_MFP_CFG_VAL),
  181. /* MMC0 DATA3 */
  182. PIN_MFP_SET(GPIO_21, SDC0_MFP_CFG_VAL),
  183. };
  184. #endif
  185. #if IS_ENABLED(CONFIG_AUDIO_SPDIFTX_0)
  186. static const struct acts_pin_config board_spdiftx0_config[] = {
  187. PIN_MFP_SET(GPIO_9, SPDIFTX_MFP_CFG),
  188. };
  189. #endif
  190. #if IS_ENABLED(CONFIG_AUDIO_SPDIFRX_0)
  191. static const struct acts_pin_config board_spdifrx0_config[] = {
  192. PIN_MFP_SET(GPIO_13, SPDIFRX_MFP_CFG)
  193. };
  194. #endif
  195. #if IS_ENABLED(CONFIG_AUDIO_I2STX_0)
  196. static const struct acts_pin_config board_i2stx0_config[] = {
  197. /*I2STX0 mclk*/
  198. PIN_MFP_SET(GPIO_49, I2STX_MFP_CFG),
  199. /*I2STX0 bclk*/
  200. PIN_MFP_SET(GPIO_50, I2STX_MFP_CFG),
  201. /*I2STX0 lrclk*/
  202. PIN_MFP_SET(GPIO_51, I2STX_MFP_CFG),
  203. /*I2STX0 d0*/
  204. PIN_MFP_SET(GPIO_52, I2STX_MFP_CFG),
  205. };
  206. #endif
  207. #if IS_ENABLED(CONFIG_SPINAND_0)
  208. static const struct acts_pin_config board_spinand_spi0_config[] = {
  209. /* IOVCC1 poweron */
  210. PIN_MFP_SET(CONFIG_SPINAND_POWER_GPIO, 0x1F),
  211. /* SPI0 CS */
  212. PIN_MFP_SET(GPIO_0, SPINOR_MFP_CFG),
  213. /* SPI0 MISO */
  214. PIN_MFP_SET(GPIO_1, SPINOR_MFP_CFG),
  215. /* SPI0 CLK */
  216. PIN_MFP_SET(GPIO_2, SPINOR_MFP_CFG),
  217. /* SPI0 MOSI */
  218. PIN_MFP_SET(GPIO_3, SPINOR_MFP_CFG),
  219. /* SPI0 IO2 */
  220. PIN_MFP_SET(GPIO_6, SPINOR_MFP_PU_CFG),
  221. /* SPI0 IO3 */
  222. PIN_MFP_SET(GPIO_7, SPINOR_MFP_PU_CFG),
  223. };
  224. static const struct acts_pin_config board_spinand_spi0_gpiohighz_config[] = {
  225. /* IOVCC1 poweroff */
  226. PIN_MFP_SET(CONFIG_SPINAND_POWER_GPIO, CONFIG_GPIO_HIGHZ),
  227. /*SPI0 CS*/
  228. PIN_MFP_SET(GPIO_0, CONFIG_GPIO_HIGHZ),
  229. /*SPI0 MISO*/
  230. PIN_MFP_SET(GPIO_1, CONFIG_GPIO_HIGHZ),
  231. /*SPI0 CLK*/
  232. PIN_MFP_SET(GPIO_2, CONFIG_GPIO_HIGHZ),
  233. /*SPI0 MOSI*/
  234. PIN_MFP_SET(GPIO_3, CONFIG_GPIO_HIGHZ),
  235. /*SPI0 IO2*/
  236. PIN_MFP_SET(GPIO_6, CONFIG_GPIO_HIGHZ),
  237. /*SPI0 IO3*/
  238. PIN_MFP_SET(GPIO_7, CONFIG_GPIO_HIGHZ),
  239. };
  240. #endif
  241. #if IS_ENABLED(CONFIG_PWM)
  242. /* Look at CONFIG_PWM_PIN_CHAN_MAP select the available pwm gpio */
  243. static const struct pwm_acts_pin_config board_pwm_config[] = {
  244. /* GPIO5 used as pwm channel 1*/
  245. PWM_PIN_MFP_SET(GPIO_5, 1, PWM_MFP_CFG),
  246. /* GPIO21 used as pwm channel 7*/
  247. PWM_PIN_MFP_SET(GPIO_21, 7, PWM_MFP_CFG),
  248. };
  249. #endif
  250. #if IS_ENABLED(CONFIG_PANEL)
  251. static const struct acts_pin_config board_lcd_pin_config[] = {
  252. /* lcd cs */
  253. PIN_MFP_SET(GPIO_30, (GPIO_CTL_MFP(LCD_MFP_SEL)|GPIO_CTL_PULLUP)),
  254. /* lcd scl */
  255. PIN_MFP_SET(GPIO_34, LCD_MFP_SEL),
  256. /* lcd_d0*/
  257. PIN_MFP_SET(GPIO_14, LCD_MFP_SEL),
  258. /* lcd_d1*/
  259. PIN_MFP_SET(GPIO_15, LCD_MFP_SEL),
  260. /* lcd_d2*/
  261. PIN_MFP_SET(GPIO_16, LCD_MFP_SEL),
  262. /* lcd_d3*/
  263. PIN_MFP_SET(GPIO_17, LCD_MFP_SEL),
  264. /* lcd power: IOVCC2 */
  265. PIN_MFP_SET(GPIO_33, 0x1F),
  266. };
  267. #endif
  268. #if IS_ENABLED(CONFIG_ADCKEY)
  269. #define CONFIG_ADCKEY_GPIO
  270. #ifdef CONFIG_ADCKEY_GPIO
  271. #define CONFIG_ADCKEY_GPIO_NUM (GPIO_21)
  272. #else
  273. #define CONFIG_ADCKEY_WIO_NUM (WIO_0)
  274. #define CONFIG_ADCKEY_WIO_MFP (3)
  275. #endif
  276. static void board_adckey_pinmux_init(void)
  277. {
  278. #ifdef CONFIG_ADCKEY_GPIO
  279. acts_pinmux_set(CONFIG_ADCKEY_GPIO_NUM, ADCKEY_MFP_CFG);
  280. #else
  281. sys_write32(CONFIG_ADCKEY_WIO_MFP, WIO0_CTL + (CONFIG_ADCKEY_WIO_NUM * 4));
  282. #endif
  283. }
  284. #endif
  285. static int board_early_init(const struct device *arg)
  286. {
  287. ARG_UNUSED(arg);
  288. acts_pinmux_setup_pins(board_pin_config, ARRAY_SIZE(board_pin_config));
  289. #if IS_ENABLED(CONFIG_MMC_0)
  290. acts_pinmux_setup_pins(board_mmc0_config, ARRAY_SIZE(board_mmc0_config));
  291. #endif
  292. #if IS_ENABLED(CONFIG_ADCKEY)
  293. board_adckey_pinmux_init();
  294. #endif
  295. #if IS_ENABLED(CONFIG_PANEL)
  296. acts_pinmux_setup_pins(board_lcd_pin_config, ARRAY_SIZE(board_lcd_pin_config));
  297. #endif
  298. #ifdef CONFIG_RTT_CONSOLE
  299. jtag_set();
  300. #endif
  301. return 0;
  302. }
  303. static int board_later_init(const struct device *arg)
  304. {
  305. ARG_UNUSED(arg);
  306. printk("%s %d: \n", __func__, __LINE__);
  307. return 0;
  308. }
  309. /* UART registers struct */
  310. struct acts_uart_reg {
  311. volatile uint32_t ctrl;
  312. volatile uint32_t rxdat;
  313. volatile uint32_t txdat;
  314. volatile uint32_t stat;
  315. volatile uint32_t br;
  316. } ;
  317. void uart_poll_out_ch(int c)
  318. {
  319. struct acts_uart_reg *uart = (struct acts_uart_reg*)UART0_REG_BASE;
  320. /* Wait for transmitter to be ready */
  321. while (uart->stat & BIT(6));
  322. /* send a character */
  323. uart->txdat = (uint32_t)c;
  324. }
  325. /*for early printk*/
  326. int arch_printk_char_out(int c)
  327. {
  328. if ('\n' == c)
  329. uart_poll_out_ch('\r');
  330. uart_poll_out_ch(c);
  331. return 0;
  332. }
  333. void board_get_mmc0_pinmux_info(struct board_pinmux_info *pinmux_info)
  334. {
  335. #if IS_ENABLED(CONFIG_MMC_0)
  336. pinmux_info->pins_config = board_mmc0_config;
  337. pinmux_info->pins_num = ARRAY_SIZE(board_mmc0_config);
  338. #endif
  339. }
  340. void board_get_spdiftx0_pinmux_info(struct board_pinmux_info *pinmux_info)
  341. {
  342. #if IS_ENABLED(CONFIG_AUDIO_SPDIFTX_0)
  343. pinmux_info->pins_config = board_spdiftx0_config;
  344. pinmux_info->pins_num = ARRAY_SIZE(board_spdiftx0_config);
  345. #endif
  346. }
  347. void board_get_spdifrx0_pinmux_info(struct board_pinmux_info *pinmux_info)
  348. {
  349. #if IS_ENABLED(CONFIG_AUDIO_SPDIFRX_0)
  350. pinmux_info->pins_config = board_spdifrx0_config;
  351. pinmux_info->pins_num = ARRAY_SIZE(board_spdifrx0_config);
  352. #endif
  353. }
  354. void board_get_i2stx0_pinmux_info(struct board_pinmux_info *pinmux_info)
  355. {
  356. #if IS_ENABLED(CONFIG_AUDIO_SPDIFRX_0)
  357. pinmux_info->pins_config = board_i2stx0_config;
  358. pinmux_info->pins_num = ARRAY_SIZE(board_i2stx0_config);
  359. #endif
  360. }
  361. void board_get_pwm_pinmux_info(struct board_pwm_pinmux_info *pinmux_info)
  362. {
  363. #if IS_ENABLED(CONFIG_PWM)
  364. pinmux_info->pins_config = board_pwm_config;
  365. pinmux_info->pins_num = ARRAY_SIZE(board_pwm_config);
  366. #endif
  367. }
  368. void board_get_spinand_pinmux_info(struct board_pinmux_info *pinmux_info)
  369. {
  370. #if IS_ENABLED(CONFIG_SPINAND_0)
  371. pinmux_info->pins_config = board_spinand_spi0_config;
  372. pinmux_info->pins_num = ARRAY_SIZE(board_spinand_spi0_config);
  373. #endif
  374. }
  375. void board_get_spinand_gpiohighz_info(struct board_pinmux_info *pinmux_info)
  376. {
  377. #if IS_ENABLED(CONFIG_SPINAND_0)
  378. pinmux_info->pins_config = board_spinand_spi0_gpiohighz_config;
  379. pinmux_info->pins_num = ARRAY_SIZE(board_spinand_spi0_gpiohighz_config);
  380. #endif
  381. }
  382. #if IS_ENABLED(CONFIG_PANEL)
  383. static uint32_t lcd_pin_backup[3];
  384. void board_lcd_suspend(bool aod_en, bool early_suspend)
  385. {
  386. if (early_suspend) {
  387. lcd_pin_backup[0] = sys_read32(GPION_CTL(35)); /* lcd te */
  388. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(35));
  389. if (aod_en == false) {
  390. lcd_pin_backup[1] = sys_read32(GPION_CTL(21)); /* lcd power */
  391. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(21));
  392. lcd_pin_backup[2] = sys_read32(GPION_CTL(32)); /* lcd reset */
  393. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(32));
  394. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(30)); /* lcd cs */
  395. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(33)); /* lcd power IOVCC2 */
  396. }
  397. }
  398. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(34)); /* lcd scl */
  399. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(14)); /* lcd d0 */
  400. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(15)); /* lcd d1 */
  401. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(16)); /* lcd d2 */
  402. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(17)); /* lcd d3 */
  403. }
  404. void board_lcd_resume(bool aod_en, bool late_resume)
  405. {
  406. acts_pinmux_setup_pins(board_lcd_pin_config, ARRAY_SIZE(board_lcd_pin_config));
  407. if (late_resume) {
  408. sys_write32(lcd_pin_backup[0], GPION_CTL(35)); /* lcd te */
  409. if (aod_en == false) {
  410. sys_write32(lcd_pin_backup[1], GPION_CTL(21)); /* lcd GND_LEDK */
  411. sys_write32(lcd_pin_backup[2], GPION_CTL(32)); /* lcd reset */
  412. }
  413. }
  414. }
  415. #endif /* CONFIG_PANEL */
  416. SYS_INIT(board_early_init, PRE_KERNEL_1, 5);
  417. SYS_INIT(board_later_init, POST_KERNEL, 5);