board.c 12 KB

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  1. /*
  2. * Copyright (c) 2019 Actions Semiconductor Co., Ltd
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. /**
  7. * @file
  8. * @brief board init functions
  9. */
  10. #include <kernel.h>
  11. #include <init.h>
  12. #include <device.h>
  13. #include <soc.h>
  14. #include "board.h"
  15. #include <drivers/gpio.h>
  16. #include <board_cfg.h>
  17. #define CONFIG_GPIO_HIGHZ (0x1000)
  18. static const struct acts_pin_config board_pin_reset_defautl[] = {
  19. };
  20. static void bootloader_pin_reset(void)
  21. {
  22. acts_pinctl_reg_setup_pins(board_pin_reset_defautl, ARRAY_SIZE(board_pin_reset_defautl));
  23. }
  24. void boot_to_application(void)
  25. {
  26. bootloader_pin_reset();
  27. boot_to_app(0, BOOT_FLASH_ID_NAND);
  28. }
  29. void boot_to_ota_app(void)
  30. {
  31. //boot_to_part(5, 0, BOOT_FLASH_ID_NAND); // 5=temp part
  32. }
  33. static const struct acts_pin_config board_pin_config[] = {
  34. /*UART0 */
  35. #if IS_ENABLED(CONFIG_UART_0)
  36. /* uart0 tx */
  37. PIN_MFP_SET(GPIO_28, UART0_MFP_CFG),
  38. /* uart0 rx */
  39. PIN_MFP_SET(GPIO_29, UART0_MFP_CFG),
  40. #endif
  41. /*UART1 */
  42. #if IS_ENABLED(CONFIG_UART_1)
  43. /* uart1 tx */
  44. PIN_MFP_SET(GPIO_16, UART1_MFP_CFG),
  45. /* uart1 rx */
  46. PIN_MFP_SET(GPIO_17, UART1_MFP_CFG),
  47. #endif
  48. #if IS_ENABLED(CONFIG_SPI_FLASH_0)
  49. /* SPI0 CS */
  50. PIN_MFP_SET(GPIO_0, SPINOR_MFP_CFG),
  51. /* SPI0 MISO */
  52. PIN_MFP_SET(GPIO_1, SPINOR_MFP_CFG),
  53. /* SPI0 CLK */
  54. PIN_MFP_SET(GPIO_2, SPINOR_MFP_CFG),
  55. /* SPI0 MOSI */
  56. PIN_MFP_SET(GPIO_3, SPINOR_MFP_CFG),
  57. /* SPI0 IO2 */
  58. PIN_MFP_SET(GPIO_6, SPINOR_MFP_PU_CFG),
  59. /* SPI0 IO3 */
  60. PIN_MFP_SET(GPIO_7, SPINOR_MFP_PU_CFG),
  61. #endif
  62. #if IS_ENABLED(CONFIG_ACTS_BATTERY_NTC)
  63. PIN_MFP_SET(GPIO_20, BATNTC_MFP_CFG),
  64. #endif
  65. #if IS_ENABLED(CONFIG_I2CMT_0)
  66. /* I2C CLK*/
  67. PIN_MFP_SET(GPIO_18, I2CMT_MFP_CFG(MFP0_I2CMT)),
  68. /* I2C DATA*/
  69. PIN_MFP_SET(GPIO_19, I2CMT_MFP_CFG(MFP0_I2CMT)),
  70. #endif
  71. #if IS_ENABLED(CONFIG_I2CMT_1)
  72. /* I2C CLK*/
  73. PIN_MFP_SET(GPIO_55, I2CMT_MFP_CFG(MFP1_I2CMT)),
  74. /* I2C DATA*/
  75. PIN_MFP_SET(GPIO_56, I2CMT_MFP_CFG(MFP1_I2CMT)),
  76. #endif
  77. #if IS_ENABLED(CONFIG_I2C_0)
  78. /* I2C CLK*/
  79. PIN_MFP_SET(GPIO_57, I2C_MFP_CFG(MFP0_I2C)),
  80. /* I2C DATA*/
  81. PIN_MFP_SET(GPIO_58, I2C_MFP_CFG(MFP0_I2C)),
  82. #endif
  83. #if IS_ENABLED(CONFIG_I2C_1)
  84. /* I2C CLK*/
  85. PIN_MFP_SET(GPIO_51, I2C_MFP_CFG(MFP1_I2C)),
  86. /* I2C DATA*/
  87. PIN_MFP_SET(GPIO_52, I2C_MFP_CFG(MFP1_I2C)),
  88. #endif
  89. #if IS_ENABLED(CONFIG_I2C_2)
  90. /* I2C CLK*/
  91. PIN_MFP_SET(GPIO_61, I2C_MFP_CFG(MFP2_I2C)),
  92. /* I2C DATA*/
  93. PIN_MFP_SET(GPIO_62, I2C_MFP_CFG(MFP2_I2C)),
  94. #endif
  95. #if IS_ENABLED(CONFIG_I2C_3)
  96. /* I2C CLK*/
  97. PIN_MFP_SET(GPIO_60, I2C_MFP_CFG(MFP3_I2C)),
  98. /* I2C DATA*/
  99. PIN_MFP_SET(GPIO_59, I2C_MFP_CFG(MFP3_I2C)),
  100. #endif
  101. #if IS_ENABLED(CONFIG_CEC)
  102. PIN_MFP_SET(GPIO_12, CEC_MFP_CFG),
  103. #endif
  104. #if IS_ENABLED(CONFIG_AUDIO_I2SRX_0)
  105. /*I2SRX0 mclk*/
  106. PIN_MFP_SET(GPIO_53, I2SRX_MFP_CFG),
  107. /*I2SRX0 bclk*/
  108. PIN_MFP_SET(GPIO_54, I2SRX_MFP_CFG),
  109. /*I2SRX0 lrclk*/
  110. PIN_MFP_SET(GPIO_55, I2SRX_MFP_CFG),
  111. /*I2SRX0 d0*/
  112. PIN_MFP_SET(GPIO_56, I2SRX_MFP_CFG),
  113. #endif
  114. #if IS_ENABLED(CONFIG_SPI_1)
  115. /*SPI SS*/
  116. PIN_MFP_SET(GPIO_24, SPI_MFP_CFG(MFP_SPI1)),
  117. /* SPI CLK*/
  118. PIN_MFP_SET(GPIO_25, SPI_MFP_CFG(MFP_SPI1)),
  119. /* SPI MISO*/
  120. PIN_MFP_SET(GPIO_26, SPI_MFP_CFG(MFP_SPI1)),
  121. /* SPI MOSI*/
  122. PIN_MFP_SET(GPIO_27, SPI_MFP_CFG(MFP_SPI1)),
  123. #endif
  124. #if IS_ENABLED(CONFIG_SPI_2)
  125. /*SPI SS*/
  126. PIN_MFP_SET(GPIO_30, SPI_MFP_CFG(MFP_SPI2)),
  127. /* SPI CLK*/
  128. PIN_MFP_SET(GPIO_31, SPI_MFP_CFG(MFP_SPI2)),
  129. /* SPI MISO*/
  130. PIN_MFP_SET(GPIO_32, SPI_MFP_CFG(MFP_SPI2)),
  131. /* SPI MOSI*/
  132. PIN_MFP_SET(GPIO_33, SPI_MFP_CFG(MFP_SPI2)),
  133. #endif
  134. #if IS_ENABLED(CONFIG_SPI_3)
  135. /*SPI SS*/
  136. PIN_MFP_SET(GPIO_20, SPI_MFP_CFG(MFP_SPI3)),
  137. /* SPI CLK*/
  138. PIN_MFP_SET(GPIO_21, SPI_MFP_CFG(MFP_SPI3)),
  139. /* SPI MISO*/
  140. PIN_MFP_SET(GPIO_22, SPI_MFP_CFG(MFP_SPI3)),
  141. /* SPI MOSI*/
  142. PIN_MFP_SET(GPIO_23, SPI_MFP_CFG(MFP_SPI3)),
  143. #endif
  144. #if IS_ENABLED(CONFIG_SPIMT_0)
  145. /* SPI SS*/
  146. PIN_MFP_SET(GPIO_49, SPIMT_MFP_CFG(MFP0_SPIMT)),
  147. /* SPI CLK*/
  148. PIN_MFP_SET(GPIO_50, SPIMT_MFP_CFG(MFP0_SPIMT)),
  149. /* SPI MISO*/
  150. PIN_MFP_SET(GPIO_51, SPIMT_MFP_CFG(MFP0_SPIMT)),
  151. /* SPI MOSI*/
  152. PIN_MFP_SET(GPIO_52, SPIMT_MFP_CFG(MFP0_SPIMT)),
  153. /* SPI SS1*/
  154. PIN_MFP_SET(GPIO_61, SPIMT_MFP_CFG(MFP0_SPIMT)),
  155. #endif
  156. #if IS_ENABLED(CONFIG_SPIMT_1)
  157. /* SPI SS*/
  158. PIN_MFP_SET(GPIO_53, SPIMT_MFP_CFG(MFP1_SPIMT)),
  159. /* SPI CLK*/
  160. PIN_MFP_SET(GPIO_54, SPIMT_MFP_CFG(MFP1_SPIMT)),
  161. /* SPI MISO*/
  162. PIN_MFP_SET(GPIO_55, SPIMT_MFP_CFG(MFP1_SPIMT)),
  163. /* SPI MOSI*/
  164. PIN_MFP_SET(GPIO_56, SPIMT_MFP_CFG(MFP1_SPIMT)),
  165. #endif
  166. };
  167. #if IS_ENABLED(CONFIG_MMC_0)
  168. static const struct acts_pin_config board_mmc0_config[] = {
  169. /* MMC0 CMD*/
  170. PIN_MFP_SET(GPIO_0, SDC0_MFP_CFG_VAL),
  171. /* MMC0 CLK*/
  172. PIN_MFP_SET(GPIO_1, (GPIO_CTL_MFP(SDC0_MFP_SEL)|GPIO_CTL_PADDRV_LEVEL(3))),
  173. /* MMC0 DATA0 */
  174. PIN_MFP_SET(GPIO_2, SDC0_MFP_CFG_VAL),
  175. /* MMC0 DATA1 */
  176. PIN_MFP_SET(GPIO_3, SDC0_MFP_CFG_VAL),
  177. /* MMC0 DATA2 */
  178. PIN_MFP_SET(GPIO_6, SDC0_MFP_CFG_VAL),
  179. /* MMC0 DATA3 */
  180. PIN_MFP_SET(GPIO_7, SDC0_MFP_CFG_VAL),
  181. };
  182. #endif
  183. #if IS_ENABLED(CONFIG_AUDIO_SPDIFTX_0)
  184. static const struct acts_pin_config board_spdiftx0_config[] = {
  185. PIN_MFP_SET(GPIO_9, SPDIFTX_MFP_CFG),
  186. };
  187. #endif
  188. #if IS_ENABLED(CONFIG_AUDIO_SPDIFRX_0)
  189. static const struct acts_pin_config board_spdifrx0_config[] = {
  190. PIN_MFP_SET(GPIO_13, SPDIFRX_MFP_CFG)
  191. };
  192. #endif
  193. #if IS_ENABLED(CONFIG_AUDIO_I2STX_0)
  194. static const struct acts_pin_config board_i2stx0_config[] = {
  195. /*I2STX0 mclk*/
  196. PIN_MFP_SET(GPIO_49, I2STX_MFP_CFG),
  197. /*I2STX0 bclk*/
  198. PIN_MFP_SET(GPIO_50, I2STX_MFP_CFG),
  199. /*I2STX0 lrclk*/
  200. PIN_MFP_SET(GPIO_51, I2STX_MFP_CFG),
  201. /*I2STX0 d0*/
  202. PIN_MFP_SET(GPIO_52, I2STX_MFP_CFG),
  203. };
  204. #endif
  205. #if IS_ENABLED(CONFIG_SPINAND_0)
  206. static const struct acts_pin_config board_spinand_spi0_config[] = {
  207. /* SPI0 CS */
  208. PIN_MFP_SET(GPIO_0, SPINOR_MFP_CFG),
  209. /* SPI0 MISO */
  210. PIN_MFP_SET(GPIO_1, SPINOR_MFP_CFG),
  211. /* SPI0 CLK */
  212. PIN_MFP_SET(GPIO_2, SPINOR_MFP_CFG),
  213. /* SPI0 MOSI */
  214. PIN_MFP_SET(GPIO_3, SPINOR_MFP_CFG),
  215. /* SPI0 IO2 */
  216. PIN_MFP_SET(GPIO_6, SPINOR_MFP_PU_CFG),
  217. /* SPI0 IO3 */
  218. PIN_MFP_SET(GPIO_7, SPINOR_MFP_PU_CFG),
  219. };
  220. static const struct acts_pin_config board_spinand_spi0_gpiohighz_config[] = {
  221. /*SPI0 CS*/
  222. PIN_MFP_SET(GPIO_0, CONFIG_GPIO_HIGHZ),
  223. /*SPI0 MISO*/
  224. PIN_MFP_SET(GPIO_1, CONFIG_GPIO_HIGHZ),
  225. /*SPI0 CLK*/
  226. PIN_MFP_SET(GPIO_2, CONFIG_GPIO_HIGHZ),
  227. /*SPI0 MOSI*/
  228. PIN_MFP_SET(GPIO_3, CONFIG_GPIO_HIGHZ),
  229. /*SPI0 IO2*/
  230. PIN_MFP_SET(GPIO_6, CONFIG_GPIO_HIGHZ),
  231. /*SPI0 IO3*/
  232. PIN_MFP_SET(GPIO_7, CONFIG_GPIO_HIGHZ),
  233. };
  234. #endif
  235. #if IS_ENABLED(CONFIG_PWM)
  236. /* Look at CONFIG_PWM_PIN_CHAN_MAP select the available pwm gpio */
  237. static const struct pwm_acts_pin_config board_pwm_config[] = {
  238. /* GPIO5 used as pwm channel 1*/
  239. PWM_PIN_MFP_SET(GPIO_5, 1, PWM_MFP_CFG),
  240. /* GPIO21 used as pwm channel 7*/
  241. PWM_PIN_MFP_SET(GPIO_21, 7, PWM_MFP_CFG),
  242. };
  243. #endif
  244. #if IS_ENABLED(CONFIG_PANEL)
  245. static const struct acts_pin_config board_lcd_pin_config[] = {
  246. /* lcd cs */
  247. PIN_MFP_SET(GPIO_30, (GPIO_CTL_MFP(LCD_MFP_SEL)|GPIO_CTL_PULLUP)),
  248. /* lcd scl */
  249. PIN_MFP_SET(GPIO_34, LCD_MFP_SEL),
  250. /* lcd_d0*/
  251. PIN_MFP_SET(GPIO_14, LCD_MFP_SEL),
  252. /* lcd_d1*/
  253. PIN_MFP_SET(GPIO_15, LCD_MFP_SEL),
  254. /* lcd_d2*/
  255. PIN_MFP_SET(GPIO_16, LCD_MFP_SEL),
  256. /* lcd_d3*/
  257. PIN_MFP_SET(GPIO_17, LCD_MFP_SEL),
  258. /* lcd power: IOVCC2 */
  259. PIN_MFP_SET(GPIO_33, 0x1F),
  260. };
  261. #endif
  262. #if IS_ENABLED(CONFIG_ADCKEY)
  263. #define CONFIG_ADCKEY_GPIO
  264. #ifdef CONFIG_ADCKEY_GPIO
  265. #define CONFIG_ADCKEY_GPIO_NUM (GPIO_21)
  266. #else
  267. #define CONFIG_ADCKEY_WIO_NUM (WIO_0)
  268. #define CONFIG_ADCKEY_WIO_MFP (3)
  269. #endif
  270. static void board_adckey_pinmux_init(void)
  271. {
  272. #ifdef CONFIG_ADCKEY_GPIO
  273. acts_pinmux_set(CONFIG_ADCKEY_GPIO_NUM, ADCKEY_MFP_CFG);
  274. #else
  275. sys_write32(CONFIG_ADCKEY_WIO_MFP, WIO0_CTL + (CONFIG_ADCKEY_WIO_NUM * 4));
  276. #endif
  277. }
  278. #endif
  279. static int board_early_init(const struct device *arg)
  280. {
  281. ARG_UNUSED(arg);
  282. acts_pinmux_setup_pins(board_pin_config, ARRAY_SIZE(board_pin_config));
  283. #if IS_ENABLED(CONFIG_MMC_0)
  284. acts_pinmux_setup_pins(board_mmc0_config, ARRAY_SIZE(board_mmc0_config));
  285. #endif
  286. #if IS_ENABLED(CONFIG_ADCKEY)
  287. board_adckey_pinmux_init();
  288. #endif
  289. #if IS_ENABLED(CONFIG_PANEL)
  290. acts_pinmux_setup_pins(board_lcd_pin_config, ARRAY_SIZE(board_lcd_pin_config));
  291. #endif
  292. #ifdef CONFIG_RTT_CONSOLE
  293. jtag_set();
  294. #endif
  295. return 0;
  296. }
  297. static int board_later_init(const struct device *arg)
  298. {
  299. ARG_UNUSED(arg);
  300. printk("%s %d: \n", __func__, __LINE__);
  301. return 0;
  302. }
  303. /* UART registers struct */
  304. struct acts_uart_reg {
  305. volatile uint32_t ctrl;
  306. volatile uint32_t rxdat;
  307. volatile uint32_t txdat;
  308. volatile uint32_t stat;
  309. volatile uint32_t br;
  310. } ;
  311. void uart_poll_out_ch(int c)
  312. {
  313. struct acts_uart_reg *uart = (struct acts_uart_reg*)UART0_REG_BASE;
  314. /* Wait for transmitter to be ready */
  315. while (uart->stat & BIT(6));
  316. /* send a character */
  317. uart->txdat = (uint32_t)c;
  318. }
  319. /*for early printk*/
  320. int arch_printk_char_out(int c)
  321. {
  322. if ('\n' == c)
  323. uart_poll_out_ch('\r');
  324. uart_poll_out_ch(c);
  325. return 0;
  326. }
  327. void board_get_mmc0_pinmux_info(struct board_pinmux_info *pinmux_info)
  328. {
  329. #if IS_ENABLED(CONFIG_MMC_0)
  330. pinmux_info->pins_config = board_mmc0_config;
  331. pinmux_info->pins_num = ARRAY_SIZE(board_mmc0_config);
  332. #endif
  333. }
  334. void board_get_spdiftx0_pinmux_info(struct board_pinmux_info *pinmux_info)
  335. {
  336. #if IS_ENABLED(CONFIG_AUDIO_SPDIFTX_0)
  337. pinmux_info->pins_config = board_spdiftx0_config;
  338. pinmux_info->pins_num = ARRAY_SIZE(board_spdiftx0_config);
  339. #endif
  340. }
  341. void board_get_spdifrx0_pinmux_info(struct board_pinmux_info *pinmux_info)
  342. {
  343. #if IS_ENABLED(CONFIG_AUDIO_SPDIFRX_0)
  344. pinmux_info->pins_config = board_spdifrx0_config;
  345. pinmux_info->pins_num = ARRAY_SIZE(board_spdifrx0_config);
  346. #endif
  347. }
  348. void board_get_i2stx0_pinmux_info(struct board_pinmux_info *pinmux_info)
  349. {
  350. #if IS_ENABLED(CONFIG_AUDIO_SPDIFRX_0)
  351. pinmux_info->pins_config = board_i2stx0_config;
  352. pinmux_info->pins_num = ARRAY_SIZE(board_i2stx0_config);
  353. #endif
  354. }
  355. void board_get_pwm_pinmux_info(struct board_pwm_pinmux_info *pinmux_info)
  356. {
  357. #if IS_ENABLED(CONFIG_PWM)
  358. pinmux_info->pins_config = board_pwm_config;
  359. pinmux_info->pins_num = ARRAY_SIZE(board_pwm_config);
  360. #endif
  361. }
  362. void board_get_spinand_pinmux_info(struct board_pinmux_info *pinmux_info)
  363. {
  364. #if IS_ENABLED(CONFIG_SPINAND_0)
  365. pinmux_info->pins_config = board_spinand_spi0_config;
  366. pinmux_info->pins_num = ARRAY_SIZE(board_spinand_spi0_config);
  367. #endif
  368. }
  369. void board_get_spinand_gpiohighz_info(struct board_pinmux_info *pinmux_info)
  370. {
  371. #if IS_ENABLED(CONFIG_SPINAND_0)
  372. pinmux_info->pins_config = board_spinand_spi0_gpiohighz_config;
  373. pinmux_info->pins_num = ARRAY_SIZE(board_spinand_spi0_gpiohighz_config);
  374. #endif
  375. }
  376. #if IS_ENABLED(CONFIG_PANEL)
  377. static uint32_t lcd_pin_backup[3];
  378. void board_lcd_suspend(bool aod_en, bool early_suspend)
  379. {
  380. if (early_suspend) {
  381. lcd_pin_backup[0] = sys_read32(GPION_CTL(35)); /* lcd te */
  382. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(35));
  383. if (aod_en == false) {
  384. lcd_pin_backup[1] = sys_read32(GPION_CTL(21)); /* lcd power */
  385. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(21));
  386. lcd_pin_backup[2] = sys_read32(GPION_CTL(32)); /* lcd reset */
  387. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(32));
  388. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(30)); /* lcd cs */
  389. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(33)); /* lcd power IOVCC2 */
  390. }
  391. }
  392. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(34)); /* lcd scl */
  393. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(14)); /* lcd d0 */
  394. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(15)); /* lcd d1 */
  395. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(16)); /* lcd d2 */
  396. sys_write32(CONFIG_GPIO_HIGHZ, GPION_CTL(17)); /* lcd d3 */
  397. }
  398. void board_lcd_resume(bool aod_en, bool late_resume)
  399. {
  400. acts_pinmux_setup_pins(board_lcd_pin_config, ARRAY_SIZE(board_lcd_pin_config));
  401. if (late_resume) {
  402. sys_write32(lcd_pin_backup[0], GPION_CTL(35)); /* lcd te */
  403. if (aod_en == false) {
  404. sys_write32(lcd_pin_backup[1], GPION_CTL(21)); /* lcd GND_LEDK */
  405. sys_write32(lcd_pin_backup[2], GPION_CTL(32)); /* lcd reset */
  406. }
  407. }
  408. }
  409. #endif /* CONFIG_PANEL */
  410. SYS_INIT(board_early_init, PRE_KERNEL_1, 5);
  411. SYS_INIT(board_later_init, POST_KERNEL, 5);