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drivers
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cfg_drv
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pinctrl_leopard.h

pinctrl_leopard.h 22 KB
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  1. /*
    2. 

  2.  * Copyright (c) 2020 Linaro Limited
    3. 

  3.  * SPDX-License-Identifier: Apache-2.0
    4. 

  4.  */
    5. 

  5. 

  6. #ifndef PINCTRL_LEOPARD_H_
    7. 

  7. #define PINCTRL_LEOPARD_H_
    8. 

  8. 

  9. #define PIN_MFP_SET(pin, val)				\
    10. 

  10. 	{.pin_num = pin,		\
    11. 

  11. 	 .mode = val}
    12. 

  12. 

  13. 

  14. #define GPIO_CTL_MFP_SHIFT				(0)
    15. 

  15. #define GPIO_CTL_MFP_MASK				(0x1f << GPIO_CTL_MFP_SHIFT)
    16. 

  16. #define GPIO_CTL_MFP_GPIO				(0x0 << GPIO_CTL_MFP_SHIFT)
    17. 

  17. #define GPIO_CTL_MFP(x)					(x << GPIO_CTL_MFP_SHIFT)
    18. 

  18. #define GPIO_CTL_SMIT					(0x1 << 5)
    19. 

  19. #define GPIO_CTL_GPIO_OUTEN				(0x1 << 6)
    20. 

  20. #define GPIO_CTL_GPIO_INEN				(0x1 << 7)
    21. 

  21. #define GPIO_CTL_PULL_MASK				(0xf << 8)
    22. 

  22. #define GPIO_CTL_PULLUP_STRONG			(0x1 << 8)
    23. 

  23. #define GPIO_CTL_PULLDOWN				(0x1 << 9)
    24. 

  24. #define GPIO_CTL_PULLUP					(0x1 << 11)
    25. 

  25. #define GPIO_CTL_PULLUP_4K7					(0x1 << 10)
    26. 

  26. #define GPIO_CTL_PADDRV_SHIFT			(12)
    27. 

  27. #define GPIO_CTL_PADDRV_LEVEL(x)		((x) << GPIO_CTL_PADDRV_SHIFT)
    28. 

  28. #define GPIO_CTL_PADDRV_MASK			GPIO_CTL_PADDRV_LEVEL(0x7)
    29. 

  29. #define GPIO_CTL_SR         			(0x1 << 15)
    30. 

  30. #define GPIO_CTL_INTC_EN				(0x1 << 20)
    31. 

  31. #define GPIO_CTL_INC_TRIGGER_SHIFT			(21)
    32. 

  32. #define GPIO_CTL_INC_TRIGGER(x)				((x) << GPIO_CTL_INC_TRIGGER_SHIFT)
    33. 

  33. #define GPIO_CTL_INC_TRIGGER_MASK			GPIO_CTL_INC_TRIGGER(0x7)
    34. 

  34. #define GPIO_CTL_INC_TRIGGER_RISING_EDGE	GPIO_CTL_INC_TRIGGER(0x0)
    35. 

  35. #define GPIO_CTL_INC_TRIGGER_FALLING_EDGE	GPIO_CTL_INC_TRIGGER(0x1)
    36. 

  36. #define GPIO_CTL_INC_TRIGGER_DUAL_EDGE		GPIO_CTL_INC_TRIGGER(0x2)
    37. 

  37. #define GPIO_CTL_INC_TRIGGER_HIGH_LEVEL		GPIO_CTL_INC_TRIGGER(0x3)
    38. 

  38. #define GPIO_CTL_INC_TRIGGER_LOW_LEVEL		GPIO_CTL_INC_TRIGGER(0x4)
    39. 

  39. #define GPIO_CTL_INTC_MASK					(0x1 << 25)
    40. 

  40. 

  41. 

  42. /*********I2C mfp config*****************/
    43. 

  43. #define MFP0_I2C	8
    44. 

  44. #define MFP1_I2C	9
    45. 

  45. #define MFP2_I2C	14
    46. 

  46. #define MFP3_I2C	15
    47. 

  47. #define I2C_MFP_CFG(x)	(GPIO_CTL_MFP(x)|GPIO_CTL_PULLUP_4K7|GPIO_CTL_PADDRV_LEVEL(3))
    48. 

  48. 

  49. 

  50. #define gpio74_i2c0_clk_node	PIN_MFP_SET(74, I2C_MFP_CFG(MFP0_I2C))
    51. 

  51. #define gpio22_i2c0_data_node	PIN_MFP_SET(22, I2C_MFP_CFG(MFP0_I2C))
    52. 

  52. 

  53. #define gpio24_i2c0_clk_node	PIN_MFP_SET(24, I2C_MFP_CFG(MFP0_I2C))
    54. 

  54. #define gpio25_i2c0_data_node	PIN_MFP_SET(25, I2C_MFP_CFG(MFP0_I2C))
    55. 

  55. 

  56. 

  57. #define gpio28_i2c0_clk_node	PIN_MFP_SET(28, I2C_MFP_CFG(MFP0_I2C))
    58. 

  58. #define gpio29_i2c0_data_node	PIN_MFP_SET(29, I2C_MFP_CFG(MFP0_I2C))
    59. 

  59. 

  60. 

  61. #define gpio20_i2c1_clk_node	PIN_MFP_SET(20, I2C_MFP_CFG(MFP1_I2C))
    62. 

  62. #define gpio21_i2c1_data_node	PIN_MFP_SET(21, I2C_MFP_CFG(MFP1_I2C))
    63. 

  63. 

  64. #define gpio18_i2c1_clk_node	PIN_MFP_SET(18, I2C_MFP_CFG(MFP1_I2C))
    65. 

  65. #define gpio19_i2c1_data_node	PIN_MFP_SET(19, I2C_MFP_CFG(MFP1_I2C))
    66. 

  66. 

  67. #define gpio28_i2c1_clk_node	PIN_MFP_SET(28, I2C_MFP_CFG(MFP1_I2C))
    68. 

  68. #define gpio29_i2c1_data_node	PIN_MFP_SET(29, I2C_MFP_CFG(MFP1_I2C))
    69. 

  69. 

  70. #define gpio57_i2c0_clk_node	PIN_MFP_SET(57, I2C_MFP_CFG(MFP0_I2C))
    71. 

  71. #define gpio58_i2c0_data_node	PIN_MFP_SET(58, I2C_MFP_CFG(MFP0_I2C))
    72. 

  72. 

  73. #define gpio59_i2c1_clk_node	PIN_MFP_SET(59, I2C_MFP_CFG(MFP1_I2C))
    74. 

  74. #define gpio60_i2c1_data_node	PIN_MFP_SET(60, I2C_MFP_CFG(MFP1_I2C))
    75. 

  75. 

  76. /*********I2CMT mfp config*****************/
    77. 

  77. #define MFP0_I2CMT	26
    78. 

  78. #define MFP1_I2CMT	27
    79. 

  79. #define I2CMT_MFP_CFG(x)	(GPIO_CTL_MFP(x)|GPIO_CTL_PULLUP_4K7|GPIO_CTL_PADDRV_LEVEL(3))
    80. 

  80. 

  81. #define gpio22_i2cmt0_clk_node	PIN_MFP_SET(22, I2CMT_MFP_CFG(MFP0_I2CMT))
    82. 

  82. #define gpio23_i2cmt0_data_node	PIN_MFP_SET(23, I2CMT_MFP_CFG(MFP0_I2CMT))
    83. 

  83. 

  84. #define gpio24_i2cmt0_clk_node	PIN_MFP_SET(24, I2CMT_MFP_CFG(MFP0_I2CMT))
    85. 

  85. #define gpio25_i2cmt0_data_node	PIN_MFP_SET(25, I2CMT_MFP_CFG(MFP0_I2CMT))
    86. 

  86. 

  87. #define gpio49_i2cmt0_clk_node	PIN_MFP_SET(49, I2CMT_MFP_CFG(MFP0_I2CMT))
    88. 

  88. #define gpio50_i2cmt0_data_node	PIN_MFP_SET(50, I2CMT_MFP_CFG(MFP0_I2CMT))
    89. 

  89. 

  90. #define gpio51_i2cmt1_clk_node	PIN_MFP_SET(51,  I2CMT_MFP_CFG(MFP1_I2CMT))
    91. 

  91. #define gpio52_i2cmt1_data_node	PIN_MFP_SET(52,  I2CMT_MFP_CFG(MFP1_I2CMT))
    92. 

  92. 

  93. #define gpio59_i2cmt1_clk_node	PIN_MFP_SET(59,  I2CMT_MFP_CFG(MFP1_I2CMT))
    94. 

  94. #define gpio60_i2cmt1_data_node	PIN_MFP_SET(60,  I2CMT_MFP_CFG(MFP1_I2CMT))
    95. 

  95. 

  96. /*********SPI mfp config*****************/
    97. 

  97. #define MFP_SPI0	6
    98. 

  98. #define MFP_SPI0_1	7
    99. 

  99. #define MFP_SPI1	2
    100. 

  100. #define MFP_SPI2	3
    101. 

  101. #define MFP_SPI3	4
    102. 

  102. 

  103. #define SPI_MFP_CFG(x)	(GPIO_CTL_MFP(x)|GPIO_CTL_PULLUP_STRONG|GPIO_CTL_PADDRV_LEVEL(3))
    104. 

  104. #define SPI2_MFP_CFG(x)	(GPIO_CTL_MFP(x)|GPIO_CTL_PULLUP_STRONG|GPIO_CTL_PADDRV_LEVEL(5))
    105. 

  105. 

  106. #define gpio24_spi1_ss_node		PIN_MFP_SET(24,  SPI_MFP_CFG(MFP_SPI1))
    107. 

  107. #define gpio25_spi1_clk_node	PIN_MFP_SET(25,  SPI_MFP_CFG(MFP_SPI1))
    108. 

  108. #define gpio26_spi1_miso_node	PIN_MFP_SET(26,  SPI_MFP_CFG(MFP_SPI1))
    109. 

  109. #define gpio27_spi1_mosi_node	PIN_MFP_SET(27,  SPI_MFP_CFG(MFP_SPI1))
    110. 

  110. 

  111. 

  112. #define gpio30_spi2_ss_node		PIN_MFP_SET(30,  SPI2_MFP_CFG(MFP_SPI2))
    113. 

  113. #define gpio31_spi2_clk_node	PIN_MFP_SET(31,  SPI2_MFP_CFG(MFP_SPI2))
    114. 

  114. #define gpio32_spi2_miso_node	PIN_MFP_SET(32,  SPI2_MFP_CFG(MFP_SPI2))
    115. 

  115. #define gpio33_spi2_mosi_node	PIN_MFP_SET(33,  SPI2_MFP_CFG(MFP_SPI2))
    116. 

  116. 

  117. #define gpio20_spi3_ss_node		PIN_MFP_SET(20,  SPI2_MFP_CFG(MFP_SPI3))
    118. 

  118. #define gpio21_spi3_clk_node	PIN_MFP_SET(21,  SPI2_MFP_CFG(MFP_SPI3))
    119. 

  119. #define gpio22_spi3_miso_node	PIN_MFP_SET(22,  SPI2_MFP_CFG(MFP_SPI3))
    120. 

  120. #define gpio23_spi3_mosi_node	PIN_MFP_SET(23,  SPI2_MFP_CFG(MFP_SPI3))
    121. 

  121. 

  122. /*********SPIMT mfp config*****************/
    123. 

  123. #define MFP0_SPIMT	24
    124. 

  124. #define MFP1_SPIMT	25
    125. 

  125. 

  126. #define SPIMT_MFP_CFG(x)	(GPIO_CTL_MFP(x)|GPIO_CTL_PULLUP_STRONG|GPIO_CTL_PADDRV_LEVEL(3))
    127. 

  127. 

  128. #define gpio49_spimt0_ss_node	PIN_MFP_SET(49,  SPIMT_MFP_CFG(MFP0_SPIMT))
    129. 

  129. #define gpio50_spimt0_clk_node	PIN_MFP_SET(50,  SPIMT_MFP_CFG(MFP0_SPIMT))
    130. 

  130. #define gpio51_spimt0_miso_node	PIN_MFP_SET(51,  SPIMT_MFP_CFG(MFP0_SPIMT))
    131. 

  131. #define gpio52_spimt0_mosi_node	PIN_MFP_SET(52,  SPIMT_MFP_CFG(MFP0_SPIMT))
    132. 

  132. #define gpio61_spimt0_ss1_node	PIN_MFP_SET(61,  SPIMT_MFP_CFG(MFP0_SPIMT))
    133. 

  133. 

  134. #define gpio53_spimt1_ss_node	PIN_MFP_SET(53,  SPIMT_MFP_CFG(MFP1_SPIMT))
    135. 

  135. #define gpio54_spimt1_clk_node	PIN_MFP_SET(54,  SPIMT_MFP_CFG(MFP1_SPIMT))
    136. 

  136. #define gpio55_spimt1_miso_node	PIN_MFP_SET(55,  SPIMT_MFP_CFG(MFP1_SPIMT))
    137. 

  137. #define gpio56_spimt1_mosi_node	PIN_MFP_SET(56,  SPIMT_MFP_CFG(MFP1_SPIMT))
    138. 

  138. 

  139. /* lcdc */
    140. 

  140. #ifndef LCD_PADDRV_LEVEL
    141. 

  141. #  define LCD_PADDRV_LEVEL (1)
    142. 

  142. #endif
    143. 

  143. #ifndef LCD_CLK_PADDRV_LEVEL
    144. 

  144. #  define LCD_CLK_PADDRV_LEVEL (1)
    145. 

  145. #endif
    146. 

  146. 

  147. #define LCD_MFP_SEL                  (19 | GPIO_CTL_PADDRV_LEVEL(LCD_PADDRV_LEVEL))
    148. 

  148. #define LCD_MFP_CLK_SEL              (19 | GPIO_CTL_PADDRV_LEVEL(LCD_CLK_PADDRV_LEVEL))
    149. 

  149. #define gpio30_lcd_ce0_hsync_node    PIN_MFP_SET(30, (GPIO_CTL_MFP(LCD_MFP_SEL)|GPIO_CTL_PULLUP))
    150. 

  150. #define gpio31_lcd_ce1_node          PIN_MFP_SET(31, (GPIO_CTL_MFP(LCD_MFP_SEL)|GPIO_CTL_PULLUP))
    151. 

  151. #define gpio32_lcd_rs_vsync_sda_node PIN_MFP_SET(32, LCD_MFP_SEL)
    152. 

  152. #define gpio33_lcd_rde_lde_cdx_node  PIN_MFP_SET(33, LCD_MFP_SEL)
    153. 

  153. #define gpio34_lcd_wr_dclk_scl_node  PIN_MFP_SET(34, LCD_MFP_SEL)
    154. 

  154. #define gpio35_lcd_te_sdo_node       PIN_MFP_SET(35, LCD_MFP_SEL)
    155. 

  155. 

  156. #define gpio14_lcd_d0_node           PIN_MFP_SET(14, LCD_MFP_SEL)
    157. 

  157. #define gpio15_lcd_d1_node           PIN_MFP_SET(15, LCD_MFP_SEL)
    158. 

  158. #define gpio16_lcd_d2_node           PIN_MFP_SET(16, LCD_MFP_SEL)
    159. 

  159. #define gpio17_lcd_d3_node           PIN_MFP_SET(17, LCD_MFP_SEL)
    160. 

  160. #define gpio18_lcd_d4_node           PIN_MFP_SET(18, LCD_MFP_SEL)
    161. 

  161. #define gpio19_lcd_d5_node           PIN_MFP_SET(19, LCD_MFP_SEL)
    162. 

  162. #define gpio20_lcd_d6_node           PIN_MFP_SET(20, LCD_MFP_SEL)
    163. 

  163. #define gpio21_lcd_d7_node           PIN_MFP_SET(21, LCD_MFP_SEL)
    164. 

  164. 

  165. #define gpio14_lcd_ce0_hsync_node    PIN_MFP_SET(14,   (GPIO_CTL_MFP(LCD_MFP_SEL)|GPIO_CTL_PULLUP))
    166. 

  166. #define gpio15_lcd_ce1_node          PIN_MFP_SET(15,   LCD_MFP_SEL)
    167. 

  167. #define gpio16_lcd_d8_node           PIN_MFP_SET(16,   LCD_MFP_SEL)
    168. 

  168. #define gpio17_lcd_d9_node           PIN_MFP_SET(17,   LCD_MFP_SEL)
    169. 

  169. #define gpio18_lcd_d10_node          PIN_MFP_SET(18,   LCD_MFP_SEL)
    170. 

  170. #define gpio19_lcd_d11_node          PIN_MFP_SET(19,   LCD_MFP_SEL)
    171. 

  171. #define gpio20_lcd_d12_node          PIN_MFP_SET(20,   LCD_MFP_SEL)
    172. 

  172. #define gpio21_lcd_d13_node          PIN_MFP_SET(21,   LCD_MFP_SEL)
    173. 

  173. #define gpio22_lcd_d14_node          PIN_MFP_SET(22,   LCD_MFP_SEL)
    174. 

  174. #define gpio23_lcd_d15_node          PIN_MFP_SET(23,   LCD_MFP_SEL)
    175. 

  175. #define gpio24_lcd_d0_node           PIN_MFP_SET(24,   LCD_MFP_SEL)
    176. 

  176. #define gpio25_lcd_d1_node           PIN_MFP_SET(25,   LCD_MFP_SEL)
    177. 

  177. #define gpio26_lcd_d2_node           PIN_MFP_SET(26,   LCD_MFP_SEL)
    178. 

  178. #define gpio27_lcd_d3_node           PIN_MFP_SET(27,   LCD_MFP_SEL)
    179. 

  179. #define gpio28_lcd_d4_node           PIN_MFP_SET(28,   LCD_MFP_SEL)
    180. 

  180. #define gpio29_lcd_d5_node           PIN_MFP_SET(29,   LCD_MFP_SEL)
    181. 

  181. #define gpio30_lcd_d6_node           PIN_MFP_SET(30,   LCD_MFP_SEL)
    182. 

  182. #define gpio31_lcd_d7_node           PIN_MFP_SET(31,   LCD_MFP_SEL)
    183. 

  183. #define gpio32_lcd_rs_vsync_sda_node PIN_MFP_SET(32,   LCD_MFP_SEL)
    184. 

  184. #define gpio33_lcd_rde_lde_cdx_node  PIN_MFP_SET(33,   LCD_MFP_SEL)
    185. 

  185. #define gpio34_lcd_wr_dclk_scl_node  PIN_MFP_SET(34,   LCD_MFP_SEL)
    186. 

  186. #define gpio35_lcd_te_sdo_node       PIN_MFP_SET(35,   LCD_MFP_SEL)
    187. 

  187. /* lcdc fpga 1.8v*/
    188. 

  188. #define gpio30_lcd_ce0_hsync_node    PIN_MFP_SET(30,  (GPIO_CTL_MFP(LCD_MFP_SEL)|GPIO_CTL_PULLUP))
    189. 

  189. #define gpio34_lcd_wr_dclk_scl_node  PIN_MFP_SET(34,  LCD_MFP_SEL)
    190. 

  190. #define gpio14_lcd_d0_node           PIN_MFP_SET(14,  LCD_MFP_SEL)
    191. 

  191. #define gpio15_lcd_d1_node           PIN_MFP_SET(15,  LCD_MFP_SEL)
    192. 

  192. #define gpio16_lcd_d2_node           PIN_MFP_SET(16,  LCD_MFP_SEL)
    193. 

  193. #define gpio17_lcd_d3_node           PIN_MFP_SET(17,  LCD_MFP_SEL)
    194. 

  194. #define gpio18_lcd_d4_node           PIN_MFP_SET(18,  LCD_MFP_SEL)
    195. 

  195. #define gpio19_lcd_d5_node           PIN_MFP_SET(19,  LCD_MFP_SEL)
    196. 

  196. #define gpio20_lcd_d6_node           PIN_MFP_SET(20,  LCD_MFP_SEL)
    197. 

  197. #define gpio21_lcd_d7_node           PIN_MFP_SET(21,  LCD_MFP_SEL)
    198. 

  198. 

  199. //#define gpio24_lcd_d10_node          PIN_MFP_SET(24, LCD_MFP_SEL)
    200. 

  200. //#define gpio25_lcd_d11_node          PIN_MFP_SET(25, LCD_MFP_SEL)
    201. 

  201. //#define gpio26_lcd_d12_node          PIN_MFP_SET(26, LCD_MFP_SEL)
    202. 

  202. //#define gpio27_lcd_d13_node          PIN_MFP_SET(27, LCD_MFP_SEL)
    203. 

  203. //#define gpio28_lcd_d14_node          PIN_MFP_SET(28, LCD_MFP_SEL)
    204. 

  204. //#define gpio29_lcd_d15_node          PIN_MFP_SET(29, LCD_MFP_SEL)
    205. 

  205. 

  206. /* sd0 */
    207. 

  207. #define SDC0_MFP_SEL             10
    208. 

  208. #define SDC0_MFP_CFG_VAL	(GPIO_CTL_MFP(SDC0_MFP_SEL)|GPIO_CTL_PULLUP|GPIO_CTL_PADDRV_LEVEL(5))
    209. 

  209. 

  210. //#define gpio0_sdc0_cmd_node  PIN_MFP_SET(0, sdc0, cmd,  SDC0_MFP_CFG_VAL)
    211. 

  211. //#define gpio1_sdc0_clk_node  PIN_MFP_SET(1, sdc0, clk,  (GPIO_CTL_MFP(SDC0_MFP_SEL)|GPIO_CTL_PADDRV_LEVEL(3)))
    212. 

  212. //#define gpio2_sdc0_d0_node   PIN_MFP_SET(2, sdc0, d0,   SDC0_MFP_CFG_VAL)
    213. 

  213. //#define gpio3_sdc0_d1_node   PIN_MFP_SET(3, sdc0, d1,   SDC0_MFP_CFG_VAL)
    214. 

  214. //#define gpio4_sdc0_d2_node   PIN_MFP_SET(4, sdc0, d2,   SDC0_MFP_CFG_VAL)
    215. 

  215. //#define gpio5_sdc0_d3_node   PIN_MFP_SET(5, sdc0, d3,   SDC0_MFP_CFG_VAL)
    216. 

  216. //#define gpio6_sdc0_d4_node   PIN_MFP_SET(6, sdc0, d4,   SDC0_MFP_CFG_VAL)
    217. 

  217. //#define gpio7_sdc0_d5_node   PIN_MFP_SET(7, sdc0, d5,   SDC0_MFP_CFG_VAL)
    218. 

  218. //#define gpio8_sdc0_d6_node   PIN_MFP_SET(8, sdc0, d6,   SDC0_MFP_CFG_VAL)
    219. 

  219. //#define gpio9_sdc0_d7_node   PIN_MFP_SET(9, sdc0, d7,   SDC0_MFP_CFG_VAL)
    220. 

  220. 

  221. #define gpio11_sdc0_cmd_node  PIN_MFP_SET(11,   SDC0_MFP_CFG_VAL)
    222. 

  222. #define gpio10_sdc0_clk_node  PIN_MFP_SET(10,  (GPIO_CTL_MFP(SDC0_MFP_SEL)|GPIO_CTL_PADDRV_LEVEL(3)))
    223. 

  223. #define gpio12_sdc0_d0_node   PIN_MFP_SET(12,   SDC0_MFP_CFG_VAL)
    224. 

  224. #define gpio13_sdc0_d1_node   PIN_MFP_SET(13,    SDC0_MFP_CFG_VAL)
    225. 

  225. #define gpio8_sdc0_d2_node   PIN_MFP_SET(8,    SDC0_MFP_CFG_VAL)
    226. 

  226. #define gpio9_sdc0_d3_node   PIN_MFP_SET(9,    SDC0_MFP_CFG_VAL)
    227. 

  227. 

  228. /* sd1 */
    229. 

  229. #define SDC1_MFP_SEL             20
    230. 

  230. #define SDC1_MFP_CFG_VAL	(GPIO_CTL_MFP(SDC1_MFP_SEL)|GPIO_CTL_PULLUP|GPIO_CTL_PADDRV_LEVEL(5))
    231. 

  231. 

  232. #define gpio44_sdc1_cmd_node  PIN_MFP_SET(44,   SDC1_MFP_SEL)
    233. 

  233. #define gpio43_sdc1_clk_node  PIN_MFP_SET(43,   (GPIO_CTL_MFP(SDC1_MFP_SEL)|GPIO_CTL_PADDRV_LEVEL(3)))
    234. 

  234. #define gpio45_sdc1_d0_node   PIN_MFP_SET(45,   SDC1_MFP_CFG_VAL)
    235. 

  235. #define gpio46_sdc1_d1_node   PIN_MFP_SET(46,   SDC1_MFP_CFG_VAL)
    236. 

  236. #define gpio41_sdc1_d2_node   PIN_MFP_SET(41,   SDC1_MFP_CFG_VAL)
    237. 

  237. #define gpio42_sdc1_d3_node   PIN_MFP_SET(42,   SDC1_MFP_CFG_VAL)
    238. 

  238. 

  239. 

  240. /* uart0  */
    241. 

  241. #define UART0_MFP_SEL           5
    242. 

  242. #define UART0_MFP_CFG (GPIO_CTL_MFP(UART0_MFP_SEL)|GPIO_CTL_SMIT|GPIO_CTL_PULLUP_STRONG|GPIO_CTL_PADDRV_LEVEL(4))
    243. 

  243. #define gpio10_uart0_tx_node    PIN_MFP_SET(10,  UART0_MFP_CFG)
    244. 

  244. #define gpio11_uart0_rx_node    PIN_MFP_SET(11,  UART0_MFP_CFG)
    245. 

  245. #define gpio28_uart0_tx_node    PIN_MFP_SET(28,  UART0_MFP_CFG)
    246. 

  246. #define gpio29_uart0_rx_node    PIN_MFP_SET(29,  UART0_MFP_CFG)
    247. 

  247. #define gpio37_uart0_tx_node    PIN_MFP_SET(37,  UART0_MFP_CFG)
    248. 

  248. #define gpio38_uart0_rx_node    PIN_MFP_SET(38,  UART0_MFP_CFG)
    249. 

  249. #define gpio63_uart0_tx_node    PIN_MFP_SET(63,  UART0_MFP_CFG)
    250. 

  250. #define gpio62_uart0_rx_node    PIN_MFP_SET(62,  UART0_MFP_CFG)
    251. 

  251. 

  252. /* uart1 */
    253. 

  253. #define UART1_MFP_SEL			6
    254. 

  254. #define UART1_MFP_CFG (GPIO_CTL_MFP(UART1_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PULLUP_STRONG | GPIO_CTL_PADDRV_LEVEL(4))
    255. 

  255. #define gpio16_uart1_tx_node		PIN_MFP_SET(16, UART1_MFP_CFG)
    256. 

  256. #define gpio17_uart1_rx_node		PIN_MFP_SET(17, UART1_MFP_CFG)
    257. 

  257. 

  258. /* uart2 */
    259. 

  259. #define UART2_MFP_SEL			7
    260. 

  260. #define UART2_MFP_CFG (GPIO_CTL_MFP(UART2_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PULLUP_STRONG | GPIO_CTL_PADDRV_LEVEL(4))
    261. 

  261. #define gpio53_uart2_tx_node		PIN_MFP_SET(53, UART2_MFP_CFG)
    262. 

  262. #define gpio54_uart2_rx_node		PIN_MFP_SET(54, UART2_MFP_CFG)
    263. 

  263. #define gpio26_uart2_tx_node		PIN_MFP_SET(26, UART2_MFP_CFG)
    264. 

  264. #define gpio27_uart2_rx_node		PIN_MFP_SET(27, UART2_MFP_CFG)
    265. 

  265. 

  266. 

  267. /* SPDIFTX */
    268. 

  268. #define SPDIFTX_MFP_SEL           14
    269. 

  269. #define SPDIFTX_MFP_CFG	(GPIO_CTL_MFP(SPDIFTX_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    270. 

  270. #define gpio9_spdiftx0_d0_node   PIN_MFP_SET(9, SPDIFTX_MFP_CFG)
    271. 

  271. #define gpio62_spdiftx0_d0_node   PIN_MFP_SET(62, SPDIFTX_MFP_CFG)
    272. 

  272. 

  273. /* SPDIFRX */
    274. 

  274. #define SPDIFRX_MFP_SEL           15
    275. 

  275. #define SPDIFRX_MFP_CFG	(GPIO_CTL_MFP(SPDIFRX_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    276. 

  276. #define gpio13_spdifrx0_d0_node   PIN_MFP_SET(13,  SPDIFRX_MFP_CFG)
    277. 

  277. #define gpio63_spdifrx0_d0_node   PIN_MFP_SET(63,  SPDIFRX_MFP_CFG)
    278. 

  278. 

  279. /* I2STX */
    280. 

  280. #define I2STX_MFP_SEL             12
    281. 

  281. #define I2STX_MFP_CFG (GPIO_CTL_MFP(I2STX_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    282. 

  282. #define gpio39_i2stx0_d0_node     PIN_MFP_SET(39,   I2STX_MFP_CFG)
    283. 

  283. #define gpio16_i2stx0_mclk_node   PIN_MFP_SET(16,   I2STX_MFP_CFG)
    284. 

  284. #define gpio17_i2stx0_bclk_node   PIN_MFP_SET(17,   I2STX_MFP_CFG)
    285. 

  285. #define gpio18_i2stx0_lrclk_node  PIN_MFP_SET(18,   I2STX_MFP_CFG)
    286. 

  286. 

  287. #define gpio9_i2stx0_d0_node     PIN_MFP_SET(9,  I2STX_MFP_CFG)
    288. 

  288. #define gpio6_i2stx0_mclk_node   PIN_MFP_SET(6,  I2STX_MFP_CFG)
    289. 

  289. #define gpio7_i2stx0_bclk_node   PIN_MFP_SET(7,  I2STX_MFP_CFG)
    290. 

  290. #define gpio8_i2stx0_lrclk_node  PIN_MFP_SET(8,  I2STX_MFP_CFG)
    291. 

  291. 

  292. #define gpio49_i2stx0_mclk_node  PIN_MFP_SET(49, I2STX_MFP_CFG)
    293. 

  293. #define gpio50_i2stx0_bclk_node  PIN_MFP_SET(50, I2STX_MFP_CFG)
    294. 

  294. #define gpio51_i2stx0_lrclk_node PIN_MFP_SET(51, I2STX_MFP_CFG)
    295. 

  295. #define gpio52_i2stx0_d0_node    PIN_MFP_SET(52, I2STX_MFP_CFG)
    296. 

  296. 

  297. /* I2SRX */
    298. 

  298. #define I2SRX_MFP_SEL             13
    299. 

  299. #define I2SRX_MFP_CFG (GPIO_CTL_MFP(I2SRX_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    300. 

  300. #define gpio43_i2srx0_d0_node     PIN_MFP_SET(43,  I2SRX_MFP_CFG)
    301. 

  301. #define gpio19_i2srx0_mclk_node   PIN_MFP_SET(19,  I2SRX_MFP_CFG)
    302. 

  302. #define gpio20_i2srx0_bclk_node   PIN_MFP_SET(20,  I2SRX_MFP_CFG)
    303. 

  303. #define gpio21_i2srx0_lrclk_node  PIN_MFP_SET(21,  I2SRX_MFP_CFG)
    304. 

  304. 

  305. #define gpio9_i2srx0_d0_node      PIN_MFP_SET(9,   I2SRX_MFP_CFG)
    306. 

  306. #define gpio40_i2srx0_mclk_node   PIN_MFP_SET(40,  I2SRX_MFP_CFG)
    307. 

  307. #define gpio6_i2srx0_bclk_node    PIN_MFP_SET(6,   I2SRX_MFP_CFG)
    308. 

  308. #define gpio7_i2srx0_lrclk_node   PIN_MFP_SET(7,   I2SRX_MFP_CFG)
    309. 

  309. 

  310. #define gpio53_i2srx0_mclk_node   PIN_MFP_SET(53,   I2SRX_MFP_CFG)
    311. 

  311. #define gpio54_i2srx0_bclk_node   PIN_MFP_SET(54,   I2SRX_MFP_CFG)
    312. 

  312. #define gpio55_i2srx0_lrclk_node  PIN_MFP_SET(55,   I2SRX_MFP_CFG)
    313. 

  313. #define gpio56_i2srx0_d0_node     PIN_MFP_SET(56,   I2SRX_MFP_CFG)
    314. 

  314. 

  315. /* TP KEY */
    316. 

  316. 

  317. #define gpio12_tp_rst_node	PIN_MFP_SET(12,  GPIO_CTL_GPIO_OUTEN)
    318. 

  318. #define gpio30_tp_rst_node	PIN_MFP_SET(30,  GPIO_CTL_GPIO_OUTEN)
    319. 

  319. 

  320. #define gpio13_tp_isr_node	PIN_MFP_SET(13,  GPIO_CTL_GPIO_OUTEN)
    321. 

  321. #define gpio31_tp_isr_node	PIN_MFP_SET(31,  GPIO_CTL_GPIO_OUTEN)
    322. 

  322. 

  323. 

  324. 

  325. /* GPIO KEY */
    326. 

  326. 

  327. #define GPIOKEY_MFP_PU_CFG (GPIO_CTL_SMIT | GPIO_CTL_PULLUP | GPIO_CTL_GPIO_INEN | GPIO_CTL_INTC_EN | GPIO_CTL_INC_TRIGGER_DUAL_EDGE)
    328. 

  328. #define GPIOKEY_MFP_CFG (GPIO_CTL_SMIT | GPIO_CTL_GPIO_INEN | GPIO_CTL_INTC_EN | GPIO_CTL_INC_TRIGGER_DUAL_EDGE)
    329. 

  329. 

  330. #define gpio17_keygpio_key0_node   PIN_MFP_SET(17,   GPIOKEY_MFP_CFG)
    331. 

  331. #define gpio18_keygpio_key1_node   PIN_MFP_SET(18,   GPIOKEY_MFP_CFG)
    332. 

  332. #define gpio19_keygpio_key2_node   PIN_MFP_SET(19,   GPIOKEY_MFP_CFG)
    333. 

  333. #define gpio20_keygpio_key3_node   PIN_MFP_SET(20,   GPIOKEY_MFP_CFG)
    334. 

  334. #define gpio21_keygpio_key4_node   PIN_MFP_SET(21,   GPIOKEY_MFP_CFG)
    335. 

  335. #define gpio22_keygpio_key5_node   PIN_MFP_SET(22,   GPIOKEY_MFP_CFG)
    336. 

  336. #define gpio23_keygpio_key6_node   PIN_MFP_SET(23,   GPIOKEY_MFP_CFG)
    337. 

  337. #define gpio24_keygpio_key7_node   PIN_MFP_SET(24,   GPIOKEY_MFP_CFG)
    338. 

  338. #define gpio25_keygpio_key8_node   PIN_MFP_SET(25,   GPIOKEY_MFP_CFG)
    339. 

  339. #define gpio26_keygpio_key9_node   PIN_MFP_SET(26,   GPIOKEY_MFP_CFG)
    340. 

  340. 

  341. /* knob gpio */
    342. 

  342. #define GPIOKNOB_MFP_INT_CFG (GPIO_CTL_SMIT | GPIO_CTL_PULLUP | GPIO_CTL_GPIO_INEN | GPIO_CTL_INTC_EN | GPIO_CTL_INC_TRIGGER_DUAL_EDGE)
    343. 

  343. #define GPIOKNOB_MFP_CFG (GPIO_CTL_SMIT | GPIO_CTL_PULLUP | GPIO_CTL_GPIO_INEN )
    344. 

  344. 

  345. /* PWM */
    346. 

  346. #define PWM_MFP_CFG (0x12 | GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    347. 

  347. #define PWM_PIN_MFP_SET(pin, chan, val)				\
    348. 

  348. 	{.pin_num = pin,		\
    349. 

  349. 	 .pin_chan = chan,		\
    350. 

  350. 	 .mode = val}
    351. 

  351. 

  352. #define gpio03_pwm_chan0_node   PWM_PIN_MFP_SET(03, 0, PWM_MFP_CFG)
    353. 

  353. #define gpio04_pwm_chan0_node   PWM_PIN_MFP_SET(04, 0, PWM_MFP_CFG)
    354. 

  354. #define gpio14_pwm_chan0_node   PWM_PIN_MFP_SET(14, 0, PWM_MFP_CFG)
    355. 

  355. #define gpio36_pwm_chan0_node   PWM_PIN_MFP_SET(36, 0, PWM_MFP_CFG)
    356. 

  356. #define gpio49_pwm_chan0_node   PWM_PIN_MFP_SET(49, 0, PWM_MFP_CFG)
    357. 

  357. 

  358. #define gpio05_pwm_chan1_node   PWM_PIN_MFP_SET(05, 1, PWM_MFP_CFG)
    359. 

  359. #define gpio15_pwm_chan1_node   PWM_PIN_MFP_SET(15, 1, PWM_MFP_CFG)
    360. 

  360. #define gpio37_pwm_chan1_node   PWM_PIN_MFP_SET(37, 1, PWM_MFP_CFG)
    361. 

  361. #define gpio50_pwm_chan1_node   PWM_PIN_MFP_SET(50, 1, PWM_MFP_CFG)
    362. 

  362. 

  363. #define gpio06_pwm_chan2_node   PWM_PIN_MFP_SET(06, 2, PWM_MFP_CFG)
    364. 

  364. #define gpio21_pwm_chan2_node   PWM_PIN_MFP_SET(21, 2, PWM_MFP_CFG)
    365. 

  365. #define gpio38_pwm_chan2_node   PWM_PIN_MFP_SET(38, 2, PWM_MFP_CFG)
    366. 

  366. #define gpio51_pwm_chan2_node   PWM_PIN_MFP_SET(51, 2, PWM_MFP_CFG)
    367. 

  367. 

  368. #define gpio07_pwm_chan3_node   PWM_PIN_MFP_SET(07, 3, PWM_MFP_CFG)
    369. 

  369. #define gpio17_pwm_chan3_node   PWM_PIN_MFP_SET(17, 3, PWM_MFP_CFG)
    370. 

  370. #define gpio39_pwm_chan3_node   PWM_PIN_MFP_SET(39, 3, PWM_MFP_CFG)
    371. 

  371. #define gpio52_pwm_chan3_node   PWM_PIN_MFP_SET(52, 3, PWM_MFP_CFG)
    372. 

  372. 

  373. #define gpio08_pwm_chan4_node   PWM_PIN_MFP_SET(08, 4, PWM_MFP_CFG)
    374. 

  374. #define gpio18_pwm_chan4_node   PWM_PIN_MFP_SET(18, 4, PWM_MFP_CFG)
    375. 

  375. #define gpio40_pwm_chan4_node   PWM_PIN_MFP_SET(40, 4, PWM_MFP_CFG)
    376. 

  376. #define gpio53_pwm_chan4_node   PWM_PIN_MFP_SET(53, 4, PWM_MFP_CFG)
    377. 

  377. 

  378. #define gpio09_pwm_chan5_node   PWM_PIN_MFP_SET(09, 5, PWM_MFP_CFG)
    379. 

  379. #define gpio19_pwm_chan5_node   PWM_PIN_MFP_SET(19, 5, PWM_MFP_CFG)
    380. 

  380. #define gpio41_pwm_chan5_node   PWM_PIN_MFP_SET(41, 5, PWM_MFP_CFG)
    381. 

  381. #define gpio54_pwm_chan5_node   PWM_PIN_MFP_SET(54, 5, PWM_MFP_CFG)
    382. 

  382. 

  383. #define gpio10_pwm_chan6_node   PWM_PIN_MFP_SET(10, 6, PWM_MFP_CFG)
    384. 

  384. #define gpio20_pwm_chan6_node   PWM_PIN_MFP_SET(20, 6, PWM_MFP_CFG)
    385. 

  385. #define gpio42_pwm_chan6_node   PWM_PIN_MFP_SET(42, 6, PWM_MFP_CFG)
    386. 

  386. #define gpio55_pwm_chan6_node   PWM_PIN_MFP_SET(55, 6, PWM_MFP_CFG)
    387. 

  387. 

  388. #define gpio11_pwm_chan7_node   PWM_PIN_MFP_SET(11, 7, PWM_MFP_CFG)
    389. 

  389. #define gpio21_pwm_chan7_node   PWM_PIN_MFP_SET(21, 7, PWM_MFP_CFG)
    390. 

  390. #define gpio43_pwm_chan7_node   PWM_PIN_MFP_SET(43, 7, PWM_MFP_CFG)
    391. 

  391. #define gpio45_pwm_chan7_node   PWM_PIN_MFP_SET(45, 7, PWM_MFP_CFG)
    392. 

  392. #define gpio56_pwm_chan7_node   PWM_PIN_MFP_SET(56, 7, PWM_MFP_CFG)
    393. 

  393. 

  394. #define gpio12_pwm_chan7_node   PWM_PIN_MFP_SET(12, 8, PWM_MFP_CFG)
    395. 

  395. #define gpio22_pwm_chan7_node   PWM_PIN_MFP_SET(22, 8, PWM_MFP_CFG)
    396. 

  396. #define gpio44_pwm_chan7_node   PWM_PIN_MFP_SET(44, 8, PWM_MFP_CFG)
    397. 

  397. #define gpio46_pwm_chan7_node   PWM_PIN_MFP_SET(46, 8, PWM_MFP_CFG)
    398. 

  398. #define gpio57_pwm_chan7_node   PWM_PIN_MFP_SET(57, 8, PWM_MFP_CFG)
    399. 

  399. 

  400. 

  401. /* SPI NOR */
    402. 

  402. #define SPINOR_MFP_SEL             1
    403. 

  403. #define SPINOR_MFP_CFG (GPIO_CTL_MFP(SPINOR_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3) | GPIO_CTL_SR)
    404. 

  404. #define SPINOR_MFP_PU_CFG (GPIO_CTL_MFP(SPINOR_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3) | GPIO_CTL_PULLUP | GPIO_CTL_SR)
    405. 

  405. 

  406. #define SPINOR2_MFP_SEL             3
    407. 

  407. #define SPINOR2_MFP_CFG (GPIO_CTL_MFP(SPINOR2_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    408. 

  408. 

  409. #define SPI3_MFP_SEL             4
    410. 

  410. #define SPI3_MFP_CFG (GPIO_CTL_MFP(SPI3_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    411. 

  411. 

  412. 

  413. #define SPINOR_22_MFP_SEL            22
    414. 

  414. #define SPINOR_22_MFP_CFG (GPIO_CTL_MFP(SPINOR_22_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    415. 

  415. #define SPINOR_22_MFP_PU_CFG (GPIO_CTL_MFP(SPINOR_22_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3) | GPIO_CTL_PULLUP)
    416. 

  416. 

  417. #define gpio0_spinor0_cs_node	PIN_MFP_SET(0,   SPINOR_MFP_CFG)
    418. 

  418. #define gpio1_spinor0_miso_node	PIN_MFP_SET(1,   SPINOR_MFP_CFG)
    419. 

  419. #define gpio2_spinor0_clk_node	PIN_MFP_SET(2,   SPINOR_MFP_CFG)
    420. 

  420. #define gpio3_spinor0_mosi_node	PIN_MFP_SET(3,   SPINOR_MFP_CFG)
    421. 

  421. #define gpio6_spinor0_io2_node	PIN_MFP_SET(6,   SPINOR_MFP_PU_CFG)
    422. 

  422. #define gpio7_spinor0_io3_node	PIN_MFP_SET(7,   SPINOR_MFP_PU_CFG)
    423. 

  423. 

  424. /* HDMI CEC */
    425. 

  425. #define CEC_MFP_SEL             21
    426. 

  426. #define CEC_MFP_CFG (GPIO_CTL_MFP(CEC_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3) | GPIO_CTL_PULLUP)
    427. 

  427. #define gpio12_cec0_d0_node	PIN_MFP_SET(12,  CEC_MFP_CFG)
    428. 

  428. 

  429. /* ADC KEY */
    430. 

  430. #define ADCKEY_MFP_SEL          28
    431. 

  431. #define ADCKEY_MFP_CFG (GPIO_CTL_MFP(ADCKEY_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    432. 

  432. #define gpio21_adckey_lradc3_node	PIN_MFP_SET(21,  ADCKEY_MFP_CFG)
    433. 

  433. 

  434. /* SPI NAND */
    435. 

  435. #define SPINAND_MFP_SEL         4
    436. 

  436. #define SPINAND_MFP_CFG (GPIO_CTL_MFP(SPINAND_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    437. 

  437. #define SPINAND_MFP_PU_CFG (GPIO_CTL_MFP(SPINAND_MFP_SEL)| GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3) | GPIO_CTL_PULLUP)
    438. 

  438. #define gpio8_spinand3_io2_node	    PIN_MFP_SET(8,   SPINAND_MFP_PU_CFG)
    439. 

  439. #define gpio9_spinand3_io3_node	    PIN_MFP_SET(9,   SPINAND_MFP_PU_CFG)
    440. 

  440. #define gpio10_spinand3_ss_node	    PIN_MFP_SET(10,  SPINAND_MFP_CFG)
    441. 

  441. #define gpio11_spinand3_clk_node	PIN_MFP_SET(11,  SPINAND_MFP_CFG)
    442. 

  442. #define gpio12_spinand3_io1_node	PIN_MFP_SET(12,  SPINAND_MFP_CFG)
    443. 

  443. #define gpio13_spinand3_io0_node	PIN_MFP_SET(13,  SPINAND_MFP_CFG)
    444. 

  444. 

  445. #define gpio61_spinand3_io2_node	PIN_MFP_SET(61,  SPINAND_MFP_PU_CFG)
    446. 

  446. #define gpio62_spinand3_io3_node	PIN_MFP_SET(62,  SPINAND_MFP_PU_CFG)
    447. 

  447. #define gpio53_spinand3_ss_node     PIN_MFP_SET(53,  SPINAND_MFP_CFG)
    448. 

  448. #define gpio54_spinand3_clk_node	PIN_MFP_SET(54,  SPINAND_MFP_CFG)
    449. 

  449. #define gpio55_spinand3_io1_node	PIN_MFP_SET(55,  SPINAND_MFP_CFG)
    450. 

  450. #define gpio56_spinand3_io0_node	PIN_MFP_SET(56,  SPINAND_MFP_CFG)
    451. 

  451. 

  452. /* BATTERY NTC */
    453. 

  453. #define BATNTC_MFP_SEL          28
    454. 

  454. #define BATNTC_MFP_CFG (GPIO_CTL_MFP(BATNTC_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3))
    455. 

  455. #define BATNTC_REF_MFP_SEL      28
    456. 

  456. /* NTC ref config should pull up to vcc 3.4v */
    457. 

  457. #define BATNTC_REF_MFP_CFG (GPIO_CTL_MFP(BATNTC_REF_MFP_SEL) | GPIO_CTL_SMIT | GPIO_CTL_PADDRV_LEVEL(3) | GPIO_CTL_PULLUP_STRONG)
    458. 

  458. 

  459. #endif /* PINCTRL_LEOPARD_H_ */
    460.