linker.ld 14 KB

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  1. /*
  2. * Copyright (c) 2013-2014 Wind River Systems, Inc.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. /**
  7. * @file
  8. * @brief Linker command/script file
  9. *
  10. * Linker script for the Cortex-M platforms.
  11. */
  12. #include <autoconf.h>
  13. #include <linker/sections.h>
  14. #include <devicetree.h>
  15. #include <linker/linker-defs.h>
  16. #include <linker/linker-tool.h>
  17. #ifdef CONFIG_SECTION_OVERLAY
  18. #include <section_overlay.h>
  19. #endif
  20. /* physical address of RAM */
  21. #define ROMABLE_REGION FLASH
  22. #define RAMABLE_REGION PSRAM
  23. #define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET)
  24. #define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET)
  25. #define RAM_SIZE (CONFIG_SRAM_SIZE * 1K)
  26. #define RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
  27. /* Set alignment to CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
  28. * to make linker section alignment comply with MPU granularity.
  29. */
  30. #if defined(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
  31. _region_min_align = CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE;
  32. #else
  33. /* If building without MPU support, use default 4-byte alignment. */
  34. _region_min_align = 4;
  35. #endif
  36. #define MPU_ALIGN(region_size) . = ALIGN(_region_min_align)
  37. MEMORY
  38. {
  39. FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
  40. SRAM (wx) : ORIGIN = CONFIG_SRAM_BASE_ADDRESS, LENGTH = RAM_SIZE
  41. PSRAM (wx) : ORIGIN = CONFIG_PSRAM_BASE_ADDRESS, LENGTH = CONFIG_PSRAM_SIZE * 1K
  42. SHARE_RAM (wx) : ORIGIN = 0x2FF1AE00, LENGTH = 0x51FF
  43. DSP_SRAM (wx) : ORIGIN = 0x30044000, LENGTH = 0x14000
  44. /* Used by and documented in include/linker/intlist.ld */
  45. IDT_LIST (wx) : ORIGIN = (RAM_ADDR + RAM_SIZE), LENGTH = 2K
  46. }
  47. ENTRY(CONFIG_KERNEL_ENTRY)
  48. SECTIONS
  49. {
  50. #include <linker/rel-sections.ld>
  51. /*
  52. * .plt and .iplt are here according to 'arm-zephyr-elf-ld --verbose',
  53. * before text section.
  54. */
  55. /DISCARD/ :
  56. {
  57. *(.plt)
  58. }
  59. /DISCARD/ :
  60. {
  61. *(.iplt)
  62. }
  63. GROUP_START(ROMABLE_REGION)
  64. __rom_region_start = ROM_ADDR;
  65. SECTION_PROLOGUE(rom_start,,)
  66. {
  67. /* Located in generated directory. This file is populated by calling
  68. * zephyr_linker_sources(ROM_START ...). This typically contains the vector
  69. * table and debug information.
  70. */
  71. #include <snippets-rom-start.ld>
  72. } GROUP_LINK_IN(ROMABLE_REGION)
  73. SECTION_PROLOGUE(img_head,(ROM_ADDR+0x200),) AT (ROM_ADDR+0x200)
  74. {
  75. KEEP(*(.img_head*))
  76. } GROUP_LINK_IN(ROMABLE_REGION)
  77. SECTION_PROLOGUE(_ACTIONS_RODATA_SECTION_NAME,,)
  78. {
  79. . = ALIGN(4);
  80. __app_entry_table = .;
  81. KEEP(*(.app_entry))
  82. __app_entry_end = .;
  83. . = ALIGN(4);
  84. __service_entry_table = .;
  85. KEEP(*(.service_entry))
  86. __service_entry_end = .;
  87. . = ALIGN(4);
  88. __view_entry_table = .;
  89. KEEP(*(.view_entry))
  90. __view_entry_end = .;
  91. } GROUP_LINK_IN(ROMABLE_REGION)
  92. #ifdef CONFIG_SENSOR_ALGO
  93. #include <sensor_algo.ld>
  94. #endif
  95. SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
  96. {
  97. __text_region_start = .;
  98. #include <linker/kobject-text.ld>
  99. *(.text)
  100. *(".text.*")
  101. *(.gnu.linkonce.t.*)
  102. /*
  103. * These are here according to 'arm-zephyr-elf-ld --verbose',
  104. * after .gnu.linkonce.t.*
  105. */
  106. *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx)
  107. } GROUP_LINK_IN(ROMABLE_REGION)
  108. __text_region_end = .;
  109. /*#if defined (CONFIG_CPLUSPLUS)*/
  110. SECTION_PROLOGUE(.ARM.extab,,)
  111. {
  112. /*
  113. * .ARM.extab section containing exception unwinding information.
  114. */
  115. *(.ARM.extab* .gnu.linkonce.armextab.*)
  116. } GROUP_LINK_IN(ROMABLE_REGION)
  117. /*#endif*/
  118. SECTION_PROLOGUE(.ARM.exidx,,)
  119. {
  120. /*
  121. * This section, related to stack and exception unwinding, is placed
  122. * explicitly to prevent it from being shared between multiple regions.
  123. * It must be defined for gcc to support 64-bit math and avoid
  124. * section overlap.
  125. */
  126. __start_unwind_idx = .;
  127. __exidx_start = .;
  128. #if defined (__GCC_LINKER_CMD__)
  129. *(.ARM.exidx* gnu.linkonce.armexidx.*)
  130. #endif
  131. __exidx_end = .;
  132. __stop_unwind_idx = .;
  133. } GROUP_LINK_IN(ROMABLE_REGION)
  134. __rodata_region_start = .;
  135. #include <linker/common-rom.ld>
  136. #include <linker/thread-local-storage.ld>
  137. SECTION_PROLOGUE(_RODATA_SECTION_NAME,,)
  138. {
  139. *(.rodata)
  140. *(".rodata.*")
  141. *(.gnu.linkonce.r.*)
  142. /* Located in generated directory. This file is populated by the
  143. * zephyr_linker_sources() Cmake function.
  144. */
  145. #include <snippets-rodata.ld>
  146. #ifdef CONFIG_SECTION_OVERLAY
  147. . = ALIGN(4);
  148. __overlay_table = .;
  149. LONG(OVERLAY_TABLE_MAGIC)
  150. /* overlay items count */
  151. LONG(7)
  152. /* for a1_wav_p.a */
  153. LONG(OVERLAY_ID_LIBAPWAV)
  154. LONG(0);
  155. LONG(0);
  156. LONG(0);
  157. LONG(ABSOLUTE(ADDR(.overlay.data.apwav)));
  158. LONG(SIZEOF(.overlay.data.apwav));
  159. LONG(LOADADDR(.overlay.data.apwav));
  160. LONG(ABSOLUTE(ADDR(.overlay.bss.apwav)));
  161. LONG(SIZEOF(.overlay.bss.apwav));
  162. /* for a1_mp3_p.a */
  163. LONG(OVERLAY_ID_LIBAPMP3)
  164. LONG(0);
  165. LONG(0);
  166. LONG(0);
  167. LONG(ABSOLUTE(ADDR(.overlay.data.apmp3)));
  168. LONG(SIZEOF(.overlay.data.apmp3));
  169. LONG(LOADADDR(.overlay.data.apmp3));
  170. LONG(ABSOLUTE(ADDR(.overlay.bss.apmp3)));
  171. LONG(SIZEOF(.overlay.bss.apmp3));
  172. /* for a1_ape_p.a */
  173. LONG(OVERLAY_ID_LIBAPAPE)
  174. LONG(0);
  175. LONG(0);
  176. LONG(0);
  177. LONG(ABSOLUTE(ADDR(.overlay.data.apape)));
  178. LONG(SIZEOF(.overlay.data.apape));
  179. LONG(LOADADDR(.overlay.data.apape));
  180. LONG(ABSOLUTE(ADDR(.overlay.bss.apape)));
  181. LONG(SIZEOF(.overlay.bss.apape));
  182. /* for a1_w13_p.a */
  183. LONG(OVERLAY_ID_LIBAPWMA)
  184. LONG(0);
  185. LONG(0);
  186. LONG(0);
  187. LONG(ABSOLUTE(ADDR(.overlay.data.apwma)));
  188. LONG(SIZEOF(.overlay.data.apwma));
  189. LONG(LOADADDR(.overlay.data.apwma));
  190. LONG(ABSOLUTE(ADDR(.overlay.bss.apwma)));
  191. LONG(SIZEOF(.overlay.bss.apwma));
  192. /* for a1_fla_p.a */
  193. LONG(OVERLAY_ID_LIBADFLA)
  194. LONG(0);
  195. LONG(0);
  196. LONG(0);
  197. LONG(ABSOLUTE(ADDR(.overlay.data.apfla)));
  198. LONG(SIZEOF(.overlay.data.apfla));
  199. LONG(LOADADDR(.overlay.data.apfla));
  200. LONG(ABSOLUTE(ADDR(.overlay.bss.apfla)));
  201. LONG(SIZEOF(.overlay.bss.apfla));
  202. /* for a1_a23_p.a */
  203. LONG(OVERLAY_ID_LIBAPAAC)
  204. LONG(0);
  205. LONG(0);
  206. LONG(0);
  207. LONG(ABSOLUTE(ADDR(.overlay.data.apaac)));
  208. LONG(SIZEOF(.overlay.data.apaac));
  209. LONG(LOADADDR(.overlay.data.apaac));
  210. LONG(ABSOLUTE(ADDR(.overlay.bss.apaac)));
  211. LONG(SIZEOF(.overlay.bss.apaac));
  212. . = ALIGN(4);
  213. #endif
  214. #include <linker/kobject-rom.ld>
  215. /*
  216. * For XIP images, in order to avoid the situation when __data_rom_start
  217. * is 32-bit aligned, but the actual data is placed right after rodata
  218. * section, which may not end exactly at 32-bit border, pad rodata
  219. * section, so __data_rom_start points at data and it is 32-bit aligned.
  220. *
  221. * On non-XIP images this may enlarge image size up to 3 bytes. This
  222. * generally is not an issue, since modern ROM and FLASH memory is
  223. * usually 4k aligned.
  224. */
  225. . = ALIGN(4);
  226. } GROUP_LINK_IN(ROMABLE_REGION)
  227. #include <linker/cplusplus-rom.ld>
  228. __rodata_region_end = .;
  229. MPU_ALIGN(__rodata_region_end -__rom_region_start);
  230. __rom_region_end = .;
  231. __rom_region_size = __rom_region_end - __rom_region_start;
  232. GROUP_END(ROMABLE_REGION)
  233. /*
  234. * These are here according to 'arm-zephyr-elf-ld --verbose',
  235. * before data section.
  236. */
  237. /DISCARD/ : {
  238. *(.got.plt)
  239. *(.igot.plt)
  240. *(.got)
  241. *(.igot)
  242. }
  243. . = RAM_ADDR;
  244. /* Align the start of image SRAM with the
  245. * minimum granularity required by MPU.
  246. */
  247. . = ALIGN(_region_min_align);
  248. _image_ram_start = .;
  249. /* ================================= sram data =================================*/
  250. SECTION_DATA_PROLOGUE(_SRAM_CODE_SECTION_NAME,,)
  251. {
  252. . = ALIGN(4);
  253. _sram_data_start = .;
  254. _sram_func_start = .;
  255. *(.sleepfunc)
  256. *(".sleepfunc.*")
  257. *(.defunc)
  258. *(.lvglfunc)
  259. _sram_func_end = .;
  260. }GROUP_DATA_LINK_IN(SRAM, ROMABLE_REGION)
  261. _sram_func_ram_size = _sram_func_end - _sram_func_start;
  262. _sram_func_rom_start = LOADADDR(_SRAM_CODE_SECTION_NAME);
  263. SECTION_DATA_PROLOGUE(_SRAM_DATA_SECTION_NAME,,)
  264. {
  265. . = ALIGN(4);
  266. *(.sleep.data*)
  267. }GROUP_DATA_LINK_IN(SRAM, ROMABLE_REGION)
  268. _sram_data_end = .;
  269. _sram_data_ram_size = _sram_data_end - _sram_data_start;
  270. _sram_data_rom_start = LOADADDR(_SRAM_CODE_SECTION_NAME);
  271. /* ================================= psram data =================================*/
  272. OVERLAY : NOCROSSREFS
  273. {
  274. .overlay.data.apfla {
  275. *a1_fla_p.a:*(.data .data.*)
  276. }
  277. .overlay.data.apwma {
  278. *a1_w13_p.a:*(.data .data.*)
  279. }
  280. .overlay.data.apape {
  281. *a1_ape_p.a:*(.data .data.*)
  282. }
  283. .overlay.data.apmp3 {
  284. *a1_mp3_p.a:*(.data .data.*)
  285. }
  286. .overlay.data.apwav {
  287. *a1_wav_p.a:*(.data .data.*)
  288. }
  289. .overlay.data.apaac {
  290. *a1_a13_p.a:*(.data .data.*)
  291. }
  292. } GROUP_DATA_LINK_IN(PSRAM, ROMABLE_REGION)
  293. /* Located in generated directory. This file is populated by the
  294. * zephyr_linker_sources() Cmake function.
  295. */
  296. #include <snippets-ram-sections.ld>
  297. SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,)
  298. {
  299. __data_region_start = .;
  300. __data_start = .;
  301. *(.data)
  302. *(".data.*")
  303. *(".kernel.*")
  304. /* Located in generated directory. This file is populated by the
  305. * zephyr_linker_sources() Cmake function.
  306. */
  307. #include <snippets-rwdata.ld>
  308. __data_end = .;
  309. } GROUP_DATA_LINK_IN(PSRAM, ROMABLE_REGION)
  310. __data_size = __data_end - __data_start;
  311. __data_load_start = LOADADDR(_DATA_SECTION_NAME);
  312. __data_region_load_start = LOADADDR(_DATA_SECTION_NAME);
  313. #include <linker/common-ram.ld>
  314. #include <linker/kobject-data.ld>
  315. #include <linker/cplusplus-ram.ld>
  316. __data_region_end = .;
  317. /* ================================= sram bss =================================*/
  318. __sram_bss_start = .;
  319. SECTION_PROLOGUE(_SRAM_BSS_SECTION_NAME,(NOLOAD),)
  320. {
  321. } GROUP_LINK_IN(SRAM)
  322. __sram_bss_end = .;
  323. /* ================================= psram bss ================================= */
  324. OVERLAY : NOCROSSREFS
  325. {
  326. .overlay.bss.apfla {
  327. *a1_fla_p.a:*(.bss .bss.* .scommon COMMON)
  328. }
  329. .overlay.bss.apwma {
  330. *a1_w13_p.a:*(.bss .bss.* .scommon COMMON)
  331. }
  332. .overlay.bss.apape {
  333. *a1_ape_p.a:*(.bss .bss.* .scommon COMMON)
  334. }
  335. .overlay.bss.apmp3 {
  336. *a1_mp3_p.a:*(.bss .bss.* .scommon COMMON)
  337. }
  338. .overlay.bss.apwav {
  339. *a1_wav_p.a:*(.bss .bss.* .scommon COMMON)
  340. }
  341. .overlay.bss.apaac {
  342. *a1_a13_p.a:*(.bss .bss.* .scommon COMMON)
  343. }
  344. } GROUP_LINK_IN(PSRAM)
  345. __psram_bss_start = .;
  346. __bss_start = .;
  347. SECTION_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),)
  348. {
  349. /*
  350. * For performance, BSS section is assumed to be 4 byte aligned and
  351. * a multiple of 4 bytes
  352. */
  353. . = ALIGN(4);
  354. *(.bss)
  355. *(.bss.*)
  356. *(.scommon)
  357. *(COMMON)
  358. /*
  359. * As memory is cleared in words only, it is simpler to ensure the BSS
  360. * section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
  361. */
  362. } GROUP_LINK_IN(PSRAM)
  363. SECTION_PROLOGUE(_PSRAM_BSS_SECTION_NAME,(NOLOAD),)
  364. {
  365. /*
  366. * For performance, BSS section is assumed to be 4 byte aligned and
  367. * a multiple of 4 bytes
  368. */
  369. . = ALIGN(4);
  370. *(".kernel_bss.*")
  371. *(.bthost_bss*)
  372. *(.btsrv_bss*)
  373. } GROUP_LINK_IN(PSRAM)
  374. __bss_end = ALIGN(4);
  375. __psram_bss_end = ALIGN(4);
  376. /* ================================= sram noinit ================================= */
  377. SECTION_PROLOGUE(_SRAM_NOINIT_SECTION_NAME,(NOLOAD),)
  378. {
  379. . = ALIGN(512);
  380. __kernel_ram_start = .;
  381. *(.srm_irq_vector*)
  382. *(.interrupt.noinit.stack*)
  383. *(.main.noinit.stack*)
  384. *(.uisrv.noinit.stack*)
  385. *(.lvgl.noinit.gpu*)
  386. *(.spinand.bss.BLK_ARRAY*)
  387. *(.spinand.bss.PAGE_CACHE_BUF*)
  388. *(.system.bss.sdfs_cache*)
  389. *(.diskio.cache.pool*)
  390. *(.jpeg.bss.temp_buffer*)
  391. *(.ram.noinit*)
  392. *(.decompress.bss.cache*)
  393. *(.lvgl.noinit.vdb*)
  394. *(.ram.noinit.stack*)
  395. *(.audio.bss.ouput_pcm*)
  396. *(.audio.bss.input_pcm*)
  397. *(.act_s2_not_save_mem*)
  398. __kernel_ram_save_end = .;
  399. }GROUP_LINK_IN(SRAM)
  400. SECTION_PROLOGUE(_SRAM_SLEEP_SHUTDOWN_SECTION_NAME,(NOLOAD),)
  401. {
  402. . = ALIGN(512);
  403. _sleep_shutdown_ram_start = .;
  404. *(.ram.noinit.sufacebuffer*)
  405. _sleep_shutdown_ram_end = .;
  406. }GROUP_LINK_IN(SRAM)
  407. #ifdef CONFIG_SIM_FLASH_ACTS
  408. SECTION_PROLOGUE(SIM_ACTLOG,(NOLOAD),)
  409. {
  410. . = ALIGN(4);
  411. __sim_flash_ram_start = .;
  412. *(.sram.noinit.actlog*)
  413. __sim_flash_ram_end = .;
  414. }GROUP_LINK_IN(SRAM)
  415. #endif
  416. /* ================================= psram noinit ================================= */
  417. SECTION_PROLOGUE(_NOINIT_SECTION_NAME,(NOLOAD),)
  418. {
  419. /*
  420. * This section is used for non-initialized objects that
  421. * will not be cleared during the boot process.
  422. */
  423. *(.noinit)
  424. *(".noinit.*")
  425. *(".kernel_noinit.*")
  426. /* Located in generated directory. This file is populated by the
  427. * zephyr_linker_sources() Cmake function.
  428. */
  429. #include <snippets-noinit.ld>
  430. #ifdef CONFIG_SOC_NOINIT_LD
  431. #include <soc-noinit.ld>
  432. #endif
  433. } GROUP_LINK_IN(PSRAM)
  434. SECTION_PROLOGUE(_PRAM_NOINIT_SECTION_NAME, (NOLOAD),SUBALIGN(64))
  435. {
  436. *(.UI_PSRAM_REGION*)
  437. *(.RES_PSRAM_REGION*)
  438. *(.BMPFONT_PSRAM_REGION*)
  439. *(.font.bss.cache*)
  440. *(.lvgl.noinit.malloc*)
  441. *(.tile.bss.cache*)
  442. *(.vglite.noinit.mem_pool*)
  443. *(.vglite.noinit.malloc*)
  444. } GROUP_LINK_IN(PSRAM)
  445. /* Define linker symbols */
  446. _image_ram_end = .;
  447. __kernel_ram_end = RAM_ADDR + RAM_SIZE;
  448. __kernel_ram_size = __kernel_ram_end - __kernel_ram_start;
  449. SECTION_PROLOGUE(_ATT_RUNTIME_DATA_SECTION_NAME,(NOLOAD),)
  450. {
  451. /*
  452. * For att runtime data
  453. */
  454. . = ALIGN(4);
  455. KEEP(*(.attruntimedata*))
  456. }GROUP_LINK_IN(DSP_SRAM)
  457. /* ================================= share ram noinit ================================= */
  458. SECTION_DATA_PROLOGUE(_SHARE_RAM_BSS_SECTION_NAME, (NOLOAD),SUBALIGN(4))
  459. {
  460. __share_ram_start = .;
  461. *(.DSP_SHARE_RAM*)
  462. } GROUP_LINK_IN(SHARE_RAM)
  463. __share_ram_end = .;
  464. _end = .; /* end of image */
  465. /* Located in generated directory. This file is populated by the
  466. * zephyr_linker_sources() Cmake function.
  467. */
  468. #include <snippets-sections.ld>
  469. #include <linker/debug-sections.ld>
  470. /DISCARD/ : { *(.note.GNU-stack) }
  471. SECTION_PROLOGUE(.ARM.attributes, 0,)
  472. {
  473. KEEP(*(.ARM.attributes))
  474. KEEP(*(.gnu.attributes))
  475. }
  476. /* Must be last in romable region */
  477. SECTION_PROLOGUE(.last_section,(NOLOAD),)
  478. {
  479. } GROUP_LINK_IN(ROMABLE_REGION)
  480. /* To provide the image size as a const expression,
  481. * calculate this value here. */
  482. _flash_used = LOADADDR(.last_section) - __rom_region_start;
  483. }