#ifndef _HV_PAGE_HT7315_KV_DIMMER_CTRL_REG1_H_
#define _HV_PAGE_HT7315_KV_DIMMER_CTRL_REG1_H_

#ifndef HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS
    #define HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS                                         0x11045A00
#endif


#define RX_KV_DIMMER_CTRL_REG1_REG_LANE_EN                               (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x00)

#define RX_KV_DIMMER_CTRL_REG1_REG_LANE_EN_struct                        rs_rx_kv_dimmer_ctrl_reg1_reg_lane_en

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_lane_en  rs_rx_kv_dimmer_ctrl_reg1_reg_lane_en;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_lane_en {
    unsigned int reg_lane_en                                :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_lane_en(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_lane_en*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMTX_INIT_EN                         (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x04)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMTX_INIT_EN_struct                  rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_init_en

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_init_en  rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_init_en;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_init_en {
    unsigned int reg_dimtx_init_en                          :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimtx_init_en(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_init_en*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_RSTN_SW                               (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x08)

#define RX_KV_DIMMER_CTRL_REG1_REG_RSTN_SW_struct                        rs_rx_kv_dimmer_ctrl_reg1_reg_rstn_sw

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rstn_sw  rs_rx_kv_dimmer_ctrl_reg1_reg_rstn_sw;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rstn_sw {
    unsigned int reg_rstn_sw                                :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_rstn_sw(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_rstn_sw*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ                          (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x0C)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_struct                   rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq {
    unsigned int reg_dimctrl_freq                           :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_T1                       (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x10)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_T1_struct                rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t1  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t1 {
    unsigned int reg_dimctrl_freq_t1                        :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_T2                       (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x14)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_T2_struct                rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t2

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t2  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t2;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t2 {
    unsigned int reg_dimctrl_freq_t2                        :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t2(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t2*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_T3                       (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x18)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_T3_struct                rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t3

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t3  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t3;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t3 {
    unsigned int reg_dimctrl_freq_t3                        :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t3(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_freq_t3*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_SRAM_INDEX                            (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x20)

#define RX_KV_DIMMER_CTRL_REG1_REG_SRAM_INDEX_struct                     rs_rx_kv_dimmer_ctrl_reg1_reg_sram_index

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_sram_index  rs_rx_kv_dimmer_ctrl_reg1_reg_sram_index;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_sram_index {
    unsigned int reg_sram_index                             : 1;
    unsigned int reserved                                   :31;
};
#define rx_kv_dimmer_ctrl_reg1_reg_sram_index(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_sram_index*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMTX_SWSTART                         (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x24)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMTX_SWSTART_struct                  rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_swstart

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_swstart  rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_swstart;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_swstart {
    unsigned int reg_dimtx_swstart                          :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimtx_swstart(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimtx_swstart*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCMDTX_SWSEL                        (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x28)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCMDTX_SWSEL_struct                 rs_rx_kv_dimmer_ctrl_reg1_reg_dimcmdtx_swsel

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimcmdtx_swsel  rs_rx_kv_dimmer_ctrl_reg1_reg_dimcmdtx_swsel;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimcmdtx_swsel {
    unsigned int reg_dimcmdtx_swsel                         :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimcmdtx_swsel(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimcmdtx_swsel*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_TX_CMODE                              (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x2C)

#define RX_KV_DIMMER_CTRL_REG1_REG_TX_CMODE_struct                       rs_rx_kv_dimmer_ctrl_reg1_reg_tx_cmode

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_tx_cmode  rs_rx_kv_dimmer_ctrl_reg1_reg_tx_cmode;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_tx_cmode {
    unsigned int reg_tx_encode                              :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_tx_cmode(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_tx_cmode*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_1                             (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x30)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_1_struct                      rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_1  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_1 {
    unsigned int reserved                                   : 1;
    unsigned int reg_dimctrl_vsync_sel                      : 1;
    unsigned int reg_dimctrl_sout_defaultvaule              : 1;
    unsigned int reg_dimctrl_clkedge                        : 1;
    unsigned int reg_dimctrl_lsb_first                      : 1;
    unsigned int reserved_1                                 :11;
    unsigned int reg_vendor                                 : 4;
    unsigned int reserved_2                                 : 1;
    unsigned int reg_hy_pack_mode                           : 1;
    unsigned int reserved_3                                 :10;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_DEBUG_DATA                    (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x34)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_DEBUG_DATA_struct             rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_debug_data

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_debug_data  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_debug_data;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_debug_data {
    unsigned int reg_dimctrl_debug_data                     :16;
    unsigned int reg_dimctrl_debug_en                       : 1;
    unsigned int reserved                                   :15;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_debug_data(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_debug_data*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_CHECKSUM                      (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x38)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_CHECKSUM_struct               rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_checksum

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_checksum  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_checksum;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_checksum {
    unsigned int reg_dimctrl_checksum                       :16;
    unsigned int en                                         : 1;
    unsigned int reserved                                   :15;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_checksum(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_checksum*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_RDATA_POSION                  (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x3C)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_RDATA_POSION_struct           rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_rdata_posion

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_rdata_posion  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_rdata_posion;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_rdata_posion {
    unsigned int reg_dimctrl_rdata_posion                   :16;
    unsigned int reserved                                   :16;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_rdata_posion(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_rdata_posion*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_2DATA_WAIT_TIME               (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x40)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_2DATA_WAIT_TIME_struct        rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_2data_wait_time

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_2data_wait_time  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_2data_wait_time;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_2data_wait_time {
    unsigned int reg_dimctrl_2data_wait_time                :16;
    unsigned int reg_dimctrl_2data_wait_en                  : 1;
    unsigned int reserved                                   :15;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_2data_wait_time(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_2data_wait_time*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_TIMING_SDA_TSU                (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x44)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_TIMING_SDA_TSU_struct         rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_timing_sda_tsu

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_timing_sda_tsu  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_timing_sda_tsu;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_timing_sda_tsu {
    unsigned int reg_dimctrl_timing_sda_tsu                 :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_timing_sda_tsu(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_timing_sda_tsu*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_48                                        (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x48)

#define RX_KV_DIMMER_CTRL_REG1_48_struct                                 rs_rx_kv_dimmer_ctrl_reg1_48

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_48  rs_rx_kv_dimmer_ctrl_reg1_48;
struct _rs_rx_kv_dimmer_ctrl_reg1_48 {
    unsigned int reg_tx_oe                                  :24;
    unsigned int reg_t_sin_msb                              : 1;
    unsigned int reserved                                   : 7;
};
#define rx_kv_dimmer_ctrl_reg1_48(val) ((rs_rx_kv_dimmer_ctrl_reg1_48*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_XX_BURSTLENTH                         (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x4C)

#define RX_KV_DIMMER_CTRL_REG1_REG_XX_BURSTLENTH_struct                  rs_rx_kv_dimmer_ctrl_reg1_reg_xx_burstlenth

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_xx_burstlenth  rs_rx_kv_dimmer_ctrl_reg1_reg_xx_burstlenth;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_xx_burstlenth {
    unsigned int reg_xx_packet_lenth                        :16;
    unsigned int reg_xx_last_data_width                     : 8;
    unsigned int reg_xx_reset_mode                          : 1;
    unsigned int reserved                                   : 5;
    unsigned int reg_xx_align_flag                          : 1;
    unsigned int reg_xx_end_flag                            : 1;
};
#define rx_kv_dimmer_ctrl_reg1_reg_xx_burstlenth(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_xx_burstlenth*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_XX_PCK_WAIT_NUM                       (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x50)

#define RX_KV_DIMMER_CTRL_REG1_REG_XX_PCK_WAIT_NUM_struct                rs_rx_kv_dimmer_ctrl_reg1_reg_xx_pck_wait_num

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_xx_pck_wait_num  rs_rx_kv_dimmer_ctrl_reg1_reg_xx_pck_wait_num;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_xx_pck_wait_num {
    unsigned int reg_xx_pack_wait_num                       :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_xx_pck_wait_num(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_xx_pck_wait_num*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REGR_DIMCTRL_STATE                        (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x54)

#define RX_KV_DIMMER_CTRL_REG1_REGR_DIMCTRL_STATE_struct                 rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state  rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state;
struct _rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state {
    unsigned int regr_dimtx_busy                            :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state(val) ((rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REGR_DIMCTRL_STATE_ERR                    (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x58)

#define RX_KV_DIMMER_CTRL_REG1_REGR_DIMCTRL_STATE_ERR_struct             rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state_err

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state_err  rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state_err;
struct _rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state_err {
    unsigned int regr_dimtx_busy_err                        :24;
    unsigned int reg_dimtx_busy_err_clr                     : 1;
    unsigned int reserved                                   : 7;
};
#define rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state_err(val) ((rs_rx_kv_dimmer_ctrl_reg1_regr_dimctrl_state_err*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_68                                        (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x68)

#define RX_KV_DIMMER_CTRL_REG1_68_struct                                 rs_rx_kv_dimmer_ctrl_reg1_68

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_68  rs_rx_kv_dimmer_ctrl_reg1_68;
struct _rs_rx_kv_dimmer_ctrl_reg1_68 {
    unsigned int reg_dimctrl_data_lenth_00                  :16;
    unsigned int reserved                                   :12;
    unsigned int reg_dimctrl_data_width_00                  : 4;
};
#define rx_kv_dimmer_ctrl_reg1_68(val) ((rs_rx_kv_dimmer_ctrl_reg1_68*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_CMD_LENTH_00                  (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x6C)

#define RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_CMD_LENTH_00_struct           rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_cmd_lenth_00

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_cmd_lenth_00  rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_cmd_lenth_00;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_cmd_lenth_00 {
    unsigned int reg_dimctrl_cmd_lenth_00                   :16;
    unsigned int reg_dimctrl_cmd_width_00                   : 4;
    unsigned int reg_dimcmd_mode_00                         : 4;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_dimctrl_cmd_lenth_00(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_dimctrl_cmd_lenth_00*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_70                                        (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x70)

#define RX_KV_DIMMER_CTRL_REG1_70_struct                                 rs_rx_kv_dimmer_ctrl_reg1_70

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_70  rs_rx_kv_dimmer_ctrl_reg1_70;
struct _rs_rx_kv_dimmer_ctrl_reg1_70 {
    unsigned int reg_rram_dept                              :16;
    unsigned int reg_wram_dept                              :16;
};
#define rx_kv_dimmer_ctrl_reg1_70(val) ((rs_rx_kv_dimmer_ctrl_reg1_70*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_0                            (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x74)

#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_0_struct                     rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_0  rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_0 {
    unsigned int reg_rram_wgt_0                             :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_1                            (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x78)

#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_1_struct                     rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_1  rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_1 {
    unsigned int reg_rram_wgt_1                             :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_2                            (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x7C)

#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_2_struct                     rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_2

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_2  rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_2;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_2 {
    unsigned int reg_rram_wgt_2                             :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_2(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_2*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_3                            (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x80)

#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_3_struct                     rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_3

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_3  rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_3;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_3 {
    unsigned int reg_rram_wgt_3                             :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_3(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_3*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_4                            (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x84)

#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_WGT_4_struct                     rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_4

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_4  rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_4;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_4 {
    unsigned int reg_rram_wgt_4                             :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_4(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_rram_wgt_4*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_VLD                              (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x88)

#define RX_KV_DIMMER_CTRL_REG1_REG_RRAM_VLD_struct                       rs_rx_kv_dimmer_ctrl_reg1_reg_rram_vld

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_vld  rs_rx_kv_dimmer_ctrl_reg1_reg_rram_vld;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rram_vld {
    unsigned int reg_rram_vld                               :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_rram_vld(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_rram_vld*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_WRAM_VLD                              (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x8C)

#define RX_KV_DIMMER_CTRL_REG1_REG_WRAM_VLD_struct                       rs_rx_kv_dimmer_ctrl_reg1_reg_wram_vld

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_wram_vld  rs_rx_kv_dimmer_ctrl_reg1_reg_wram_vld;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_wram_vld {
    unsigned int reg_wram_vld                               :32;
};
#define rx_kv_dimmer_ctrl_reg1_reg_wram_vld(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_wram_vld*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_BYPASS_0                          (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x90)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_BYPASS_0_struct                   rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_0  rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_0 {
    unsigned int reg_int_bypass_0                           :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_bypass_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EN_0                              (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x94)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EN_0_struct                       rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_0  rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_0 {
    unsigned int reg_int_en_0                               :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_en_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_CLR_0                             (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x98)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_CLR_0_struct                      rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_0  rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_0 {
    unsigned int reg_int_clr_0                              :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_clr_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_LEVEL_P_0                         (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0x9C)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_LEVEL_P_0_struct                  rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_0  rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_0 {
    unsigned int reg_int_level_p_0                          :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_level_p_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_LEVEL_N_0                         (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xA0)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_LEVEL_N_0_struct                  rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_0  rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_0 {
    unsigned int reg_int_level_n_0                          :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_level_n_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EDGE_P_0                          (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xA4)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EDGE_P_0_struct                   rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_0  rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_0 {
    unsigned int reg_int_edge_p_0                           :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EDGE_N_0                          (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xA8)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EDGE_N_0_struct                   rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_0  rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_0 {
    unsigned int reg_int_edge_n_0                           :24;
    unsigned int reg_int_mon_sel_0                          : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REGR_INT_PENDING_0                        (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xAC)

#define RX_KV_DIMMER_CTRL_REG1_REGR_INT_PENDING_0_struct                 rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_0  rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_0 {
    unsigned int regr_int_pending_0                         :24;
    unsigned int regr_int_mon_cnt_0                         : 8;
};
#define rx_kv_dimmer_ctrl_reg1_regr_int_pending_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REGR_INT_OUT_0                            (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xB0)

#define RX_KV_DIMMER_CTRL_REG1_REGR_INT_OUT_0_struct                     rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_0  rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_0;
struct _rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_0 {
    unsigned int regr_int_out_0                             :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_regr_int_out_0(val) ((rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_BYPASS_1                          (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xB4)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_BYPASS_1_struct                   rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_1  rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_1 {
    unsigned int reg_int_bypass_1                           :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_bypass_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_bypass_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EN_1                              (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xB8)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EN_1_struct                       rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_1  rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_1 {
    unsigned int reg_int_en_1                               :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_en_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_en_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_CLR_1                             (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xBC)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_CLR_1_struct                      rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_1  rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_1 {
    unsigned int reg_int_clr_1                              :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_clr_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_clr_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_LEVEL_P_1                         (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xC0)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_LEVEL_P_1_struct                  rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_1  rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_1 {
    unsigned int reg_int_level_p_1                          :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_level_p_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_p_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_LEVEL_N_1                         (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xC4)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_LEVEL_N_1_struct                  rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_1  rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_1 {
    unsigned int reg_int_level_n_1                          :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_level_n_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_level_n_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EDGE_P_1                          (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xC8)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EDGE_P_1_struct                   rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_1  rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_1 {
    unsigned int reg_int_edge_p_1                           :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_p_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EDGE_N_1                          (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xD0)

#define RX_KV_DIMMER_CTRL_REG1_REG_INT_EDGE_N_1_struct                   rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_1  rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_1 {
    unsigned int reg_int_edge_n_1                           :24;
    unsigned int reg_int_mon_sel_1                          : 8;
};
#define rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_int_edge_n_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REGR_INT_PENDING_1                        (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xD4)

#define RX_KV_DIMMER_CTRL_REG1_REGR_INT_PENDING_1_struct                 rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_1  rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_1 {
    unsigned int regr_int_pending_1                         :24;
    unsigned int regr_int_mon_cnt_1                         : 8;
};
#define rx_kv_dimmer_ctrl_reg1_regr_int_pending_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_regr_int_pending_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REGR_INT_OUT_1                            (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xD8)

#define RX_KV_DIMMER_CTRL_REG1_REGR_INT_OUT_1_struct                     rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_1

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_1  rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_1;
struct _rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_1 {
    unsigned int regr_int_out_1                             :24;
    unsigned int reserved                                   : 8;
};
#define rx_kv_dimmer_ctrl_reg1_regr_int_out_1(val) ((rs_rx_kv_dimmer_ctrl_reg1_regr_int_out_1*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL                                (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xDC)

#define RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL_struct                         rs_rx_kv_dimmer_ctrl_reg1_reg_rx_sel

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rx_sel  rs_rx_kv_dimmer_ctrl_reg1_reg_rx_sel;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_rx_sel {
    unsigned int reg_t_x_sin_mux                            :24;
    unsigned int reg_sin_en                                 : 1;
    unsigned int reg_tx_sin_en                              : 1;
    unsigned int reg_dimctrl_rx_debug_sel                   : 1;
    unsigned int reg_dimmer_deglitch_en                     : 1;
    unsigned int reg_dimctrl_tx_rx_debug_sel                : 1;
    unsigned int reg_lut_sel                                : 1;
    unsigned int reserved                                   : 2;
};
#define rx_kv_dimmer_ctrl_reg1_reg_rx_sel(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_rx_sel*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_E0                                        (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xE0)

#define RX_KV_DIMMER_CTRL_REG1_E0_struct                                 rs_rx_kv_dimmer_ctrl_reg1_e0

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_e0  rs_rx_kv_dimmer_ctrl_reg1_e0;
struct _rs_rx_kv_dimmer_ctrl_reg1_e0 {
    unsigned int reg_dimmer_t_sin_deglitch_capacity         :32;
};
#define rx_kv_dimmer_ctrl_reg1_e0(val) ((rs_rx_kv_dimmer_ctrl_reg1_e0*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_E4                                        (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xE4)

#define RX_KV_DIMMER_CTRL_REG1_E4_struct                                 rs_rx_kv_dimmer_ctrl_reg1_e4

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_e4  rs_rx_kv_dimmer_ctrl_reg1_e4;
struct _rs_rx_kv_dimmer_ctrl_reg1_e4 {
    unsigned int reg_dimmer_x_sin_deglitch_capacity         :32;
};
#define rx_kv_dimmer_ctrl_reg1_e4(val) ((rs_rx_kv_dimmer_ctrl_reg1_e4*)&(val))



#define RX_KV_DIMMER_CTRL_REG1_REG_XX_RESET_EXT                          (HV_KV_DIMMER_CTRL_REG1_BASE_ADDRESS + 0xE8)

#define RX_KV_DIMMER_CTRL_REG1_REG_XX_RESET_EXT_struct                   rs_rx_kv_dimmer_ctrl_reg1_reg_xx_reset_ext

typedef struct _rs_rx_kv_dimmer_ctrl_reg1_reg_xx_reset_ext  rs_rx_kv_dimmer_ctrl_reg1_reg_xx_reset_ext;
struct _rs_rx_kv_dimmer_ctrl_reg1_reg_xx_reset_ext {
    unsigned int reg_xx_reset_ext                           : 4;
    unsigned int reserved                                   :28;
};
#define rx_kv_dimmer_ctrl_reg1_reg_xx_reset_ext(val) ((rs_rx_kv_dimmer_ctrl_reg1_reg_xx_reset_ext*)&(val))



#endif