#ifndef _HV_PAGE_HT7315_MHI_MHC1_REG_H_
#define _HV_PAGE_HT7315_MHI_MHC1_REG_H_

#ifndef HV_MHI_MHC1_REG_BASE_ADDRESS
    #define HV_MHI_MHC1_REG_BASE_ADDRESS                                         0x11026200
#endif


#define DISP_TOP_MHI_MHC1_REG_00                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x00)

#define DISP_TOP_MHI_MHC1_REG_00_struct                                  rs_disp_top_mhi_mhc1_reg_00

typedef struct _rs_disp_top_mhi_mhc1_reg_00  rs_disp_top_mhi_mhc1_reg_00;
struct _rs_disp_top_mhi_mhc1_reg_00 {
    unsigned int regr_hib_hst2dec                           : 2;
    unsigned int reserved                                   :30;
};
#define disp_top_mhi_mhc1_reg_00(val) ((rs_disp_top_mhi_mhc1_reg_00*)&(val))



#define DISP_TOP_MHI_MHC1_REG_04                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x04)

#define DISP_TOP_MHI_MHC1_REG_04_struct                                  rs_disp_top_mhi_mhc1_reg_04

typedef struct _rs_disp_top_mhi_mhc1_reg_04  rs_disp_top_mhi_mhc1_reg_04;
struct _rs_disp_top_mhi_mhc1_reg_04 {
    unsigned int regr_hib_hst3dec                           : 2;
    unsigned int reserved                                   :30;
};
#define disp_top_mhi_mhc1_reg_04(val) ((rs_disp_top_mhi_mhc1_reg_04*)&(val))



#define DISP_TOP_MHI_MHC1_REG_08                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x08)

#define DISP_TOP_MHI_MHC1_REG_08_struct                                  rs_disp_top_mhi_mhc1_reg_08

typedef struct _rs_disp_top_mhi_mhc1_reg_08  rs_disp_top_mhi_mhc1_reg_08;
struct _rs_disp_top_mhi_mhc1_reg_08 {
    unsigned int regr_hib_amplevbtm                         : 7;
    unsigned int reserved                                   : 1;
    unsigned int regr_hib_amplevtop                         : 7;
    unsigned int reserved_1                                 :17;
};
#define disp_top_mhi_mhc1_reg_08(val) ((rs_disp_top_mhi_mhc1_reg_08*)&(val))



#define DISP_TOP_MHI_MHC1_REG_0C                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x0C)

#define DISP_TOP_MHI_MHC1_REG_0C_struct                                  rs_disp_top_mhi_mhc1_reg_0c

typedef struct _rs_disp_top_mhi_mhc1_reg_0c  rs_disp_top_mhi_mhc1_reg_0c;
struct _rs_disp_top_mhi_mhc1_reg_0c {
    unsigned int regr_hib_colarea                           : 2;
    unsigned int reserved                                   :30;
};
#define disp_top_mhi_mhc1_reg_0c(val) ((rs_disp_top_mhi_mhc1_reg_0c*)&(val))



#define DISP_TOP_MHI_MHC1_REG_10                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x10)

#define DISP_TOP_MHI_MHC1_REG_10_struct                                  rs_disp_top_mhi_mhc1_reg_10

typedef struct _rs_disp_top_mhi_mhc1_reg_10  rs_disp_top_mhi_mhc1_reg_10;
struct _rs_disp_top_mhi_mhc1_reg_10 {
    unsigned int regr_hib_cbstrka                           : 9;
    unsigned int reserved                                   :23;
};
#define disp_top_mhi_mhc1_reg_10(val) ((rs_disp_top_mhi_mhc1_reg_10*)&(val))



#define DISP_TOP_MHI_MHC1_REG_14                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x14)

#define DISP_TOP_MHI_MHC1_REG_14_struct                                  rs_disp_top_mhi_mhc1_reg_14

typedef struct _rs_disp_top_mhi_mhc1_reg_14  rs_disp_top_mhi_mhc1_reg_14;
struct _rs_disp_top_mhi_mhc1_reg_14 {
    unsigned int regr_hib_cbendka                           : 9;
    unsigned int reserved                                   :23;
};
#define disp_top_mhi_mhc1_reg_14(val) ((rs_disp_top_mhi_mhc1_reg_14*)&(val))



#define DISP_TOP_MHI_MHC1_REG_18                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x18)

#define DISP_TOP_MHI_MHC1_REG_18_struct                                  rs_disp_top_mhi_mhc1_reg_18

typedef struct _rs_disp_top_mhi_mhc1_reg_18  rs_disp_top_mhi_mhc1_reg_18;
struct _rs_disp_top_mhi_mhc1_reg_18 {
    unsigned int reg_mhi_glob_pic_width                     :13;
    unsigned int reserved                                   :19;
};
#define disp_top_mhi_mhc1_reg_18(val) ((rs_disp_top_mhi_mhc1_reg_18*)&(val))



#define DISP_TOP_MHI_MHC1_REG_1C                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x1C)

#define DISP_TOP_MHI_MHC1_REG_1C_struct                                  rs_disp_top_mhi_mhc1_reg_1c

typedef struct _rs_disp_top_mhi_mhc1_reg_1c  rs_disp_top_mhi_mhc1_reg_1c;
struct _rs_disp_top_mhi_mhc1_reg_1c {
    unsigned int reg_mhi_glob_pic_height                    :13;
    unsigned int reserved                                   :19;
};
#define disp_top_mhi_mhc1_reg_1c(val) ((rs_disp_top_mhi_mhc1_reg_1c*)&(val))



#define DISP_TOP_MHI_MHC1_REG_20                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x20)

#define DISP_TOP_MHI_MHC1_REG_20_struct                                  rs_disp_top_mhi_mhc1_reg_20

typedef struct _rs_disp_top_mhi_mhc1_reg_20  rs_disp_top_mhi_mhc1_reg_20;
struct _rs_disp_top_mhi_mhc1_reg_20 {
    unsigned int reg_glob_ar_overlap_width                  : 8;
    unsigned int reserved                                   : 8;
    unsigned int reg_glob_al_overlap_width                  : 8;
    unsigned int reserved_1                                 : 8;
};
#define disp_top_mhi_mhc1_reg_20(val) ((rs_disp_top_mhi_mhc1_reg_20*)&(val))



#define DISP_TOP_MHI_MHC1_REG_24                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x24)

#define DISP_TOP_MHI_MHC1_REG_24_struct                                  rs_disp_top_mhi_mhc1_reg_24

typedef struct _rs_disp_top_mhi_mhc1_reg_24  rs_disp_top_mhi_mhc1_reg_24;
struct _rs_disp_top_mhi_mhc1_reg_24 {
    unsigned int regr_mhi_glob_pic_width                    :13;
    unsigned int reserved                                   :19;
};
#define disp_top_mhi_mhc1_reg_24(val) ((rs_disp_top_mhi_mhc1_reg_24*)&(val))



#define DISP_TOP_MHI_MHC1_REG_28                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x28)

#define DISP_TOP_MHI_MHC1_REG_28_struct                                  rs_disp_top_mhi_mhc1_reg_28

typedef struct _rs_disp_top_mhi_mhc1_reg_28  rs_disp_top_mhi_mhc1_reg_28;
struct _rs_disp_top_mhi_mhc1_reg_28 {
    unsigned int regr_mhi_glob_pic_height                   :13;
    unsigned int reserved                                   :19;
};
#define disp_top_mhi_mhc1_reg_28(val) ((rs_disp_top_mhi_mhc1_reg_28*)&(val))



#define DISP_TOP_MHI_MHC1_REG_2C                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x2C)

#define DISP_TOP_MHI_MHC1_REG_2C_struct                                  rs_disp_top_mhi_mhc1_reg_2c

typedef struct _rs_disp_top_mhi_mhc1_reg_2c  rs_disp_top_mhi_mhc1_reg_2c;
struct _rs_disp_top_mhi_mhc1_reg_2c {
    unsigned int regr_glob_ar_overlap_width                 : 8;
    unsigned int reserved                                   : 8;
    unsigned int regr_glob_al_overlap_width                 : 8;
    unsigned int reserved_1                                 : 8;
};
#define disp_top_mhi_mhc1_reg_2c(val) ((rs_disp_top_mhi_mhc1_reg_2c*)&(val))



#define DISP_TOP_MHI_MHC1_REG_30                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x30)

#define DISP_TOP_MHI_MHC1_REG_30_struct                                  rs_disp_top_mhi_mhc1_reg_30

typedef struct _rs_disp_top_mhi_mhc1_reg_30  rs_disp_top_mhi_mhc1_reg_30;
struct _rs_disp_top_mhi_mhc1_reg_30 {
    unsigned int reg_en                                     : 1;
    unsigned int reserved                                   :31;
};
#define disp_top_mhi_mhc1_reg_30(val) ((rs_disp_top_mhi_mhc1_reg_30*)&(val))



#define DISP_TOP_MHI_MHC1_REG_34                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0x34)

#define DISP_TOP_MHI_MHC1_REG_34_struct                                  rs_disp_top_mhi_mhc1_reg_34

typedef struct _rs_disp_top_mhi_mhc1_reg_34  rs_disp_top_mhi_mhc1_reg_34;
struct _rs_disp_top_mhi_mhc1_reg_34 {
    unsigned int ct_sr_rstmhi                               : 1;
    unsigned int ct_sr_hia_rst_sel                          : 1;
    unsigned int ct_sr_hia_rst1                             : 1;
    unsigned int ct_sr_hia_rst2                             : 1;
    unsigned int ct_sr_hia_rst3                             : 1;
    unsigned int ct_sr_hia_rst4                             : 1;
    unsigned int ct_sr_hib_rst_sel                          : 1;
    unsigned int ct_sr_hib_rst1                             : 1;
    unsigned int ct_sr_hib_rst2                             : 1;
    unsigned int ct_sr_hib_rst3                             : 1;
    unsigned int ct_sr_hib_rst4                             : 1;
    unsigned int reg_en_no_latch                            : 1;
    unsigned int reserved                                   :20;
};
#define disp_top_mhi_mhc1_reg_34(val) ((rs_disp_top_mhi_mhc1_reg_34*)&(val))



#define DISP_TOP_MHI_MHC1_REG_B8                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0xB8)

#define DISP_TOP_MHI_MHC1_REG_B8_struct                                  rs_disp_top_mhi_mhc1_reg_b8

typedef struct _rs_disp_top_mhi_mhc1_reg_b8  rs_disp_top_mhi_mhc1_reg_b8;
struct _rs_disp_top_mhi_mhc1_reg_b8 {
    unsigned int reg_mhi_shc_pic_width                      :13;
    unsigned int reserved                                   :19;
};
#define disp_top_mhi_mhc1_reg_b8(val) ((rs_disp_top_mhi_mhc1_reg_b8*)&(val))



#define DISP_TOP_MHI_MHC1_REG_BC                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0xBC)

#define DISP_TOP_MHI_MHC1_REG_BC_struct                                  rs_disp_top_mhi_mhc1_reg_bc

typedef struct _rs_disp_top_mhi_mhc1_reg_bc  rs_disp_top_mhi_mhc1_reg_bc;
struct _rs_disp_top_mhi_mhc1_reg_bc {
    unsigned int reg_mhi_shc_pic_height                     :13;
    unsigned int reserved                                   :19;
};
#define disp_top_mhi_mhc1_reg_bc(val) ((rs_disp_top_mhi_mhc1_reg_bc*)&(val))



#define DISP_TOP_MHI_MHC1_REG_C0                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0xC0)

#define DISP_TOP_MHI_MHC1_REG_C0_struct                                  rs_disp_top_mhi_mhc1_reg_c0

typedef struct _rs_disp_top_mhi_mhc1_reg_c0  rs_disp_top_mhi_mhc1_reg_c0;
struct _rs_disp_top_mhi_mhc1_reg_c0 {
    unsigned int reg_shc_ar_overlap_width                   : 8;
    unsigned int reserved                                   : 8;
    unsigned int reg_shc_al_overlap_width                   : 8;
    unsigned int reserved_1                                 : 8;
};
#define disp_top_mhi_mhc1_reg_c0(val) ((rs_disp_top_mhi_mhc1_reg_c0*)&(val))



#define DISP_TOP_MHI_MHC1_REG_C4                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0xC4)

#define DISP_TOP_MHI_MHC1_REG_C4_struct                                  rs_disp_top_mhi_mhc1_reg_c4

typedef struct _rs_disp_top_mhi_mhc1_reg_c4  rs_disp_top_mhi_mhc1_reg_c4;
struct _rs_disp_top_mhi_mhc1_reg_c4 {
    unsigned int regr_mhi_shc_pic_width                     :13;
    unsigned int reserved                                   :19;
};
#define disp_top_mhi_mhc1_reg_c4(val) ((rs_disp_top_mhi_mhc1_reg_c4*)&(val))



#define DISP_TOP_MHI_MHC1_REG_C8                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0xC8)

#define DISP_TOP_MHI_MHC1_REG_C8_struct                                  rs_disp_top_mhi_mhc1_reg_c8

typedef struct _rs_disp_top_mhi_mhc1_reg_c8  rs_disp_top_mhi_mhc1_reg_c8;
struct _rs_disp_top_mhi_mhc1_reg_c8 {
    unsigned int regr_mhi_shc_pic_height                    :13;
    unsigned int reserved                                   :19;
};
#define disp_top_mhi_mhc1_reg_c8(val) ((rs_disp_top_mhi_mhc1_reg_c8*)&(val))



#define DISP_TOP_MHI_MHC1_REG_CC                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0xCC)

#define DISP_TOP_MHI_MHC1_REG_CC_struct                                  rs_disp_top_mhi_mhc1_reg_cc

typedef struct _rs_disp_top_mhi_mhc1_reg_cc  rs_disp_top_mhi_mhc1_reg_cc;
struct _rs_disp_top_mhi_mhc1_reg_cc {
    unsigned int regr_shc_ar_overlap_width                  : 8;
    unsigned int reserved                                   : 8;
    unsigned int regr_shc_al_overlap_width                  : 8;
    unsigned int reserved_1                                 : 8;
};
#define disp_top_mhi_mhc1_reg_cc(val) ((rs_disp_top_mhi_mhc1_reg_cc*)&(val))



#define DISP_TOP_MHI_MHC1_REG_D0                                         (HV_MHI_MHC1_REG_BASE_ADDRESS + 0xD0)

#define DISP_TOP_MHI_MHC1_REG_D0_struct                                  rs_disp_top_mhi_mhc1_reg_d0

typedef struct _rs_disp_top_mhi_mhc1_reg_d0  rs_disp_top_mhi_mhc1_reg_d0;
struct _rs_disp_top_mhi_mhc1_reg_d0 {
    unsigned int reg_mhi_clk_gate                           : 1;
    unsigned int reserved                                   :31;
};
#define disp_top_mhi_mhc1_reg_d0(val) ((rs_disp_top_mhi_mhc1_reg_d0*)&(val))



#endif