#ifndef _HV_PAGE_HT7315_EPI_TOP1_H_
#define _HV_PAGE_HT7315_EPI_TOP1_H_

#ifndef HV_EPI_TOP1_BASE_ADDRESS
    #define HV_EPI_TOP1_BASE_ADDRESS                                         0x1105E800
#endif


#define TX_EPI_TOP1_EPI_TOP1_SET_00                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x00)

#define TX_EPI_TOP1_EPI_TOP1_SET_00_struct                               rs_tx_epi_top1_epi_top1_set_00

typedef struct _rs_tx_epi_top1_epi_top1_set_00  rs_tx_epi_top1_epi_top1_set_00;
struct _rs_tx_epi_top1_epi_top1_set_00 {
    unsigned int reg_epi_p00_soe_end_0                      : 8;
    unsigned int reg_epi_p00_soe_end_1                      : 8;
    unsigned int reg_epi_p00_soe_end_2                      : 8;
    unsigned int reg_epi_p00_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_00(val) ((rs_tx_epi_top1_epi_top1_set_00*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_01                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x04)

#define TX_EPI_TOP1_EPI_TOP1_SET_01_struct                               rs_tx_epi_top1_epi_top1_set_01

typedef struct _rs_tx_epi_top1_epi_top1_set_01  rs_tx_epi_top1_epi_top1_set_01;
struct _rs_tx_epi_top1_epi_top1_set_01 {
    unsigned int reg_epi_p01_soe_end_0                      : 8;
    unsigned int reg_epi_p01_soe_end_1                      : 8;
    unsigned int reg_epi_p01_soe_end_2                      : 8;
    unsigned int reg_epi_p01_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_01(val) ((rs_tx_epi_top1_epi_top1_set_01*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_02                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x08)

#define TX_EPI_TOP1_EPI_TOP1_SET_02_struct                               rs_tx_epi_top1_epi_top1_set_02

typedef struct _rs_tx_epi_top1_epi_top1_set_02  rs_tx_epi_top1_epi_top1_set_02;
struct _rs_tx_epi_top1_epi_top1_set_02 {
    unsigned int reg_epi_p02_soe_end_0                      : 8;
    unsigned int reg_epi_p02_soe_end_1                      : 8;
    unsigned int reg_epi_p02_soe_end_2                      : 8;
    unsigned int reg_epi_p02_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_02(val) ((rs_tx_epi_top1_epi_top1_set_02*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_03                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x0C)

#define TX_EPI_TOP1_EPI_TOP1_SET_03_struct                               rs_tx_epi_top1_epi_top1_set_03

typedef struct _rs_tx_epi_top1_epi_top1_set_03  rs_tx_epi_top1_epi_top1_set_03;
struct _rs_tx_epi_top1_epi_top1_set_03 {
    unsigned int reg_epi_p03_soe_end_0                      : 8;
    unsigned int reg_epi_p03_soe_end_1                      : 8;
    unsigned int reg_epi_p03_soe_end_2                      : 8;
    unsigned int reg_epi_p03_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_03(val) ((rs_tx_epi_top1_epi_top1_set_03*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_04                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x10)

#define TX_EPI_TOP1_EPI_TOP1_SET_04_struct                               rs_tx_epi_top1_epi_top1_set_04

typedef struct _rs_tx_epi_top1_epi_top1_set_04  rs_tx_epi_top1_epi_top1_set_04;
struct _rs_tx_epi_top1_epi_top1_set_04 {
    unsigned int reg_epi_p04_soe_end_0                      : 8;
    unsigned int reg_epi_p04_soe_end_1                      : 8;
    unsigned int reg_epi_p04_soe_end_2                      : 8;
    unsigned int reg_epi_p04_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_04(val) ((rs_tx_epi_top1_epi_top1_set_04*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_05                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x14)

#define TX_EPI_TOP1_EPI_TOP1_SET_05_struct                               rs_tx_epi_top1_epi_top1_set_05

typedef struct _rs_tx_epi_top1_epi_top1_set_05  rs_tx_epi_top1_epi_top1_set_05;
struct _rs_tx_epi_top1_epi_top1_set_05 {
    unsigned int reg_epi_p05_soe_end_0                      : 8;
    unsigned int reg_epi_p05_soe_end_1                      : 8;
    unsigned int reg_epi_p05_soe_end_2                      : 8;
    unsigned int reg_epi_p05_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_05(val) ((rs_tx_epi_top1_epi_top1_set_05*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_06                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x18)

#define TX_EPI_TOP1_EPI_TOP1_SET_06_struct                               rs_tx_epi_top1_epi_top1_set_06

typedef struct _rs_tx_epi_top1_epi_top1_set_06  rs_tx_epi_top1_epi_top1_set_06;
struct _rs_tx_epi_top1_epi_top1_set_06 {
    unsigned int reg_epi_p06_soe_end_0                      : 8;
    unsigned int reg_epi_p06_soe_end_1                      : 8;
    unsigned int reg_epi_p06_soe_end_2                      : 8;
    unsigned int reg_epi_p06_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_06(val) ((rs_tx_epi_top1_epi_top1_set_06*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_07                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x1C)

#define TX_EPI_TOP1_EPI_TOP1_SET_07_struct                               rs_tx_epi_top1_epi_top1_set_07

typedef struct _rs_tx_epi_top1_epi_top1_set_07  rs_tx_epi_top1_epi_top1_set_07;
struct _rs_tx_epi_top1_epi_top1_set_07 {
    unsigned int reg_epi_p07_soe_end_0                      : 8;
    unsigned int reg_epi_p07_soe_end_1                      : 8;
    unsigned int reg_epi_p07_soe_end_2                      : 8;
    unsigned int reg_epi_p07_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_07(val) ((rs_tx_epi_top1_epi_top1_set_07*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_08                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x20)

#define TX_EPI_TOP1_EPI_TOP1_SET_08_struct                               rs_tx_epi_top1_epi_top1_set_08

typedef struct _rs_tx_epi_top1_epi_top1_set_08  rs_tx_epi_top1_epi_top1_set_08;
struct _rs_tx_epi_top1_epi_top1_set_08 {
    unsigned int reg_epi_p08_soe_end_0                      : 8;
    unsigned int reg_epi_p08_soe_end_1                      : 8;
    unsigned int reg_epi_p08_soe_end_2                      : 8;
    unsigned int reg_epi_p08_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_08(val) ((rs_tx_epi_top1_epi_top1_set_08*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_09                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x24)

#define TX_EPI_TOP1_EPI_TOP1_SET_09_struct                               rs_tx_epi_top1_epi_top1_set_09

typedef struct _rs_tx_epi_top1_epi_top1_set_09  rs_tx_epi_top1_epi_top1_set_09;
struct _rs_tx_epi_top1_epi_top1_set_09 {
    unsigned int reg_epi_p09_soe_end_0                      : 8;
    unsigned int reg_epi_p09_soe_end_1                      : 8;
    unsigned int reg_epi_p09_soe_end_2                      : 8;
    unsigned int reg_epi_p09_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_09(val) ((rs_tx_epi_top1_epi_top1_set_09*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_10                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x28)

#define TX_EPI_TOP1_EPI_TOP1_SET_10_struct                               rs_tx_epi_top1_epi_top1_set_10

typedef struct _rs_tx_epi_top1_epi_top1_set_10  rs_tx_epi_top1_epi_top1_set_10;
struct _rs_tx_epi_top1_epi_top1_set_10 {
    unsigned int reg_epi_p10_soe_end_0                      : 8;
    unsigned int reg_epi_p10_soe_end_1                      : 8;
    unsigned int reg_epi_p10_soe_end_2                      : 8;
    unsigned int reg_epi_p10_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_10(val) ((rs_tx_epi_top1_epi_top1_set_10*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_11                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x2C)

#define TX_EPI_TOP1_EPI_TOP1_SET_11_struct                               rs_tx_epi_top1_epi_top1_set_11

typedef struct _rs_tx_epi_top1_epi_top1_set_11  rs_tx_epi_top1_epi_top1_set_11;
struct _rs_tx_epi_top1_epi_top1_set_11 {
    unsigned int reg_epi_p11_soe_end_0                      : 8;
    unsigned int reg_epi_p11_soe_end_1                      : 8;
    unsigned int reg_epi_p11_soe_end_2                      : 8;
    unsigned int reg_epi_p11_soe_end_3                      : 8;
};
#define tx_epi_top1_epi_top1_set_11(val) ((rs_tx_epi_top1_epi_top1_set_11*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_16                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x40)

#define TX_EPI_TOP1_EPI_TOP1_SET_16_struct                               rs_tx_epi_top1_epi_top1_set_16

typedef struct _rs_tx_epi_top1_epi_top1_set_16  rs_tx_epi_top1_epi_top1_set_16;
struct _rs_tx_epi_top1_epi_top1_set_16 {
    unsigned int reg_epi_p00_soe_sta_0                      :10;
    unsigned int reg_epi_p00_soe_sta_1                      :10;
    unsigned int reg_epi_p00_soe_sta_2                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_16(val) ((rs_tx_epi_top1_epi_top1_set_16*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_17                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x44)

#define TX_EPI_TOP1_EPI_TOP1_SET_17_struct                               rs_tx_epi_top1_epi_top1_set_17

typedef struct _rs_tx_epi_top1_epi_top1_set_17  rs_tx_epi_top1_epi_top1_set_17;
struct _rs_tx_epi_top1_epi_top1_set_17 {
    unsigned int reg_epi_p00_soe_sta_3                      :10;
    unsigned int reg_epi_p01_soe_sta_0                      :10;
    unsigned int reg_epi_p01_soe_sta_1                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_17(val) ((rs_tx_epi_top1_epi_top1_set_17*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_18                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x48)

#define TX_EPI_TOP1_EPI_TOP1_SET_18_struct                               rs_tx_epi_top1_epi_top1_set_18

typedef struct _rs_tx_epi_top1_epi_top1_set_18  rs_tx_epi_top1_epi_top1_set_18;
struct _rs_tx_epi_top1_epi_top1_set_18 {
    unsigned int reg_epi_p01_soe_sta_2                      :10;
    unsigned int reg_epi_p01_soe_sta_3                      :10;
    unsigned int reg_epi_p02_soe_sta_0                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_18(val) ((rs_tx_epi_top1_epi_top1_set_18*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_19                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x4C)

#define TX_EPI_TOP1_EPI_TOP1_SET_19_struct                               rs_tx_epi_top1_epi_top1_set_19

typedef struct _rs_tx_epi_top1_epi_top1_set_19  rs_tx_epi_top1_epi_top1_set_19;
struct _rs_tx_epi_top1_epi_top1_set_19 {
    unsigned int reg_epi_p02_soe_sta_1                      :10;
    unsigned int reg_epi_p02_soe_sta_2                      :10;
    unsigned int reg_epi_p02_soe_sta_3                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_19(val) ((rs_tx_epi_top1_epi_top1_set_19*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_20                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x50)

#define TX_EPI_TOP1_EPI_TOP1_SET_20_struct                               rs_tx_epi_top1_epi_top1_set_20

typedef struct _rs_tx_epi_top1_epi_top1_set_20  rs_tx_epi_top1_epi_top1_set_20;
struct _rs_tx_epi_top1_epi_top1_set_20 {
    unsigned int reg_epi_p03_soe_sta_0                      :10;
    unsigned int reg_epi_p03_soe_sta_1                      :10;
    unsigned int reg_epi_p03_soe_sta_2                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_20(val) ((rs_tx_epi_top1_epi_top1_set_20*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_21                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x54)

#define TX_EPI_TOP1_EPI_TOP1_SET_21_struct                               rs_tx_epi_top1_epi_top1_set_21

typedef struct _rs_tx_epi_top1_epi_top1_set_21  rs_tx_epi_top1_epi_top1_set_21;
struct _rs_tx_epi_top1_epi_top1_set_21 {
    unsigned int reg_epi_p03_soe_sta_3                      :10;
    unsigned int reg_epi_p04_soe_sta_0                      :10;
    unsigned int reg_epi_p04_soe_sta_1                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_21(val) ((rs_tx_epi_top1_epi_top1_set_21*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_22                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x58)

#define TX_EPI_TOP1_EPI_TOP1_SET_22_struct                               rs_tx_epi_top1_epi_top1_set_22

typedef struct _rs_tx_epi_top1_epi_top1_set_22  rs_tx_epi_top1_epi_top1_set_22;
struct _rs_tx_epi_top1_epi_top1_set_22 {
    unsigned int reg_epi_p04_soe_sta_2                      :10;
    unsigned int reg_epi_p04_soe_sta_3                      :10;
    unsigned int reg_epi_p05_soe_sta_0                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_22(val) ((rs_tx_epi_top1_epi_top1_set_22*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_23                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x5C)

#define TX_EPI_TOP1_EPI_TOP1_SET_23_struct                               rs_tx_epi_top1_epi_top1_set_23

typedef struct _rs_tx_epi_top1_epi_top1_set_23  rs_tx_epi_top1_epi_top1_set_23;
struct _rs_tx_epi_top1_epi_top1_set_23 {
    unsigned int reg_epi_p05_soe_sta_1                      :10;
    unsigned int reg_epi_p05_soe_sta_2                      :10;
    unsigned int reg_epi_p05_soe_sta_3                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_23(val) ((rs_tx_epi_top1_epi_top1_set_23*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_24                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x60)

#define TX_EPI_TOP1_EPI_TOP1_SET_24_struct                               rs_tx_epi_top1_epi_top1_set_24

typedef struct _rs_tx_epi_top1_epi_top1_set_24  rs_tx_epi_top1_epi_top1_set_24;
struct _rs_tx_epi_top1_epi_top1_set_24 {
    unsigned int reg_epi_p06_soe_sta_0                      :10;
    unsigned int reg_epi_p06_soe_sta_1                      :10;
    unsigned int reg_epi_p06_soe_sta_2                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_24(val) ((rs_tx_epi_top1_epi_top1_set_24*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_25                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x64)

#define TX_EPI_TOP1_EPI_TOP1_SET_25_struct                               rs_tx_epi_top1_epi_top1_set_25

typedef struct _rs_tx_epi_top1_epi_top1_set_25  rs_tx_epi_top1_epi_top1_set_25;
struct _rs_tx_epi_top1_epi_top1_set_25 {
    unsigned int reg_epi_p06_soe_sta_3                      :10;
    unsigned int reg_epi_p07_soe_sta_0                      :10;
    unsigned int reg_epi_p07_soe_sta_1                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_25(val) ((rs_tx_epi_top1_epi_top1_set_25*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_26                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x68)

#define TX_EPI_TOP1_EPI_TOP1_SET_26_struct                               rs_tx_epi_top1_epi_top1_set_26

typedef struct _rs_tx_epi_top1_epi_top1_set_26  rs_tx_epi_top1_epi_top1_set_26;
struct _rs_tx_epi_top1_epi_top1_set_26 {
    unsigned int reg_epi_p07_soe_sta_2                      :10;
    unsigned int reg_epi_p07_soe_sta_3                      :10;
    unsigned int reserved                                   :12;
};
#define tx_epi_top1_epi_top1_set_26(val) ((rs_tx_epi_top1_epi_top1_set_26*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_27                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x6C)

#define TX_EPI_TOP1_EPI_TOP1_SET_27_struct                               rs_tx_epi_top1_epi_top1_set_27

typedef struct _rs_tx_epi_top1_epi_top1_set_27  rs_tx_epi_top1_epi_top1_set_27;
struct _rs_tx_epi_top1_epi_top1_set_27 {
    unsigned int reg_epi_p08_soe_sta_0                      :10;
    unsigned int reg_epi_p08_soe_sta_1                      :10;
    unsigned int reg_epi_p08_soe_sta_2                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_27(val) ((rs_tx_epi_top1_epi_top1_set_27*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_28                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x70)

#define TX_EPI_TOP1_EPI_TOP1_SET_28_struct                               rs_tx_epi_top1_epi_top1_set_28

typedef struct _rs_tx_epi_top1_epi_top1_set_28  rs_tx_epi_top1_epi_top1_set_28;
struct _rs_tx_epi_top1_epi_top1_set_28 {
    unsigned int reg_epi_p08_soe_sta_3                      :10;
    unsigned int reg_epi_p09_soe_sta_0                      :10;
    unsigned int reg_epi_p09_soe_sta_1                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_28(val) ((rs_tx_epi_top1_epi_top1_set_28*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_29                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x74)

#define TX_EPI_TOP1_EPI_TOP1_SET_29_struct                               rs_tx_epi_top1_epi_top1_set_29

typedef struct _rs_tx_epi_top1_epi_top1_set_29  rs_tx_epi_top1_epi_top1_set_29;
struct _rs_tx_epi_top1_epi_top1_set_29 {
    unsigned int reg_epi_p09_soe_sta_2                      :10;
    unsigned int reg_epi_p09_soe_sta_3                      :10;
    unsigned int reg_epi_p10_soe_sta_0                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_29(val) ((rs_tx_epi_top1_epi_top1_set_29*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_30                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x78)

#define TX_EPI_TOP1_EPI_TOP1_SET_30_struct                               rs_tx_epi_top1_epi_top1_set_30

typedef struct _rs_tx_epi_top1_epi_top1_set_30  rs_tx_epi_top1_epi_top1_set_30;
struct _rs_tx_epi_top1_epi_top1_set_30 {
    unsigned int reg_epi_p10_soe_sta_1                      :10;
    unsigned int reg_epi_p10_soe_sta_2                      :10;
    unsigned int reg_epi_p10_soe_sta_3                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_30(val) ((rs_tx_epi_top1_epi_top1_set_30*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_31                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x7C)

#define TX_EPI_TOP1_EPI_TOP1_SET_31_struct                               rs_tx_epi_top1_epi_top1_set_31

typedef struct _rs_tx_epi_top1_epi_top1_set_31  rs_tx_epi_top1_epi_top1_set_31;
struct _rs_tx_epi_top1_epi_top1_set_31 {
    unsigned int reg_epi_p11_soe_sta_0                      :10;
    unsigned int reg_epi_p11_soe_sta_1                      :10;
    unsigned int reg_epi_p11_soe_sta_2                      :10;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_31(val) ((rs_tx_epi_top1_epi_top1_set_31*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_32                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x80)

#define TX_EPI_TOP1_EPI_TOP1_SET_32_struct                               rs_tx_epi_top1_epi_top1_set_32

typedef struct _rs_tx_epi_top1_epi_top1_set_32  rs_tx_epi_top1_epi_top1_set_32;
struct _rs_tx_epi_top1_epi_top1_set_32 {
    unsigned int reg_epi_p11_soe_sta_3                      :10;
    unsigned int reserved                                   :22;
};
#define tx_epi_top1_epi_top1_set_32(val) ((rs_tx_epi_top1_epi_top1_set_32*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_38                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x98)

#define TX_EPI_TOP1_EPI_TOP1_SET_38_struct                               rs_tx_epi_top1_epi_top1_set_38

typedef struct _rs_tx_epi_top1_epi_top1_set_38  rs_tx_epi_top1_epi_top1_set_38;
struct _rs_tx_epi_top1_epi_top1_set_38 {
    unsigned int reg_epi_p08_ctr1_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_38(val) ((rs_tx_epi_top1_epi_top1_set_38*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_39                                      (HV_EPI_TOP1_BASE_ADDRESS + 0x9C)

#define TX_EPI_TOP1_EPI_TOP1_SET_39_struct                               rs_tx_epi_top1_epi_top1_set_39

typedef struct _rs_tx_epi_top1_epi_top1_set_39  rs_tx_epi_top1_epi_top1_set_39;
struct _rs_tx_epi_top1_epi_top1_set_39 {
    unsigned int reg_epi_p09_ctr1_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_39(val) ((rs_tx_epi_top1_epi_top1_set_39*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_40                                      (HV_EPI_TOP1_BASE_ADDRESS + 0xA0)

#define TX_EPI_TOP1_EPI_TOP1_SET_40_struct                               rs_tx_epi_top1_epi_top1_set_40

typedef struct _rs_tx_epi_top1_epi_top1_set_40  rs_tx_epi_top1_epi_top1_set_40;
struct _rs_tx_epi_top1_epi_top1_set_40 {
    unsigned int reg_epi_p10_ctr1_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_40(val) ((rs_tx_epi_top1_epi_top1_set_40*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_41                                      (HV_EPI_TOP1_BASE_ADDRESS + 0xA4)

#define TX_EPI_TOP1_EPI_TOP1_SET_41_struct                               rs_tx_epi_top1_epi_top1_set_41

typedef struct _rs_tx_epi_top1_epi_top1_set_41  rs_tx_epi_top1_epi_top1_set_41;
struct _rs_tx_epi_top1_epi_top1_set_41 {
    unsigned int reg_epi_p11_ctr1_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_41(val) ((rs_tx_epi_top1_epi_top1_set_41*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_46                                      (HV_EPI_TOP1_BASE_ADDRESS + 0xB8)

#define TX_EPI_TOP1_EPI_TOP1_SET_46_struct                               rs_tx_epi_top1_epi_top1_set_46

typedef struct _rs_tx_epi_top1_epi_top1_set_46  rs_tx_epi_top1_epi_top1_set_46;
struct _rs_tx_epi_top1_epi_top1_set_46 {
    unsigned int reg_epi_p08_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_46(val) ((rs_tx_epi_top1_epi_top1_set_46*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_47                                      (HV_EPI_TOP1_BASE_ADDRESS + 0xBC)

#define TX_EPI_TOP1_EPI_TOP1_SET_47_struct                               rs_tx_epi_top1_epi_top1_set_47

typedef struct _rs_tx_epi_top1_epi_top1_set_47  rs_tx_epi_top1_epi_top1_set_47;
struct _rs_tx_epi_top1_epi_top1_set_47 {
    unsigned int reg_epi_p09_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_47(val) ((rs_tx_epi_top1_epi_top1_set_47*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_48                                      (HV_EPI_TOP1_BASE_ADDRESS + 0xC0)

#define TX_EPI_TOP1_EPI_TOP1_SET_48_struct                               rs_tx_epi_top1_epi_top1_set_48

typedef struct _rs_tx_epi_top1_epi_top1_set_48  rs_tx_epi_top1_epi_top1_set_48;
struct _rs_tx_epi_top1_epi_top1_set_48 {
    unsigned int reg_epi_p10_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_48(val) ((rs_tx_epi_top1_epi_top1_set_48*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_49                                      (HV_EPI_TOP1_BASE_ADDRESS + 0xC4)

#define TX_EPI_TOP1_EPI_TOP1_SET_49_struct                               rs_tx_epi_top1_epi_top1_set_49

typedef struct _rs_tx_epi_top1_epi_top1_set_49  rs_tx_epi_top1_epi_top1_set_49;
struct _rs_tx_epi_top1_epi_top1_set_49 {
    unsigned int reg_epi_p11_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_49(val) ((rs_tx_epi_top1_epi_top1_set_49*)&(val))



#define TX_EPI_TOP1_C8                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xC8)

#define TX_EPI_TOP1_C8_struct                                            rs_tx_epi_top1_c8

typedef struct _rs_tx_epi_top1_c8  rs_tx_epi_top1_c8;
struct _rs_tx_epi_top1_c8 {
    unsigned int reg_epi_p12_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_c8(val) ((rs_tx_epi_top1_c8*)&(val))



#define TX_EPI_TOP1_CC                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xCC)

#define TX_EPI_TOP1_CC_struct                                            rs_tx_epi_top1_cc

typedef struct _rs_tx_epi_top1_cc  rs_tx_epi_top1_cc;
struct _rs_tx_epi_top1_cc {
    unsigned int reg_epi_p13_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_cc(val) ((rs_tx_epi_top1_cc*)&(val))



#define TX_EPI_TOP1_D0                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xD0)

#define TX_EPI_TOP1_D0_struct                                            rs_tx_epi_top1_d0

typedef struct _rs_tx_epi_top1_d0  rs_tx_epi_top1_d0;
struct _rs_tx_epi_top1_d0 {
    unsigned int reg_epi_p14_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_d0(val) ((rs_tx_epi_top1_d0*)&(val))



#define TX_EPI_TOP1_D4                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xD4)

#define TX_EPI_TOP1_D4_struct                                            rs_tx_epi_top1_d4

typedef struct _rs_tx_epi_top1_d4  rs_tx_epi_top1_d4;
struct _rs_tx_epi_top1_d4 {
    unsigned int reg_epi_p15_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_d4(val) ((rs_tx_epi_top1_d4*)&(val))



#define TX_EPI_TOP1_D8                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xD8)

#define TX_EPI_TOP1_D8_struct                                            rs_tx_epi_top1_d8

typedef struct _rs_tx_epi_top1_d8  rs_tx_epi_top1_d8;
struct _rs_tx_epi_top1_d8 {
    unsigned int reg_epi_p16_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_d8(val) ((rs_tx_epi_top1_d8*)&(val))



#define TX_EPI_TOP1_DC                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xDC)

#define TX_EPI_TOP1_DC_struct                                            rs_tx_epi_top1_dc

typedef struct _rs_tx_epi_top1_dc  rs_tx_epi_top1_dc;
struct _rs_tx_epi_top1_dc {
    unsigned int reg_epi_p17_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_dc(val) ((rs_tx_epi_top1_dc*)&(val))



#define TX_EPI_TOP1_E0                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xE0)

#define TX_EPI_TOP1_E0_struct                                            rs_tx_epi_top1_e0

typedef struct _rs_tx_epi_top1_e0  rs_tx_epi_top1_e0;
struct _rs_tx_epi_top1_e0 {
    unsigned int reg_epi_p18_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_e0(val) ((rs_tx_epi_top1_e0*)&(val))



#define TX_EPI_TOP1_E4                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xE4)

#define TX_EPI_TOP1_E4_struct                                            rs_tx_epi_top1_e4

typedef struct _rs_tx_epi_top1_e4  rs_tx_epi_top1_e4;
struct _rs_tx_epi_top1_e4 {
    unsigned int reg_epi_p19_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_e4(val) ((rs_tx_epi_top1_e4*)&(val))



#define TX_EPI_TOP1_E8                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xE8)

#define TX_EPI_TOP1_E8_struct                                            rs_tx_epi_top1_e8

typedef struct _rs_tx_epi_top1_e8  rs_tx_epi_top1_e8;
struct _rs_tx_epi_top1_e8 {
    unsigned int reg_epi_p20_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_e8(val) ((rs_tx_epi_top1_e8*)&(val))



#define TX_EPI_TOP1_EC                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xEC)

#define TX_EPI_TOP1_EC_struct                                            rs_tx_epi_top1_ec

typedef struct _rs_tx_epi_top1_ec  rs_tx_epi_top1_ec;
struct _rs_tx_epi_top1_ec {
    unsigned int reg_epi_p21_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_ec(val) ((rs_tx_epi_top1_ec*)&(val))



#define TX_EPI_TOP1_F0                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xF0)

#define TX_EPI_TOP1_F0_struct                                            rs_tx_epi_top1_f0

typedef struct _rs_tx_epi_top1_f0  rs_tx_epi_top1_f0;
struct _rs_tx_epi_top1_f0 {
    unsigned int reg_epi_p22_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_f0(val) ((rs_tx_epi_top1_f0*)&(val))



#define TX_EPI_TOP1_F4                                                   (HV_EPI_TOP1_BASE_ADDRESS + 0xF4)

#define TX_EPI_TOP1_F4_struct                                            rs_tx_epi_top1_f4

typedef struct _rs_tx_epi_top1_f4  rs_tx_epi_top1_f4;
struct _rs_tx_epi_top1_f4 {
    unsigned int reg_epi_p23_ctr2_cfg                       :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_f4(val) ((rs_tx_epi_top1_f4*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_60                                      (HV_EPI_TOP1_BASE_ADDRESS + 0xF8)

#define TX_EPI_TOP1_EPI_TOP1_SET_60_struct                               rs_tx_epi_top1_epi_top1_set_60

typedef struct _rs_tx_epi_top1_epi_top1_set_60  rs_tx_epi_top1_epi_top1_set_60;
struct _rs_tx_epi_top1_epi_top1_set_60 {
    unsigned int reg_epi_pre_dummy_data                     :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_60(val) ((rs_tx_epi_top1_epi_top1_set_60*)&(val))



#define TX_EPI_TOP1_EPI_TOP1_SET_61                                      (HV_EPI_TOP1_BASE_ADDRESS + 0xFC)

#define TX_EPI_TOP1_EPI_TOP1_SET_61_struct                               rs_tx_epi_top1_epi_top1_set_61

typedef struct _rs_tx_epi_top1_epi_top1_set_61  rs_tx_epi_top1_epi_top1_set_61;
struct _rs_tx_epi_top1_epi_top1_set_61 {
    unsigned int reg_epi_post_dummy_data                    :30;
    unsigned int reserved                                   : 2;
};
#define tx_epi_top1_epi_top1_set_61(val) ((rs_tx_epi_top1_epi_top1_set_61*)&(val))



#endif