#ifndef _HV_PAGE_HT7315_SH08_TOP_TX_H_
#define _HV_PAGE_HT7315_SH08_TOP_TX_H_

#ifndef HV_SH08_TOP_TX_BASE_ADDRESS
    #define HV_SH08_TOP_TX_BASE_ADDRESS                                         0x11011E00
#endif


#define SYS_SH08_TOP_TX_CTRL_0                                           (HV_SH08_TOP_TX_BASE_ADDRESS + 0x00)

#define SYS_SH08_TOP_TX_CTRL_0_struct                                    rs_sys_sh08_top_tx_ctrl_0

typedef struct _rs_sys_sh08_top_tx_ctrl_0  rs_sys_sh08_top_tx_ctrl_0;
struct _rs_sys_sh08_top_tx_ctrl_0 {
    unsigned int reg_gpio10_func_sel                        : 3;
    unsigned int reg_gpio11_func_sel                        : 3;
    unsigned int reg_gpio12_func_sel                        : 3;
    unsigned int reg_gpio13_func_sel                        : 3;
    unsigned int reg_gpio14_func_sel                        : 3;
    unsigned int reg_gpio15_func_sel                        : 3;
    unsigned int reg_gpio16_func_sel                        : 3;
    unsigned int reg_gpio17_func_sel                        : 3;
    unsigned int reg_gpio18_func_sel                        : 3;
    unsigned int reg_i2cm0_scl_func_sel                     : 2;
    unsigned int reg_i2cm0_sda_func_sel                     : 2;
    unsigned int reserved                                   : 1;
};
#define sys_sh08_top_tx_ctrl_0(val) ((rs_sys_sh08_top_tx_ctrl_0*)&(val))



#define SYS_SH08_TOP_TX_CTRL_4                                           (HV_SH08_TOP_TX_BASE_ADDRESS + 0x04)

#define SYS_SH08_TOP_TX_CTRL_4_struct                                    rs_sys_sh08_top_tx_ctrl_4

typedef struct _rs_sys_sh08_top_tx_ctrl_4  rs_sys_sh08_top_tx_ctrl_4;
struct _rs_sys_sh08_top_tx_ctrl_4 {
    unsigned int reg_mspi_cs_func_sel                       : 2;
    unsigned int reg_mspi_hold_func_sel                     : 2;
    unsigned int reg_mspi_miso_func_sel                     : 2;
    unsigned int reg_mspi_mosi_func_sel                     : 3;
    unsigned int reg_mspi_sck_func_sel                      : 2;
    unsigned int reg_mspi_wp_func_sel                       : 2;
    unsigned int reg_p2p_tx_htpdn_func_sel                  : 1;
    unsigned int reg_p2p_tx_lockn_func_sel                  : 1;
    unsigned int reg_dbg_spiclk_in_sel                      : 2;
    unsigned int reg_dbg_spicsn_in_sel                      : 2;
    unsigned int reg_dbg_spidi_in_sel                       : 2;
    unsigned int reg_gpio_in_rx_in_sel                      : 2;
    unsigned int reg_i_s_sin_in_sel                         : 2;
    unsigned int reg_i_t_sin_in_sel                         : 2;
    unsigned int reg_i_x_sin_in_sel                         : 2;
    unsigned int reg_m_scl_in_in_sel                        : 2;
    unsigned int reserved                                   : 1;
};
#define sys_sh08_top_tx_ctrl_4(val) ((rs_sys_sh08_top_tx_ctrl_4*)&(val))



#define SYS_SH08_TOP_TX_CTRL_8                                           (HV_SH08_TOP_TX_BASE_ADDRESS + 0x08)

#define SYS_SH08_TOP_TX_CTRL_8_struct                                    rs_sys_sh08_top_tx_ctrl_8

typedef struct _rs_sys_sh08_top_tx_ctrl_8  rs_sys_sh08_top_tx_ctrl_8;
struct _rs_sys_sh08_top_tx_ctrl_8 {
    unsigned int reg_m_sda_in_in_sel                        : 2;
    unsigned int reg_mspi_miso_i_in_sel                     : 2;
    unsigned int reg_outclk_27m_in_sel                      : 2;
    unsigned int reg_spi_bl_sck0_in_in_sel                  : 2;
    unsigned int reg_spi_bl_sck1_in_in_sel                  : 2;
    unsigned int reg_spi_bl_sck2_in_in_sel                  : 2;
    unsigned int reg_spi_bl_sck3_in_in_sel                  : 2;
    unsigned int reg_spi_bl_sdi0_in_sel                     : 2;
    unsigned int reg_spi_bl_sdi1_in_sel                     : 2;
    unsigned int reg_spi_bl_sdo0_in_in_sel                  : 2;
    unsigned int reg_spi_bl_sdo1_in_in_sel                  : 2;
    unsigned int reg_spi_bl_sdo2_in_in_sel                  : 2;
    unsigned int reg_spi_bl_sdo3_in_in_sel                  : 2;
    unsigned int reg_gpio10_pin_sel                         : 2;
    unsigned int reg_gpio11_pin_sel                         : 2;
    unsigned int reg_gpio12_pin_sel                         : 2;
};
#define sys_sh08_top_tx_ctrl_8(val) ((rs_sys_sh08_top_tx_ctrl_8*)&(val))



#define SYS_SH08_TOP_TX_CTRL_C                                           (HV_SH08_TOP_TX_BASE_ADDRESS + 0x0C)

#define SYS_SH08_TOP_TX_CTRL_C_struct                                    rs_sys_sh08_top_tx_ctrl_c

typedef struct _rs_sys_sh08_top_tx_ctrl_c  rs_sys_sh08_top_tx_ctrl_c;
struct _rs_sys_sh08_top_tx_ctrl_c {
    unsigned int reg_gpio13_pin_sel                         : 2;
    unsigned int reg_gpio14_pin_sel                         : 2;
    unsigned int reg_gpio15_pin_sel                         : 2;
    unsigned int reg_gpio16_pin_sel                         : 2;
    unsigned int reg_gpio17_pin_sel                         : 2;
    unsigned int reg_gpio18_pin_sel                         : 2;
    unsigned int reg_i2cm0_scl_pin_sel                      : 2;
    unsigned int reg_i2cm0_sda_pin_sel                      : 2;
    unsigned int reg_mspi_cs_pin_sel                        : 2;
    unsigned int reg_mspi_hold_pin_sel                      : 2;
    unsigned int reg_mspi_miso_pin_sel                      : 2;
    unsigned int reg_mspi_mosi_pin_sel                      : 2;
    unsigned int reg_mspi_sck_pin_sel                       : 2;
    unsigned int reg_mspi_wp_pin_sel                        : 2;
    unsigned int reg_p2p_tx_htpdn_pin_sel                   : 2;
    unsigned int reg_p2p_tx_lockn_pin_sel                   : 2;
};
#define sys_sh08_top_tx_ctrl_c(val) ((rs_sys_sh08_top_tx_ctrl_c*)&(val))



#define SYS_SH08_TOP_TX_CTRL_10                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x10)

#define SYS_SH08_TOP_TX_CTRL_10_struct                                   rs_sys_sh08_top_tx_ctrl_10

typedef struct _rs_sys_sh08_top_tx_ctrl_10  rs_sys_sh08_top_tx_ctrl_10;
struct _rs_sys_sh08_top_tx_ctrl_10 {
    unsigned int reg_gpio10_ptg_sel                         : 5;
    unsigned int reg_gpio11_ptg_sel                         : 5;
    unsigned int reg_gpio12_ptg_sel                         : 5;
    unsigned int reg_gpio13_ptg_sel                         : 5;
    unsigned int reg_gpio14_ptg_sel                         : 5;
    unsigned int reg_gpio15_ptg_sel                         : 5;
    unsigned int reserved                                   : 2;
};
#define sys_sh08_top_tx_ctrl_10(val) ((rs_sys_sh08_top_tx_ctrl_10*)&(val))



#define SYS_SH08_TOP_TX_CTRL_14                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x14)

#define SYS_SH08_TOP_TX_CTRL_14_struct                                   rs_sys_sh08_top_tx_ctrl_14

typedef struct _rs_sys_sh08_top_tx_ctrl_14  rs_sys_sh08_top_tx_ctrl_14;
struct _rs_sys_sh08_top_tx_ctrl_14 {
    unsigned int reg_gpio16_ptg_sel                         : 5;
    unsigned int reg_gpio17_ptg_sel                         : 5;
    unsigned int reg_gpio18_ptg_sel                         : 5;
    unsigned int reg_i2cm0_scl_ptg_sel                      : 5;
    unsigned int reg_i2cm0_sda_ptg_sel                      : 5;
    unsigned int reg_mspi_cs_ptg_sel                        : 5;
    unsigned int reserved                                   : 2;
};
#define sys_sh08_top_tx_ctrl_14(val) ((rs_sys_sh08_top_tx_ctrl_14*)&(val))



#define SYS_SH08_TOP_TX_CTRL_18                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x18)

#define SYS_SH08_TOP_TX_CTRL_18_struct                                   rs_sys_sh08_top_tx_ctrl_18

typedef struct _rs_sys_sh08_top_tx_ctrl_18  rs_sys_sh08_top_tx_ctrl_18;
struct _rs_sys_sh08_top_tx_ctrl_18 {
    unsigned int reg_mspi_hold_ptg_sel                      : 5;
    unsigned int reg_mspi_miso_ptg_sel                      : 5;
    unsigned int reg_mspi_mosi_ptg_sel                      : 5;
    unsigned int reg_mspi_sck_ptg_sel                       : 5;
    unsigned int reg_mspi_wp_ptg_sel                        : 5;
    unsigned int reserved                                   : 7;
};
#define sys_sh08_top_tx_ctrl_18(val) ((rs_sys_sh08_top_tx_ctrl_18*)&(val))



#define SYS_SH08_TOP_TX_CTRL_1C                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x1C)

#define SYS_SH08_TOP_TX_CTRL_1C_struct                                   rs_sys_sh08_top_tx_ctrl_1c

typedef struct _rs_sys_sh08_top_tx_ctrl_1c  rs_sys_sh08_top_tx_ctrl_1c;
struct _rs_sys_sh08_top_tx_ctrl_1c {
    unsigned int reg_gpio10_io_ctrl                         : 8;
    unsigned int reg_gpio11_io_ctrl                         : 8;
    unsigned int reg_gpio12_io_ctrl                         : 8;
    unsigned int reg_gpio13_io_ctrl                         : 8;
};
#define sys_sh08_top_tx_ctrl_1c(val) ((rs_sys_sh08_top_tx_ctrl_1c*)&(val))



#define SYS_SH08_TOP_TX_CTRL_20                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x20)

#define SYS_SH08_TOP_TX_CTRL_20_struct                                   rs_sys_sh08_top_tx_ctrl_20

typedef struct _rs_sys_sh08_top_tx_ctrl_20  rs_sys_sh08_top_tx_ctrl_20;
struct _rs_sys_sh08_top_tx_ctrl_20 {
    unsigned int reg_gpio14_io_ctrl                         : 8;
    unsigned int reg_gpio15_io_ctrl                         : 8;
    unsigned int reg_gpio16_io_ctrl                         : 8;
    unsigned int reg_gpio17_io_ctrl                         : 8;
};
#define sys_sh08_top_tx_ctrl_20(val) ((rs_sys_sh08_top_tx_ctrl_20*)&(val))



#define SYS_SH08_TOP_TX_CTRL_24                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x24)

#define SYS_SH08_TOP_TX_CTRL_24_struct                                   rs_sys_sh08_top_tx_ctrl_24

typedef struct _rs_sys_sh08_top_tx_ctrl_24  rs_sys_sh08_top_tx_ctrl_24;
struct _rs_sys_sh08_top_tx_ctrl_24 {
    unsigned int reg_gpio18_io_ctrl                         : 8;
    unsigned int reg_i2cm0_scl_io_ctrl                      : 8;
    unsigned int reg_i2cm0_sda_io_ctrl                      : 8;
    unsigned int reg_mspi_cs_io_ctrl                        : 8;
};
#define sys_sh08_top_tx_ctrl_24(val) ((rs_sys_sh08_top_tx_ctrl_24*)&(val))



#define SYS_SH08_TOP_TX_CTRL_28                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x28)

#define SYS_SH08_TOP_TX_CTRL_28_struct                                   rs_sys_sh08_top_tx_ctrl_28

typedef struct _rs_sys_sh08_top_tx_ctrl_28  rs_sys_sh08_top_tx_ctrl_28;
struct _rs_sys_sh08_top_tx_ctrl_28 {
    unsigned int reg_mspi_hold_io_ctrl                      : 8;
    unsigned int reg_mspi_miso_io_ctrl                      : 8;
    unsigned int reg_mspi_mosi_io_ctrl                      : 8;
    unsigned int reg_mspi_sck_io_ctrl                       : 8;
};
#define sys_sh08_top_tx_ctrl_28(val) ((rs_sys_sh08_top_tx_ctrl_28*)&(val))



#define SYS_SH08_TOP_TX_CTRL_2C                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x2C)

#define SYS_SH08_TOP_TX_CTRL_2C_struct                                   rs_sys_sh08_top_tx_ctrl_2c

typedef struct _rs_sys_sh08_top_tx_ctrl_2c  rs_sys_sh08_top_tx_ctrl_2c;
struct _rs_sys_sh08_top_tx_ctrl_2c {
    unsigned int reg_mspi_wp_io_ctrl                        : 8;
    unsigned int reg_p2p_tx_htpdn_io_ctrl                   : 8;
    unsigned int reg_p2p_tx_lockn_io_ctrl                   : 8;
    unsigned int reserved                                   : 8;
};
#define sys_sh08_top_tx_ctrl_2c(val) ((rs_sys_sh08_top_tx_ctrl_2c*)&(val))



#define SYS_SH08_TOP_TX_CTRL_30                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x30)

#define SYS_SH08_TOP_TX_CTRL_30_struct                                   rs_sys_sh08_top_tx_ctrl_30

typedef struct _rs_sys_sh08_top_tx_ctrl_30  rs_sys_sh08_top_tx_ctrl_30;
struct _rs_sys_sh08_top_tx_ctrl_30 {
    unsigned int reg_p2p_tx_htpdn_pin_filter                :16;
    unsigned int reg_p2p_tx_lockn_pin_filter                :16;
};
#define sys_sh08_top_tx_ctrl_30(val) ((rs_sys_sh08_top_tx_ctrl_30*)&(val))



#define SYS_SH08_TOP_TX_CTRL_34                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x34)

#define SYS_SH08_TOP_TX_CTRL_34_struct                                   rs_sys_sh08_top_tx_ctrl_34

typedef struct _rs_sys_sh08_top_tx_ctrl_34  rs_sys_sh08_top_tx_ctrl_34;
struct _rs_sys_sh08_top_tx_ctrl_34 {
    unsigned int reg_spi_bl_sck0_in_use_sel                 : 1;
    unsigned int reg_spi_bl_sck1_in_use_sel                 : 2;
    unsigned int reg_spi_bl_sck2_in_use_sel                 : 1;
    unsigned int reg_spi_bl_sck3_in_use_sel                 : 1;
    unsigned int reg_spi_bl_sdi0_use_sel                    : 1;
    unsigned int reg_spi_bl_sdi1_use_sel                    : 1;
    unsigned int reg_spi_bl_sdo0_in_use_sel                 : 1;
    unsigned int reg_spi_bl_sdo1_in_use_sel                 : 2;
    unsigned int reg_spi_bl_sdo2_in_use_sel                 : 1;
    unsigned int reg_spi_bl_sdo3_in_use_sel                 : 1;
    unsigned int reserved                                   :20;
};
#define sys_sh08_top_tx_ctrl_34(val) ((rs_sys_sh08_top_tx_ctrl_34*)&(val))



#define SYS_SH08_TOP_TX_CTRL_38                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x38)

#define SYS_SH08_TOP_TX_CTRL_38_struct                                   rs_sys_sh08_top_tx_ctrl_38

typedef struct _rs_sys_sh08_top_tx_ctrl_38  rs_sys_sh08_top_tx_ctrl_38;
struct _rs_sys_sh08_top_tx_ctrl_38 {
    unsigned int reg_mbist_on                               :32;
};
#define sys_sh08_top_tx_ctrl_38(val) ((rs_sys_sh08_top_tx_ctrl_38*)&(val))



#define SYS_SH08_TOP_TX_CTRL_3C                                          (HV_SH08_TOP_TX_BASE_ADDRESS + 0x3C)

#define SYS_SH08_TOP_TX_CTRL_3C_struct                                   rs_sys_sh08_top_tx_ctrl_3c

typedef struct _rs_sys_sh08_top_tx_ctrl_3c  rs_sys_sh08_top_tx_ctrl_3c;
struct _rs_sys_sh08_top_tx_ctrl_3c {
    unsigned int reg_mem_comm                               :16;
    unsigned int reserved                                   :16;
};
#define sys_sh08_top_tx_ctrl_3c(val) ((rs_sys_sh08_top_tx_ctrl_3c*)&(val))



#define SYS_SH08_TOP_TX_RO_D0                                            (HV_SH08_TOP_TX_BASE_ADDRESS + 0xD0)

#define SYS_SH08_TOP_TX_RO_D0_struct                                     rs_sys_sh08_top_tx_ro_d0

typedef struct _rs_sys_sh08_top_tx_ro_d0  rs_sys_sh08_top_tx_ro_d0;
struct _rs_sys_sh08_top_tx_ro_d0 {
    unsigned int regr_gpio10_di                             : 1;
    unsigned int regr_gpio11_di                             : 1;
    unsigned int regr_gpio12_di                             : 1;
    unsigned int regr_gpio13_di                             : 1;
    unsigned int regr_gpio14_di                             : 1;
    unsigned int regr_gpio15_di                             : 1;
    unsigned int regr_gpio16_di                             : 1;
    unsigned int regr_gpio17_di                             : 1;
    unsigned int regr_gpio18_di                             : 1;
    unsigned int regr_i2cm0_scl_di                          : 1;
    unsigned int regr_i2cm0_sda_di                          : 1;
    unsigned int regr_mspi_cs_di                            : 1;
    unsigned int regr_mspi_hold_di                          : 1;
    unsigned int regr_mspi_miso_di                          : 1;
    unsigned int regr_mspi_mosi_di                          : 1;
    unsigned int regr_mspi_sck_di                           : 1;
    unsigned int regr_mspi_wp_di                            : 1;
    unsigned int regr_p2p_tx_htpdn_di                       : 1;
    unsigned int regr_p2p_tx_lockn_di                       : 1;
    unsigned int reserved                                   :13;
};
#define sys_sh08_top_tx_ro_d0(val) ((rs_sys_sh08_top_tx_ro_d0*)&(val))



#define SYS_SH08_TOP_TX_RO_D4                                            (HV_SH08_TOP_TX_BASE_ADDRESS + 0xD4)

#define SYS_SH08_TOP_TX_RO_D4_struct                                     rs_sys_sh08_top_tx_ro_d4

typedef struct _rs_sys_sh08_top_tx_ro_d4  rs_sys_sh08_top_tx_ro_d4;
struct _rs_sys_sh08_top_tx_ro_d4 {
    unsigned int regr_mem_faultinfo_all                     :32;
};
#define sys_sh08_top_tx_ro_d4(val) ((rs_sys_sh08_top_tx_ro_d4*)&(val))



#define SYS_SH08_TOP_TX_RO_D8                                            (HV_SH08_TOP_TX_BASE_ADDRESS + 0xD8)

#define SYS_SH08_TOP_TX_RO_D8_struct                                     rs_sys_sh08_top_tx_ro_d8

typedef struct _rs_sys_sh08_top_tx_ro_d8  rs_sys_sh08_top_tx_ro_d8;
struct _rs_sys_sh08_top_tx_ro_d8 {
    unsigned int regr_mem_ro_all                            : 4;
    unsigned int reserved                                   :12;
    unsigned int regr_mem_ro_b1                             : 4;
    unsigned int regr_mem_ro_b2                             : 4;
    unsigned int regr_mem_ro_b3                             : 4;
    unsigned int reserved_1                                 : 4;
};
#define sys_sh08_top_tx_ro_d8(val) ((rs_sys_sh08_top_tx_ro_d8*)&(val))



#endif