/**
 * @file hv_cal_Bcon_Driver.c
 * @brief bcon CAL module driver
 * @details This module provide interfaces for DRV level.
 * @author HiView SoC Software Team
 * @version 0.0.1
 * @date 20230417
 * @copyright Copyright(c),2023-2, Hiview Software. All rights reserved.
 * @par History:
 * <table>
 * <tr><th>Author                         <th>Date             <th>Details
 * <tr><td>HiView SoC Software Team       <td>20230417         <td>Create and first Version.
 * </table>
 **/


#include "hv_vos_Comm.h"
#include "HV_REGS_HT7315.h"
#include "hv_comm_Log.h"
#include "hv_comm_DataType.h"
#include "hv_comm_Define.h"

#include <hv_chip_Irq.h>
#include "hv_chip_Config.h"
#include "hv_cal_Bcon.h"

VOID Hv_Cal_Bcon_SetClkRst(VOID)
{
    HV_W32_FIELD(SYS_SH06_TOP_08,reg_dimmer_rst_n, 1);
    HV_W32_FIELD(SYS_SH06_TOP_0C,reg_dimmer_clk_en, 1);
    return;
}

VOID Hv_Cal_Bcon_SetLaneEn(UINT32 uiLane)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_LANE_EN, uiLane);
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_DIMTX_INIT_EN, uiLane);
    return;
}

VOID Hv_Cal_Bcon_SetLaneTxInitEn(UINT32 uiLane)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_LANE_EN,uiLane);
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_DIMTX_INIT_EN, uiLane);
    return;
}

VOID Hv_Cal_Bcon_LaneSwRst(UINT32 uiLane)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_RSTN_SW, uiLane);
    return;
}


VOID Hv_Cal_Bcon_SetFreq(UINT32 uiFreq)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ, uiFreq);
    return;
}

VOID Hv_Cal_Bcon_SetFreqT1(UINT32 uiFreq1)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_T1, uiFreq1);
    return;
}

VOID Hv_Cal_Bcon_SetFreqT2(UINT32 uiFreq2)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_T2, uiFreq2);
    return;
}

VOID Hv_Cal_Bcon_SetFreqT3(UINT32 uiFreq3)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_FREQ_T3, uiFreq3);
    return;
}

VOID Hv_Cal_Bcon_SwStart(UINT32 uiLane)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_DIMTX_SWSTART, 0);
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_DIMTX_SWSTART, uiLane);
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL, reg_sin_en, 0);
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL, reg_sin_en, 1);
    return;
}

VOID Hv_Cal_Bcon_StartSel(UINT32 uiLane)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_DIMCMDTX_SWSEL, uiLane);
    return;
}

VOID Hv_Cal_Bcon_VsyncSel(UINT32 uiSel)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_1, reg_dimctrl_vsync_sel, uiSel);
    return;
}

VOID Hv_Cal_Bcon_SetBufSize(UINT32 uiLane, UINT32 uiSize)
{
    
    UINT32 uiVal = 0;
    UCHAR8 ucGap = 0;
    if (uiLane < 24)
    {
        if(uiLane <= 4)
        {
            ucGap = 0;
        }
        else
        {
            ucGap = 8;
        }
        uiVal = HV_R32(RX_KV_1DIMMER_CTRL_REG5_REG_RAM_OFST_0 + uiLane*4 + ucGap);
        uiVal = (uiVal & 0xffff0000)|((uiSize*uiLane)&0xffff);
        HV_W32(RX_KV_1DIMMER_CTRL_REG5_REG_RAM_OFST_0 + uiLane*4 + ucGap, uiVal);
    }
    else
    {
        /*
        HV_LOG_ERROR(BCON, "Lane num Error");
        */
    }
    return;
}


VOID Hv_Cal_Bcon_SetEncode(UINT32 uiLane)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_TX_CMODE, uiLane);
    return;
}

VOID Hv_Cal_Bcon_SetVendor(UINT32 uiVendor)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_1, reg_vendor, uiVendor);
    return;
}

VOID Hv_Cal_Bcon_SetHYEncode(UINT32 uiEncode)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_1, reg_hy_pack_mode, uiEncode);
    return;
}

VOID Hv_Cal_Bcon_SetXXPackLen(UINT32 uiLen)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_XX_BURSTLENTH, reg_xx_packet_lenth, uiLen);
    return;
}

VOID Hv_Cal_Bcon_SetXXResetMode(UINT32 uiMode)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_XX_BURSTLENTH, reg_xx_reset_mode, uiMode);
    return;
}



VOID Hv_Cal_Bcon_SetXXMsb(UINT32 uiMsb)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_48, reg_t_sin_msb, uiMsb);
    return;
}

UCHAR8 Hv_Cal_Bcon_GetBusy(VOID)
{
    UINT32 uiStatus = 0;
    uiStatus = HV_R32(RX_KV_DIMMER_CTRL_REG1_REGR_DIMCTRL_STATE);
    return uiStatus;
}

VOID Hv_Cal_Bcon_XXSetSinMux(UINT32 uiMux)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL, reg_t_x_sin_mux, uiMux);
    return;
}

VOID Hv_Cal_Bcon_SetTxSinEn(UINT32 uiEn)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL, reg_tx_sin_en, uiEn);
    return;
}

VOID Hv_Cal_Bcon_SetSinEn(UINT32 uiEn)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL, reg_sin_en, uiEn);
    return;
}

VOID Hv_Cal_Bcon_SetLut(UINT32 uiLut)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL, reg_lut_sel, uiLut);
    return;
}


UCHAR8 Hv_Cal_Bcon_GetSramIndex(VOID)
{
    UINT32 uiIndex = 0;
    HV_R32_DECL_VAR();
    uiIndex = HV_R32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_SRAM_INDEX, reg_sram_index);
    return uiIndex;
}

VOID Hv_Cal_Bcon_SetSramIndex(UINT32 uiIndex)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_SRAM_INDEX, reg_sram_index, uiIndex);
    return;
}

VOID Hv_Cal_Bcon_SetSramAddr(UINT32 uiAddr)
{
    HV_W32(REG_BCON_RAM_DATA_OFFSET, 0x0);
    HV_W32(REG_BCON_RAM_DATA_OFFSET, BCON_RAM_START_ADDR+uiAddr);
    return;
}

VOID Hv_Cal_Bcon_SramWrite(UINT32 uiData)
{
    HV_W32(REG_BCON_RAM_DATA_ENTRY, uiData);
    return;
}

UINT32 Hv_Cal_Bcon_ReadSram(VOID)
{
    UINT32 uiData = 0;
    uiData  = HV_R32(REG_BCON_RAM_DATA_ENTRY);
    return uiData;
}



VOID Hv_Cal_Bcon_SetLane0SingleCmDWidth(UINT32 uiVal)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_CMD_LENTH_00, reg_dimctrl_cmd_width_00, uiVal);
    return;
}

VOID Hv_Cal_Bcon_SetLane0SingleCmDLength(UINT32 uiLength)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_CMD_LENTH_00, reg_dimctrl_cmd_lenth_00, uiLength);
    return;
}

VOID Hv_Cal_Bcon_SetLane0SingleCmDMode(UINT32 uiMode)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_DIMCTRL_CMD_LENTH_00, reg_dimcmd_mode_00, uiMode);
    return;
}


VOID Hv_Cal_Bcon_SetLane0SingleDataLength(UINT32 uiLength)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_68, reg_dimctrl_data_lenth_00, uiLength);
    return;
}

VOID Hv_Cal_Bcon_SetLane0SingleDataWidth(UINT32 uiVal)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_68, reg_dimctrl_data_width_00, uiVal);
    return;
}


VOID Hv_Cal_Bcon_SetOeEnable(UINT32 uiLane)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_48, reg_tx_oe, uiLane);
}

VOID Hv_Cal_Bcon_SetXSinEnable(UINT32 uiLane)
{
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL, reg_t_x_sin_mux, 1 << uiLane);
    HV_W32_FIELD(RX_KV_DIMMER_CTRL_REG1_REG_RX_SEL, reg_sin_en, 1);
}

VOID Hv_Cal_Bcon_SetLaneRamOffset(UCHAR8 uiLaneIndex, UINT32 offset)
{
    UINT32 uiVal = 0;
    if (uiLaneIndex < 24)
    {
        uiVal = HV_R32(RX_KV_1DIMMER_CTRL_REG5_REG_RAM_OFST_0 + uiLaneIndex*4);
        uiVal = (uiVal&0xffff0000) | (offset&0xffff);
        HV_W32(RX_KV_1DIMMER_CTRL_REG5_REG_RAM_OFST_0 + uiLaneIndex*4, uiVal);
    }
    else
    {
        /*
        HV_LOG_ERROR(BCON, "Lane num Error");
        */
    }
    return;
}

VOID Hv_Cal_Bcon_SetLaneStride(UCHAR8 uiLaneIndex, UINT32 stride)
{
    UINT32 uiVal = 0;
    if (uiLaneIndex < 24)
    {
        uiVal = HV_R32(RX_KV_1DIMMER_CTRL_REG5_REG_RAM_OFST_0 + uiLaneIndex*4);
        uiVal = (uiVal&0xffff) | ((stride&0xffff) << 16);
        HV_W32(RX_KV_1DIMMER_CTRL_REG5_REG_RAM_OFST_0 + uiLaneIndex*4, uiVal);
    }
    else
    {
        /*
        HV_LOG_ERROR(BCON, "Lane num Error");
        */
    }
    return;
}

VOID Hv_Cal_Bcon_SetXXWaitNum(UINT32 uiWait)
{
    HV_W32(RX_KV_DIMMER_CTRL_REG1_REG_XX_PCK_WAIT_NUM, uiWait);
    return;
}
