#ifndef _HV_PAGE_HT7315_UART0_H_
#define _HV_PAGE_HT7315_UART0_H_

#ifndef HV_UART0_BASE_ADDRESS
    #define HV_UART0_BASE_ADDRESS                                         0x11082000
#endif


#define CPU_SYS_UART0_THR_DLL                                            (HV_UART0_BASE_ADDRESS + 0x000)

#define CPU_SYS_UART0_THR_DLL_struct                                     rs_cpu_sys_uart0_thr_dll

typedef struct _rs_cpu_sys_uart0_thr_dll  rs_cpu_sys_uart0_thr_dll;
struct _rs_cpu_sys_uart0_thr_dll {
    unsigned int reg_THR_DLL                                : 9;
    unsigned int reserved                                   :23;
};
#define cpu_sys_uart0_thr_dll(val) ((rs_cpu_sys_uart0_thr_dll*)&(val))



#define CPU_SYS_UART0_DLH_IER                                            (HV_UART0_BASE_ADDRESS + 0x004)

#define CPU_SYS_UART0_DLH_IER_struct                                     rs_cpu_sys_uart0_dlh_ier

typedef struct _rs_cpu_sys_uart0_dlh_ier  rs_cpu_sys_uart0_dlh_ier;
struct _rs_cpu_sys_uart0_dlh_ier {
    unsigned int reg_DLH_IER                                : 8;
    unsigned int reserved                                   :24;
};
#define cpu_sys_uart0_dlh_ier(val) ((rs_cpu_sys_uart0_dlh_ier*)&(val))



#define CPU_SYS_UART0_FCR                                                (HV_UART0_BASE_ADDRESS + 0x008)

#define CPU_SYS_UART0_FCR_struct                                         rs_cpu_sys_uart0_fcr

typedef struct _rs_cpu_sys_uart0_fcr  rs_cpu_sys_uart0_fcr;
struct _rs_cpu_sys_uart0_fcr {
    unsigned int reg_FIFOE                                  : 1;
    unsigned int reg_RFIFOR                                 : 1;
    unsigned int reg_XFIFOR                                 : 1;
    unsigned int reg_DMAM                                   : 1;
    unsigned int TET                                        : 2;
    unsigned int RT                                         : 2;
    unsigned int reserved                                   :24;
};
#define cpu_sys_uart0_fcr(val) ((rs_cpu_sys_uart0_fcr*)&(val))



#define CPU_SYS_UART0_LCR                                                (HV_UART0_BASE_ADDRESS + 0x00C)

#define CPU_SYS_UART0_LCR_struct                                         rs_cpu_sys_uart0_lcr

typedef struct _rs_cpu_sys_uart0_lcr  rs_cpu_sys_uart0_lcr;
struct _rs_cpu_sys_uart0_lcr {
    unsigned int reg_DLS                                    : 2;
    unsigned int reg_STOP                                   : 1;
    unsigned int reg_PEN                                    : 1;
    unsigned int reg_EPS                                    : 1;
    unsigned int reg_SP                                     : 1;
    unsigned int reg_BC                                     : 1;
    unsigned int reg_DLAB                                   : 1;
    unsigned int reserved                                   :24;
};
#define cpu_sys_uart0_lcr(val) ((rs_cpu_sys_uart0_lcr*)&(val))



#define CPU_SYS_UART0_MCR                                                (HV_UART0_BASE_ADDRESS + 0x010)

#define CPU_SYS_UART0_MCR_struct                                         rs_cpu_sys_uart0_mcr

typedef struct _rs_cpu_sys_uart0_mcr  rs_cpu_sys_uart0_mcr;
struct _rs_cpu_sys_uart0_mcr {
    unsigned int reg_DTR                                    : 1;
    unsigned int reg_RTS                                    : 1;
    unsigned int reg_OUT1                                   : 1;
    unsigned int reg_OUT2                                   : 1;
    unsigned int reg_LoopBack                               : 1;
    unsigned int reg_AFCE                                   : 1;
    unsigned int reg_SIRE                                   : 1;
    unsigned int reserved                                   :25;
};
#define cpu_sys_uart0_mcr(val) ((rs_cpu_sys_uart0_mcr*)&(val))



#define CPU_SYS_UART0_LSR                                                (HV_UART0_BASE_ADDRESS + 0x014)

#define CPU_SYS_UART0_LSR_struct                                         rs_cpu_sys_uart0_lsr

typedef struct _rs_cpu_sys_uart0_lsr  rs_cpu_sys_uart0_lsr;
struct _rs_cpu_sys_uart0_lsr {
    unsigned int reg_DR                                     : 1;
    unsigned int reg_OE                                     : 1;
    unsigned int reg_PE                                     : 1;
    unsigned int reg_FE                                     : 1;
    unsigned int reg_BI                                     : 1;
    unsigned int reg_THRE                                   : 1;
    unsigned int reg_TEMT                                   : 1;
    unsigned int reg_RFE                                    : 1;
    unsigned int reg_ADDR_RCVD                              : 1;
    unsigned int reserved                                   :23;
};
#define cpu_sys_uart0_lsr(val) ((rs_cpu_sys_uart0_lsr*)&(val))



#define CPU_SYS_UART0_MSR                                                (HV_UART0_BASE_ADDRESS + 0x018)

#define CPU_SYS_UART0_MSR_struct                                         rs_cpu_sys_uart0_msr

typedef struct _rs_cpu_sys_uart0_msr  rs_cpu_sys_uart0_msr;
struct _rs_cpu_sys_uart0_msr {
    unsigned int reg_DCTS                                   : 1;
    unsigned int reg_DDSR                                   : 1;
    unsigned int reg_TERI                                   : 1;
    unsigned int reg_DDCD                                   : 1;
    unsigned int reg_CTS                                    : 1;
    unsigned int reg_DSR                                    : 1;
    unsigned int reg_RI                                     : 1;
    unsigned int reg_DCD                                    : 1;
    unsigned int reserved                                   :24;
};
#define cpu_sys_uart0_msr(val) ((rs_cpu_sys_uart0_msr*)&(val))



#define CPU_SYS_UART0_SCR                                                (HV_UART0_BASE_ADDRESS + 0x01C)

#define CPU_SYS_UART0_SCR_struct                                         rs_cpu_sys_uart0_scr

typedef struct _rs_cpu_sys_uart0_scr  rs_cpu_sys_uart0_scr;
struct _rs_cpu_sys_uart0_scr {
    unsigned int reg_SCR                                    : 8;
    unsigned int reserved                                   :24;
};
#define cpu_sys_uart0_scr(val) ((rs_cpu_sys_uart0_scr*)&(val))



#define CPU_SYS_UART0_FAR                                                (HV_UART0_BASE_ADDRESS + 0x070)

#define CPU_SYS_UART0_FAR_struct                                         rs_cpu_sys_uart0_far

typedef struct _rs_cpu_sys_uart0_far  rs_cpu_sys_uart0_far;
struct _rs_cpu_sys_uart0_far {
    unsigned int reg_FAR                                    : 1;
    unsigned int reserved                                   :31;
};
#define cpu_sys_uart0_far(val) ((rs_cpu_sys_uart0_far*)&(val))



#define CPU_SYS_UART0_TFR                                                (HV_UART0_BASE_ADDRESS + 0x074)

#define CPU_SYS_UART0_TFR_struct                                         rs_cpu_sys_uart0_tfr

typedef struct _rs_cpu_sys_uart0_tfr  rs_cpu_sys_uart0_tfr;
struct _rs_cpu_sys_uart0_tfr {
    unsigned int reg_TFR                                    : 8;
    unsigned int reserved                                   :24;
};
#define cpu_sys_uart0_tfr(val) ((rs_cpu_sys_uart0_tfr*)&(val))



#define CPU_SYS_UART0_RFW                                                (HV_UART0_BASE_ADDRESS + 0x078)

#define CPU_SYS_UART0_RFW_struct                                         rs_cpu_sys_uart0_rfw

typedef struct _rs_cpu_sys_uart0_rfw  rs_cpu_sys_uart0_rfw;
struct _rs_cpu_sys_uart0_rfw {
    unsigned int reg_RFWD                                   : 8;
    unsigned int reg_RFPE                                   : 1;
    unsigned int reg_RFFE                                   : 1;
    unsigned int reserved                                   :22;
};
#define cpu_sys_uart0_rfw(val) ((rs_cpu_sys_uart0_rfw*)&(val))



#define CPU_SYS_UART0_USR                                                (HV_UART0_BASE_ADDRESS + 0x07C)

#define CPU_SYS_UART0_USR_struct                                         rs_cpu_sys_uart0_usr

typedef struct _rs_cpu_sys_uart0_usr  rs_cpu_sys_uart0_usr;
struct _rs_cpu_sys_uart0_usr {
    unsigned int reg_BUSY                                   : 1;
    unsigned int reg_TFNF                                   : 1;
    unsigned int reg_TFE                                    : 1;
    unsigned int reg_RFNE                                   : 1;
    unsigned int reg_RFF                                    : 1;
    unsigned int reserved                                   :27;
};
#define cpu_sys_uart0_usr(val) ((rs_cpu_sys_uart0_usr*)&(val))



#define CPU_SYS_UART0_TFL                                                (HV_UART0_BASE_ADDRESS + 0x080)

#define CPU_SYS_UART0_TFL_struct                                         rs_cpu_sys_uart0_tfl

typedef struct _rs_cpu_sys_uart0_tfl  rs_cpu_sys_uart0_tfl;
struct _rs_cpu_sys_uart0_tfl {
    unsigned int reg_tfl                                    : 6;
    unsigned int reserved                                   :26;
};
#define cpu_sys_uart0_tfl(val) ((rs_cpu_sys_uart0_tfl*)&(val))



#define CPU_SYS_UART0_RFL                                                (HV_UART0_BASE_ADDRESS + 0x084)

#define CPU_SYS_UART0_RFL_struct                                         rs_cpu_sys_uart0_rfl

typedef struct _rs_cpu_sys_uart0_rfl  rs_cpu_sys_uart0_rfl;
struct _rs_cpu_sys_uart0_rfl {
    unsigned int reg_rfl                                    : 6;
    unsigned int reserved                                   :26;
};
#define cpu_sys_uart0_rfl(val) ((rs_cpu_sys_uart0_rfl*)&(val))



#define CPU_SYS_UART0_HTX                                                (HV_UART0_BASE_ADDRESS + 0x0A4)

#define CPU_SYS_UART0_HTX_struct                                         rs_cpu_sys_uart0_htx

typedef struct _rs_cpu_sys_uart0_htx  rs_cpu_sys_uart0_htx;
struct _rs_cpu_sys_uart0_htx {
    unsigned int reg_HTX                                    : 1;
    unsigned int reserved                                   :31;
};
#define cpu_sys_uart0_htx(val) ((rs_cpu_sys_uart0_htx*)&(val))



#define CPU_SYS_UART0_DMASA                                              (HV_UART0_BASE_ADDRESS + 0x0A8)

#define CPU_SYS_UART0_DMASA_struct                                       rs_cpu_sys_uart0_dmasa

typedef struct _rs_cpu_sys_uart0_dmasa  rs_cpu_sys_uart0_dmasa;
struct _rs_cpu_sys_uart0_dmasa {
    unsigned int reg_DMASA                                  : 1;
    unsigned int reserved                                   :31;
};
#define cpu_sys_uart0_dmasa(val) ((rs_cpu_sys_uart0_dmasa*)&(val))



#define CPU_SYS_UART0_TCR                                                (HV_UART0_BASE_ADDRESS + 0x0AC)

#define CPU_SYS_UART0_TCR_struct                                         rs_cpu_sys_uart0_tcr

typedef struct _rs_cpu_sys_uart0_tcr  rs_cpu_sys_uart0_tcr;
struct _rs_cpu_sys_uart0_tcr {
    unsigned int reg_RS485_EN                               : 1;
    unsigned int reg_RE_POL                                 : 1;
    unsigned int reg_DE_POL                                 : 1;
    unsigned int reg_XFER_MODE                              : 2;
    unsigned int reserved                                   :27;
};
#define cpu_sys_uart0_tcr(val) ((rs_cpu_sys_uart0_tcr*)&(val))



#define CPU_SYS_UART0_DE_EN                                              (HV_UART0_BASE_ADDRESS + 0x0B0)

#define CPU_SYS_UART0_DE_EN_struct                                       rs_cpu_sys_uart0_de_en

typedef struct _rs_cpu_sys_uart0_de_en  rs_cpu_sys_uart0_de_en;
struct _rs_cpu_sys_uart0_de_en {
    unsigned int reg_DE_Enable                              : 1;
    unsigned int reserved                                   :31;
};
#define cpu_sys_uart0_de_en(val) ((rs_cpu_sys_uart0_de_en*)&(val))



#define CPU_SYS_UART0_RE_EN                                              (HV_UART0_BASE_ADDRESS + 0x0B4)

#define CPU_SYS_UART0_RE_EN_struct                                       rs_cpu_sys_uart0_re_en

typedef struct _rs_cpu_sys_uart0_re_en  rs_cpu_sys_uart0_re_en;
struct _rs_cpu_sys_uart0_re_en {
    unsigned int reg_RE_Enable                              : 1;
    unsigned int reserved                                   :31;
};
#define cpu_sys_uart0_re_en(val) ((rs_cpu_sys_uart0_re_en*)&(val))



#define CPU_SYS_UART0_DET                                                (HV_UART0_BASE_ADDRESS + 0x0B8)

#define CPU_SYS_UART0_DET_struct                                         rs_cpu_sys_uart0_det

typedef struct _rs_cpu_sys_uart0_det  rs_cpu_sys_uart0_det;
struct _rs_cpu_sys_uart0_det {
    unsigned int reg_DE_Assertion_Time                      : 8;
    unsigned int reserved                                   : 8;
    unsigned int reg_DE_De_assertion_Time                   : 8;
    unsigned int reserved_1                                 : 8;
};
#define cpu_sys_uart0_det(val) ((rs_cpu_sys_uart0_det*)&(val))



#define CPU_SYS_UART0_TAT                                                (HV_UART0_BASE_ADDRESS + 0x0BC)

#define CPU_SYS_UART0_TAT_struct                                         rs_cpu_sys_uart0_tat

typedef struct _rs_cpu_sys_uart0_tat  rs_cpu_sys_uart0_tat;
struct _rs_cpu_sys_uart0_tat {
    unsigned int reg_DE_to_RE                               :16;
    unsigned int reg_RE_to_DE                               :16;
};
#define cpu_sys_uart0_tat(val) ((rs_cpu_sys_uart0_tat*)&(val))



#define CPU_SYS_UART0_DLF                                                (HV_UART0_BASE_ADDRESS + 0x0C0)

#define CPU_SYS_UART0_DLF_struct                                         rs_cpu_sys_uart0_dlf

typedef struct _rs_cpu_sys_uart0_dlf  rs_cpu_sys_uart0_dlf;
struct _rs_cpu_sys_uart0_dlf {
    unsigned int reg_DLF                                    : 6;
    unsigned int reserved                                   :26;
};
#define cpu_sys_uart0_dlf(val) ((rs_cpu_sys_uart0_dlf*)&(val))



#define CPU_SYS_UART0_RAR                                                (HV_UART0_BASE_ADDRESS + 0x0C4)

#define CPU_SYS_UART0_RAR_struct                                         rs_cpu_sys_uart0_rar

typedef struct _rs_cpu_sys_uart0_rar  rs_cpu_sys_uart0_rar;
struct _rs_cpu_sys_uart0_rar {
    unsigned int reg_RAR                                    : 8;
    unsigned int reserved                                   :24;
};
#define cpu_sys_uart0_rar(val) ((rs_cpu_sys_uart0_rar*)&(val))



#define CPU_SYS_UART0_TAR                                                (HV_UART0_BASE_ADDRESS + 0x0C8)

#define CPU_SYS_UART0_TAR_struct                                         rs_cpu_sys_uart0_tar

typedef struct _rs_cpu_sys_uart0_tar  rs_cpu_sys_uart0_tar;
struct _rs_cpu_sys_uart0_tar {
    unsigned int reg_TAR                                    : 8;
    unsigned int reserved                                   :24;
};
#define cpu_sys_uart0_tar(val) ((rs_cpu_sys_uart0_tar*)&(val))



#define CPU_SYS_UART0_LCR_EXT                                            (HV_UART0_BASE_ADDRESS + 0x0CC)

#define CPU_SYS_UART0_LCR_EXT_struct                                     rs_cpu_sys_uart0_lcr_ext

typedef struct _rs_cpu_sys_uart0_lcr_ext  rs_cpu_sys_uart0_lcr_ext;
struct _rs_cpu_sys_uart0_lcr_ext {
    unsigned int reg_DLS_E                                  : 1;
    unsigned int reg_ADDR_MATCH                             : 1;
    unsigned int reg_SEND_ADDR                              : 1;
    unsigned int reg_TRANSMIT_MODE                          : 1;
    unsigned int reserved                                   :28;
};
#define cpu_sys_uart0_lcr_ext(val) ((rs_cpu_sys_uart0_lcr_ext*)&(val))



#define CPU_SYS_UART0_REG_TIMEOUT_RST                                    (HV_UART0_BASE_ADDRESS + 0x0D4)

#define CPU_SYS_UART0_REG_TIMEOUT_RST_struct                             rs_cpu_sys_uart0_reg_timeout_rst

typedef struct _rs_cpu_sys_uart0_reg_timeout_rst  rs_cpu_sys_uart0_reg_timeout_rst;
struct _rs_cpu_sys_uart0_reg_timeout_rst {
    unsigned int reg_REG_TIMEOUT_RST                        : 4;
    unsigned int reserved                                   :28;
};
#define cpu_sys_uart0_reg_timeout_rst(val) ((rs_cpu_sys_uart0_reg_timeout_rst*)&(val))



#define CPU_SYS_UART0_CPR                                                (HV_UART0_BASE_ADDRESS + 0x0F4)

#define CPU_SYS_UART0_CPR_struct                                         rs_cpu_sys_uart0_cpr

typedef struct _rs_cpu_sys_uart0_cpr  rs_cpu_sys_uart0_cpr;
struct _rs_cpu_sys_uart0_cpr {
    unsigned int reg_APB_DATA_WIDTH                         : 2;
    unsigned int reserved                                   : 2;
    unsigned int reg_AFCE_MODE                              : 1;
    unsigned int reg_THRE_MODE                              : 1;
    unsigned int reg_SIR_MODE                               : 1;
    unsigned int reg_SIR_LP_MODE                            : 1;
    unsigned int reg_ADDITIONAL_FEAT                        : 1;
    unsigned int reg_FIFO_ACCESS                            : 1;
    unsigned int reg_FIFO_STAT                              : 1;
    unsigned int reg_SHADOW                                 : 1;
    unsigned int reg_UART_ADD_ENCODED_PARAMS                : 1;
    unsigned int reg_DMA_EXTRA                              : 1;
    unsigned int reserved_1                                 : 2;
    unsigned int FIFO_MODE                                  : 8;
    unsigned int reserved_2                                 : 8;
};
#define cpu_sys_uart0_cpr(val) ((rs_cpu_sys_uart0_cpr*)&(val))



#define CPU_SYS_UART0_UCV                                                (HV_UART0_BASE_ADDRESS + 0x0F8)

#define CPU_SYS_UART0_UCV_struct                                         rs_cpu_sys_uart0_ucv

typedef struct _rs_cpu_sys_uart0_ucv  rs_cpu_sys_uart0_ucv;
struct _rs_cpu_sys_uart0_ucv {
    unsigned int reg_UART_Component_Version                 :32;
};
#define cpu_sys_uart0_ucv(val) ((rs_cpu_sys_uart0_ucv*)&(val))



#define CPU_SYS_UART0_CTR                                                (HV_UART0_BASE_ADDRESS + 0x0FC)

#define CPU_SYS_UART0_CTR_struct                                         rs_cpu_sys_uart0_ctr

typedef struct _rs_cpu_sys_uart0_ctr  rs_cpu_sys_uart0_ctr;
struct _rs_cpu_sys_uart0_ctr {
    unsigned int reg_Peripheral_ID                          :32;
};
#define cpu_sys_uart0_ctr(val) ((rs_cpu_sys_uart0_ctr*)&(val))



#define CPU_SYS_UART0_UART_CTL0                                          (HV_UART0_BASE_ADDRESS + 0x100)

#define CPU_SYS_UART0_UART_CTL0_struct                                   rs_cpu_sys_uart0_uart_ctl0

typedef struct _rs_cpu_sys_uart0_uart_ctl0  rs_cpu_sys_uart0_uart_ctl0;
struct _rs_cpu_sys_uart0_uart_ctl0 {
    unsigned int reg_abr_en                                 : 1;
    unsigned int reg_debug_sel                              : 1;
    unsigned int reg_abrf                                   : 1;
    unsigned int reg_bit_num                                :16;
    unsigned int reserved                                   :13;
};
#define cpu_sys_uart0_uart_ctl0(val) ((rs_cpu_sys_uart0_uart_ctl0*)&(val))



#endif