#ifndef _HV_PAGE_HT7315_EDP_RX_MSGAUX_URP_SW_01_H_
#define _HV_PAGE_HT7315_EDP_RX_MSGAUX_URP_SW_01_H_

#ifndef HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS
    #define HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS                                         0x1104B500
#endif


#define RX_EDP_RX_MSGAUX_URP_SW_01_00                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x00)

#define RX_EDP_RX_MSGAUX_URP_SW_01_00_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_00

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_00  rs_rx_edp_rx_msgaux_urp_sw_01_00;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_00 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte0      : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte1      : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte2      : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte3      : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_00(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_00*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_04                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x04)

#define RX_EDP_RX_MSGAUX_URP_SW_01_04_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_04

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_04  rs_rx_edp_rx_msgaux_urp_sw_01_04;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_04 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte4      : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte5      : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte6      : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte7      : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_04(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_04*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_08                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x08)

#define RX_EDP_RX_MSGAUX_URP_SW_01_08_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_08

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_08  rs_rx_edp_rx_msgaux_urp_sw_01_08;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_08 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte8      : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte9      : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte10     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte11     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_08(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_08*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_0C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x0C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_0C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_0c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_0c  rs_rx_edp_rx_msgaux_urp_sw_01_0c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_0c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte12     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte13     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte14     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte15     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_0c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_0c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_10                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x10)

#define RX_EDP_RX_MSGAUX_URP_SW_01_10_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_10

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_10  rs_rx_edp_rx_msgaux_urp_sw_01_10;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_10 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte16     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte17     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte18     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte19     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_10(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_10*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_14                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x14)

#define RX_EDP_RX_MSGAUX_URP_SW_01_14_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_14

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_14  rs_rx_edp_rx_msgaux_urp_sw_01_14;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_14 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte20     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte21     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte22     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte23     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_14(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_14*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_18                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x18)

#define RX_EDP_RX_MSGAUX_URP_SW_01_18_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_18

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_18  rs_rx_edp_rx_msgaux_urp_sw_01_18;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_18 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte24     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte25     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte26     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte27     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_18(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_18*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_1C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x1C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_1C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_1c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_1c  rs_rx_edp_rx_msgaux_urp_sw_01_1c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_1c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte28     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte29     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte30     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte31     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_1c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_1c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_20                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x20)

#define RX_EDP_RX_MSGAUX_URP_SW_01_20_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_20

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_20  rs_rx_edp_rx_msgaux_urp_sw_01_20;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_20 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte32     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte33     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte34     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte35     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_20(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_20*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_24                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x24)

#define RX_EDP_RX_MSGAUX_URP_SW_01_24_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_24

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_24  rs_rx_edp_rx_msgaux_urp_sw_01_24;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_24 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte36     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte37     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte38     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte39     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_24(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_24*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_28                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x28)

#define RX_EDP_RX_MSGAUX_URP_SW_01_28_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_28

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_28  rs_rx_edp_rx_msgaux_urp_sw_01_28;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_28 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte40     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte41     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte42     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte43     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_28(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_28*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_2C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x2C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_2C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_2c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_2c  rs_rx_edp_rx_msgaux_urp_sw_01_2c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_2c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte44     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte45     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte46     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte47     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_2c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_2c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_30                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x30)

#define RX_EDP_RX_MSGAUX_URP_SW_01_30_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_30

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_30  rs_rx_edp_rx_msgaux_urp_sw_01_30;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_30 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte48     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte49     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte50     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte51     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_30(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_30*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_34                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x34)

#define RX_EDP_RX_MSGAUX_URP_SW_01_34_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_34

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_34  rs_rx_edp_rx_msgaux_urp_sw_01_34;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_34 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte52     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte53     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte54     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte55     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_34(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_34*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_38                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x38)

#define RX_EDP_RX_MSGAUX_URP_SW_01_38_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_38

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_38  rs_rx_edp_rx_msgaux_urp_sw_01_38;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_38 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte56     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte57     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte58     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte59     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_38(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_38*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_3C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x3C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_3C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_3c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_3c  rs_rx_edp_rx_msgaux_urp_sw_01_3c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_3c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte60     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte61     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte62     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte63     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_3c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_3c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_40                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x40)

#define RX_EDP_RX_MSGAUX_URP_SW_01_40_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_40

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_40  rs_rx_edp_rx_msgaux_urp_sw_01_40;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_40 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte64     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte65     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte66     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte67     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_40(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_40*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_44                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x44)

#define RX_EDP_RX_MSGAUX_URP_SW_01_44_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_44

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_44  rs_rx_edp_rx_msgaux_urp_sw_01_44;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_44 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte68     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte69     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte70     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte71     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_44(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_44*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_48                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x48)

#define RX_EDP_RX_MSGAUX_URP_SW_01_48_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_48

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_48  rs_rx_edp_rx_msgaux_urp_sw_01_48;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_48 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte72     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte73     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte74     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte75     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_48(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_48*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_4C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x4C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_4C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_4c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_4c  rs_rx_edp_rx_msgaux_urp_sw_01_4c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_4c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte76     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte77     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte78     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte79     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_4c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_4c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_50                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x50)

#define RX_EDP_RX_MSGAUX_URP_SW_01_50_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_50

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_50  rs_rx_edp_rx_msgaux_urp_sw_01_50;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_50 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte80     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte81     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte82     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte83     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_50(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_50*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_54                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x54)

#define RX_EDP_RX_MSGAUX_URP_SW_01_54_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_54

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_54  rs_rx_edp_rx_msgaux_urp_sw_01_54;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_54 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte84     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte85     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte86     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte87     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_54(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_54*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_58                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x58)

#define RX_EDP_RX_MSGAUX_URP_SW_01_58_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_58

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_58  rs_rx_edp_rx_msgaux_urp_sw_01_58;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_58 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte88     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte89     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte90     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte91     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_58(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_58*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_5C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x5C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_5C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_5c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_5c  rs_rx_edp_rx_msgaux_urp_sw_01_5c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_5c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte92     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte93     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte94     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte95     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_5c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_5c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_60                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x60)

#define RX_EDP_RX_MSGAUX_URP_SW_01_60_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_60

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_60  rs_rx_edp_rx_msgaux_urp_sw_01_60;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_60 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte96     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte97     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte98     : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte99     : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_60(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_60*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_64                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x64)

#define RX_EDP_RX_MSGAUX_URP_SW_01_64_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_64

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_64  rs_rx_edp_rx_msgaux_urp_sw_01_64;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_64 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte100    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte101    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte102    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte103    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_64(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_64*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_68                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x68)

#define RX_EDP_RX_MSGAUX_URP_SW_01_68_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_68

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_68  rs_rx_edp_rx_msgaux_urp_sw_01_68;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_68 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte104    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte105    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte106    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte107    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_68(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_68*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_6C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x6C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_6C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_6c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_6c  rs_rx_edp_rx_msgaux_urp_sw_01_6c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_6c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte108    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte109    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte110    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte111    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_6c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_6c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_70                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x70)

#define RX_EDP_RX_MSGAUX_URP_SW_01_70_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_70

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_70  rs_rx_edp_rx_msgaux_urp_sw_01_70;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_70 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte112    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte113    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte114    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte115    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_70(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_70*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_74                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x74)

#define RX_EDP_RX_MSGAUX_URP_SW_01_74_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_74

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_74  rs_rx_edp_rx_msgaux_urp_sw_01_74;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_74 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte116    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte117    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte118    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte119    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_74(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_74*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_78                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x78)

#define RX_EDP_RX_MSGAUX_URP_SW_01_78_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_78

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_78  rs_rx_edp_rx_msgaux_urp_sw_01_78;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_78 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte120    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte121    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte122    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte123    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_78(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_78*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_7C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x7C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_7C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_7c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_7c  rs_rx_edp_rx_msgaux_urp_sw_01_7c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_7c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte124    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte125    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte126    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte127    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_7c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_7c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_80                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x80)

#define RX_EDP_RX_MSGAUX_URP_SW_01_80_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_80

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_80  rs_rx_edp_rx_msgaux_urp_sw_01_80;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_80 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte128    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte129    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte130    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte131    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_80(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_80*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_84                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x84)

#define RX_EDP_RX_MSGAUX_URP_SW_01_84_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_84

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_84  rs_rx_edp_rx_msgaux_urp_sw_01_84;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_84 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte132    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte133    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte134    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte135    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_84(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_84*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_88                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x88)

#define RX_EDP_RX_MSGAUX_URP_SW_01_88_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_88

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_88  rs_rx_edp_rx_msgaux_urp_sw_01_88;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_88 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte136    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte137    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte138    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte139    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_88(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_88*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_8C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x8C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_8C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_8c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_8c  rs_rx_edp_rx_msgaux_urp_sw_01_8c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_8c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte140    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte141    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte142    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte143    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_8c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_8c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_90                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x90)

#define RX_EDP_RX_MSGAUX_URP_SW_01_90_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_90

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_90  rs_rx_edp_rx_msgaux_urp_sw_01_90;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_90 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte144    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte145    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte146    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte147    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_90(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_90*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_94                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x94)

#define RX_EDP_RX_MSGAUX_URP_SW_01_94_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_94

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_94  rs_rx_edp_rx_msgaux_urp_sw_01_94;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_94 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte148    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte149    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte150    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte151    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_94(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_94*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_98                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x98)

#define RX_EDP_RX_MSGAUX_URP_SW_01_98_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_98

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_98  rs_rx_edp_rx_msgaux_urp_sw_01_98;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_98 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte152    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte153    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte154    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte155    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_98(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_98*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_9C                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0x9C)

#define RX_EDP_RX_MSGAUX_URP_SW_01_9C_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_9c

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_9c  rs_rx_edp_rx_msgaux_urp_sw_01_9c;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_9c {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte156    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte157    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte158    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte159    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_9c(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_9c*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_A0                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xA0)

#define RX_EDP_RX_MSGAUX_URP_SW_01_A0_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_a0

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_a0  rs_rx_edp_rx_msgaux_urp_sw_01_a0;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_a0 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte160    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte161    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte162    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte163    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_a0(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_a0*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_A4                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xA4)

#define RX_EDP_RX_MSGAUX_URP_SW_01_A4_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_a4

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_a4  rs_rx_edp_rx_msgaux_urp_sw_01_a4;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_a4 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte164    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte165    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte166    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte167    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_a4(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_a4*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_A8                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xA8)

#define RX_EDP_RX_MSGAUX_URP_SW_01_A8_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_a8

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_a8  rs_rx_edp_rx_msgaux_urp_sw_01_a8;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_a8 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte168    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte169    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte170    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte171    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_a8(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_a8*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_AC                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xAC)

#define RX_EDP_RX_MSGAUX_URP_SW_01_AC_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_ac

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_ac  rs_rx_edp_rx_msgaux_urp_sw_01_ac;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_ac {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte172    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte173    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte174    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte175    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_ac(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_ac*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_B0                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xB0)

#define RX_EDP_RX_MSGAUX_URP_SW_01_B0_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_b0

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_b0  rs_rx_edp_rx_msgaux_urp_sw_01_b0;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_b0 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte176    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte177    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte178    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte179    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_b0(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_b0*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_B4                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xB4)

#define RX_EDP_RX_MSGAUX_URP_SW_01_B4_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_b4

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_b4  rs_rx_edp_rx_msgaux_urp_sw_01_b4;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_b4 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte180    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte181    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte182    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte183    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_b4(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_b4*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_B8                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xB8)

#define RX_EDP_RX_MSGAUX_URP_SW_01_B8_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_b8

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_b8  rs_rx_edp_rx_msgaux_urp_sw_01_b8;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_b8 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte184    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte185    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte186    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte187    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_b8(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_b8*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_BC                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xBC)

#define RX_EDP_RX_MSGAUX_URP_SW_01_BC_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_bc

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_bc  rs_rx_edp_rx_msgaux_urp_sw_01_bc;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_bc {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte188    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte189    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte190    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte191    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_bc(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_bc*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_C0                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xC0)

#define RX_EDP_RX_MSGAUX_URP_SW_01_C0_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_c0

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_c0  rs_rx_edp_rx_msgaux_urp_sw_01_c0;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_c0 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte192    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte193    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte194    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte195    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_c0(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_c0*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_C4                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xC4)

#define RX_EDP_RX_MSGAUX_URP_SW_01_C4_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_c4

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_c4  rs_rx_edp_rx_msgaux_urp_sw_01_c4;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_c4 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte196    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte197    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte198    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte199    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_c4(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_c4*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_C8                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xC8)

#define RX_EDP_RX_MSGAUX_URP_SW_01_C8_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_c8

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_c8  rs_rx_edp_rx_msgaux_urp_sw_01_c8;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_c8 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte200    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte201    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte202    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte203    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_c8(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_c8*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_CC                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xCC)

#define RX_EDP_RX_MSGAUX_URP_SW_01_CC_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_cc

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_cc  rs_rx_edp_rx_msgaux_urp_sw_01_cc;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_cc {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte204    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte205    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte206    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte207    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_cc(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_cc*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_D0                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xD0)

#define RX_EDP_RX_MSGAUX_URP_SW_01_D0_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_d0

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_d0  rs_rx_edp_rx_msgaux_urp_sw_01_d0;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_d0 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte208    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte209    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte210    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte211    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_d0(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_d0*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_D4                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xD4)

#define RX_EDP_RX_MSGAUX_URP_SW_01_D4_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_d4

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_d4  rs_rx_edp_rx_msgaux_urp_sw_01_d4;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_d4 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte212    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte213    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte214    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte215    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_d4(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_d4*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_D8                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xD8)

#define RX_EDP_RX_MSGAUX_URP_SW_01_D8_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_d8

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_d8  rs_rx_edp_rx_msgaux_urp_sw_01_d8;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_d8 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte216    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte217    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte218    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte219    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_d8(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_d8*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_DC                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xDC)

#define RX_EDP_RX_MSGAUX_URP_SW_01_DC_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_dc

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_dc  rs_rx_edp_rx_msgaux_urp_sw_01_dc;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_dc {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte220    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte221    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte222    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte223    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_dc(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_dc*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_E0                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xE0)

#define RX_EDP_RX_MSGAUX_URP_SW_01_E0_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_e0

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_e0  rs_rx_edp_rx_msgaux_urp_sw_01_e0;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_e0 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte224    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte225    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte226    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte227    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_e0(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_e0*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_E4                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xE4)

#define RX_EDP_RX_MSGAUX_URP_SW_01_E4_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_e4

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_e4  rs_rx_edp_rx_msgaux_urp_sw_01_e4;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_e4 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte228    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte229    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte230    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte231    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_e4(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_e4*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_E8                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xE8)

#define RX_EDP_RX_MSGAUX_URP_SW_01_E8_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_e8

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_e8  rs_rx_edp_rx_msgaux_urp_sw_01_e8;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_e8 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte232    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte233    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte234    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte235    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_e8(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_e8*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_EC                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xEC)

#define RX_EDP_RX_MSGAUX_URP_SW_01_EC_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_ec

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_ec  rs_rx_edp_rx_msgaux_urp_sw_01_ec;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_ec {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte236    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte237    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte238    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte239    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_ec(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_ec*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_F0                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xF0)

#define RX_EDP_RX_MSGAUX_URP_SW_01_F0_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_f0

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_f0  rs_rx_edp_rx_msgaux_urp_sw_01_f0;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_f0 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte240    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte241    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte242    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte243    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_f0(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_f0*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_F4                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xF4)

#define RX_EDP_RX_MSGAUX_URP_SW_01_F4_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_f4

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_f4  rs_rx_edp_rx_msgaux_urp_sw_01_f4;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_f4 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte244    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte245    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte246    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte247    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_f4(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_f4*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_F8                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xF8)

#define RX_EDP_RX_MSGAUX_URP_SW_01_F8_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_f8

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_f8  rs_rx_edp_rx_msgaux_urp_sw_01_f8;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_f8 {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte248    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte249    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte250    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte251    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_f8(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_f8*)&(val))



#define RX_EDP_RX_MSGAUX_URP_SW_01_FC                                    (HV_EDP_RX_MSGAUX_URP_SW_01_BASE_ADDRESS + 0xFC)

#define RX_EDP_RX_MSGAUX_URP_SW_01_FC_struct                             rs_rx_edp_rx_msgaux_urp_sw_01_fc

typedef struct _rs_rx_edp_rx_msgaux_urp_sw_01_fc  rs_rx_edp_rx_msgaux_urp_sw_01_fc;
struct _rs_rx_edp_rx_msgaux_urp_sw_01_fc {
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte252    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte253    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte254    : 8;
    unsigned int regr_01_dprx_dpcd_sw_msgaux_urp_byte255    : 8;
};
#define rx_edp_rx_msgaux_urp_sw_01_fc(val) ((rs_rx_edp_rx_msgaux_urp_sw_01_fc*)&(val))



#endif