#ifndef _HV_PAGE_HT7315_AON_REG_H_
#define _HV_PAGE_HT7315_AON_REG_H_

#ifndef HV_AON_REG_BASE_ADDRESS
    #define HV_AON_REG_BASE_ADDRESS                                         0x11008200
#endif


#define STANDBY_AON_REG_BG_TOP                                           (HV_AON_REG_BASE_ADDRESS + 0x00)

#define STANDBY_AON_REG_BG_TOP_struct                                    rs_standby_aon_reg_bg_top

typedef struct _rs_standby_aon_reg_bg_top  rs_standby_aon_reg_bg_top;
struct _rs_standby_aon_reg_bg_top {
    unsigned int reg_bg_pd_bias                             : 1;
    unsigned int reg_bg_bias_trim                           : 3;
    unsigned int reg_bg_vbg_test                            : 1;
    unsigned int reg_bg_eng                                 : 8;
    unsigned int reg_bg_rext_rint_sel                       : 1;
    unsigned int reg_bg_rint_adj                            : 4;
    unsigned int reg_bg_res_mesure                          : 4;
    unsigned int reg_bg_test_sel                            : 3;
    unsigned int regr_bg_comp_flag                          : 1;
    unsigned int reserved                                   : 6;
};
#define standby_aon_reg_bg_top(val) ((rs_standby_aon_reg_bg_top*)&(val))



#define STANDBY_AON_REG_OSC                                              (HV_AON_REG_BASE_ADDRESS + 0x04)

#define STANDBY_AON_REG_OSC_struct                                       rs_standby_aon_reg_osc

typedef struct _rs_standby_aon_reg_osc  rs_standby_aon_reg_osc;
struct _rs_standby_aon_reg_osc {
    unsigned int reg_osc_keep                               : 4;
    unsigned int reg_osc_adj_gain                           : 3;
    unsigned int reg_osc_pd                                 : 1;
    unsigned int reserved                                   :24;
};
#define standby_aon_reg_osc(val) ((rs_standby_aon_reg_osc*)&(val))



#define STANDBY_AON_REG_LDO                                              (HV_AON_REG_BASE_ADDRESS + 0x08)

#define STANDBY_AON_REG_LDO_struct                                       rs_standby_aon_reg_ldo

typedef struct _rs_standby_aon_reg_ldo  rs_standby_aon_reg_ldo;
struct _rs_standby_aon_reg_ldo {
    unsigned int reg_ldo_ref_adj                            : 3;
    unsigned int reg_ldo_ref_sel                            : 1;
    unsigned int reg_ldo_bias_adj                           : 3;
    unsigned int reg_ldo_eng                                : 5;
    unsigned int reg_ldo1p8_ref_adj                         : 3;
    unsigned int reg_ldo1p8_soft_start_enb                  : 1;
    unsigned int reg_ldo1p8_eng                             : 5;
    unsigned int regr_ldo1p8_rdy                            : 1;
    unsigned int reserved                                   :10;
};
#define standby_aon_reg_ldo(val) ((rs_standby_aon_reg_ldo*)&(val))



#define STANDBY_AON_REG_CLKGEN_AON                                       (HV_AON_REG_BASE_ADDRESS + 0x0C)

#define STANDBY_AON_REG_CLKGEN_AON_struct                                rs_standby_aon_reg_clkgen_aon

typedef struct _rs_standby_aon_reg_clkgen_aon  rs_standby_aon_reg_clkgen_aon;
struct _rs_standby_aon_reg_clkgen_aon {
    unsigned int reg_ana_scan_setting_en                    : 1;
    unsigned int reg_osc_div_clk_num                        : 3;
    unsigned int reg_src_clk_en                             : 1;
    unsigned int reg_sw_rst_n                               : 1;
    unsigned int reserved                                   :26;
};
#define standby_aon_reg_clkgen_aon(val) ((rs_standby_aon_reg_clkgen_aon*)&(val))



#define STANDBY_AON_REG_PMU_REG0                                         (HV_AON_REG_BASE_ADDRESS + 0x10)

#define STANDBY_AON_REG_PMU_REG0_struct                                  rs_standby_aon_reg_pmu_reg0

typedef struct _rs_standby_aon_reg_pmu_reg0  rs_standby_aon_reg_pmu_reg0;
struct _rs_standby_aon_reg_pmu_reg0 {
    unsigned int reg_pmu_pon_ini_cnt_val                    :16;
    unsigned int reg_pmu_pon_ini_cnt_div                    : 8;
    unsigned int reg_pmu_psw_cnt_val                        : 8;
};
#define standby_aon_reg_pmu_reg0(val) ((rs_standby_aon_reg_pmu_reg0*)&(val))



#define STANDBY_AON_REG_PMU_REG1                                         (HV_AON_REG_BASE_ADDRESS + 0x14)

#define STANDBY_AON_REG_PMU_REG1_struct                                  rs_standby_aon_reg_pmu_reg1

typedef struct _rs_standby_aon_reg_pmu_reg1  rs_standby_aon_reg_pmu_reg1;
struct _rs_standby_aon_reg_pmu_reg1 {
    unsigned int reg_pmu_iso_cnt_val                        : 8;
    unsigned int reg_pmu_rst_cnt_val                        : 8;
    unsigned int reg_pmu_mcu_off_req                        : 1;
    unsigned int reg_pmu_psw_stby_men                       : 1;
    unsigned int reg_pmu_psw_stby                           : 1;
    unsigned int reg_pmu_aon_iso_men                        : 1;
    unsigned int reg_pmu_aon_iso                            : 1;
    unsigned int reg_pmu_fsm_clr                            : 1;
    unsigned int reg_pmu_reg_en                             : 1;
    unsigned int reserved                                   : 9;
};
#define standby_aon_reg_pmu_reg1(val) ((rs_standby_aon_reg_pmu_reg1*)&(val))



#define STANDBY_AON_REG_PMU_REG2                                         (HV_AON_REG_BASE_ADDRESS + 0x18)

#define STANDBY_AON_REG_PMU_REG2_struct                                  rs_standby_aon_reg_pmu_reg2

typedef struct _rs_standby_aon_reg_pmu_reg2  rs_standby_aon_reg_pmu_reg2;
struct _rs_standby_aon_reg_pmu_reg2 {
    unsigned int reg_pmu_pk_filter_num                      :24;
    unsigned int reg_pmu_pk_pol                             : 1;
    unsigned int reserved                                   : 7;
};
#define standby_aon_reg_pmu_reg2(val) ((rs_standby_aon_reg_pmu_reg2*)&(val))



#define STANDBY_AON_REG_PMU_REG3                                         (HV_AON_REG_BASE_ADDRESS + 0x1C)

#define STANDBY_AON_REG_PMU_REG3_struct                                  rs_standby_aon_reg_pmu_reg3

typedef struct _rs_standby_aon_reg_pmu_reg3  rs_standby_aon_reg_pmu_reg3;
struct _rs_standby_aon_reg_pmu_reg3 {
    unsigned int reg_first_start_flag                       : 1;
    unsigned int reg_ver_sel                                : 1;
    unsigned int reg_pmu_pwr_off_state                      : 1;
    unsigned int reserved                                   :29;
};
#define standby_aon_reg_pmu_reg3(val) ((rs_standby_aon_reg_pmu_reg3*)&(val))



#define STANDBY_AON_REG_PMU_REG4                                         (HV_AON_REG_BASE_ADDRESS + 0x30)

#define STANDBY_AON_REG_PMU_REG4_struct                                  rs_standby_aon_reg_pmu_reg4

typedef struct _rs_standby_aon_reg_pmu_reg4  rs_standby_aon_reg_pmu_reg4;
struct _rs_standby_aon_reg_pmu_reg4 {
    unsigned int regr_pmu_current_state                     :32;
};
#define standby_aon_reg_pmu_reg4(val) ((rs_standby_aon_reg_pmu_reg4*)&(val))



#define STANDBY_AON_REG_PMU_REG5                                         (HV_AON_REG_BASE_ADDRESS + 0x34)

#define STANDBY_AON_REG_PMU_REG5_struct                                  rs_standby_aon_reg_pmu_reg5

typedef struct _rs_standby_aon_reg_pmu_reg5  rs_standby_aon_reg_pmu_reg5;
struct _rs_standby_aon_reg_pmu_reg5 {
    unsigned int regr_stb_pwr_on                            : 1;
    unsigned int regr_aon_iso                               : 1;
    unsigned int reserved                                   :30;
};
#define standby_aon_reg_pmu_reg5(val) ((rs_standby_aon_reg_pmu_reg5*)&(val))



#define STANDBY_AON_REG_AON_SH8_0                                        (HV_AON_REG_BASE_ADDRESS + 0x40)

#define STANDBY_AON_REG_AON_SH8_0_struct                                 rs_standby_aon_reg_aon_sh8_0

typedef struct _rs_standby_aon_reg_aon_sh8_0  rs_standby_aon_reg_aon_sh8_0;
struct _rs_standby_aon_reg_aon_sh8_0 {
    unsigned int reg_ate_sel                                : 2;
    unsigned int reserved                                   :30;
};
#define standby_aon_reg_aon_sh8_0(val) ((rs_standby_aon_reg_aon_sh8_0*)&(val))



#define STANDBY_AON_REG_AON_SH8_1                                        (HV_AON_REG_BASE_ADDRESS + 0x44)

#define STANDBY_AON_REG_AON_SH8_1_struct                                 rs_standby_aon_reg_aon_sh8_1

typedef struct _rs_standby_aon_reg_aon_sh8_1  rs_standby_aon_reg_aon_sh8_1;
struct _rs_standby_aon_reg_aon_sh8_1 {
    unsigned int reserved                                   : 8;
    unsigned int reg_keep                                   : 4;
    unsigned int reserved_1                                 :20;
};
#define standby_aon_reg_aon_sh8_1(val) ((rs_standby_aon_reg_aon_sh8_1*)&(val))



#define STANDBY_AON_REG_AON_PG_PAD_0                                     (HV_AON_REG_BASE_ADDRESS + 0x48)

#define STANDBY_AON_REG_AON_PG_PAD_0_struct                              rs_standby_aon_reg_aon_pg_pad_0

typedef struct _rs_standby_aon_reg_aon_pg_pad_0  rs_standby_aon_reg_aon_pg_pad_0;
struct _rs_standby_aon_reg_aon_pg_pad_0 {
    unsigned int reg_pw_aon                                 : 1;
    unsigned int reg_pw_stb                                 : 1;
    unsigned int reserved                                   :30;
};
#define standby_aon_reg_aon_pg_pad_0(val) ((rs_standby_aon_reg_aon_pg_pad_0*)&(val))



#define STANDBY_AON_REG_XRAM_PG_CTRL                                     (HV_AON_REG_BASE_ADDRESS + 0x4C)

#define STANDBY_AON_REG_XRAM_PG_CTRL_struct                              rs_standby_aon_reg_xram_pg_ctrl

typedef struct _rs_standby_aon_reg_xram_pg_ctrl  rs_standby_aon_reg_xram_pg_ctrl;
struct _rs_standby_aon_reg_xram_pg_ctrl {
    unsigned int reg_xram_mem_power_en                      : 1;
    unsigned int reg_aon_xram_mem_sleep_en                  : 1;
    unsigned int reserved                                   :30;
};
#define standby_aon_reg_xram_pg_ctrl(val) ((rs_standby_aon_reg_xram_pg_ctrl*)&(val))



#define STANDBY_AON_REG_AON_SH8_RO_0                                     (HV_AON_REG_BASE_ADDRESS + 0x50)

#define STANDBY_AON_REG_AON_SH8_RO_0_struct                              rs_standby_aon_reg_aon_sh8_ro_0

typedef struct _rs_standby_aon_reg_aon_sh8_ro_0  rs_standby_aon_reg_aon_sh8_ro_0;
struct _rs_standby_aon_reg_aon_sh8_ro_0 {
    unsigned int regr_pwr_ctrl_dis_di                       : 1;
    unsigned int regr_pwr_key_di                            : 1;
    unsigned int regr_pwr_state_di                          : 1;
    unsigned int regr_rstn_di                               : 1;
    unsigned int regr_pwr_on_di                             : 1;
    unsigned int regr_test_di                               : 1;
    unsigned int reserved                                   :26;
};
#define standby_aon_reg_aon_sh8_ro_0(val) ((rs_standby_aon_reg_aon_sh8_ro_0*)&(val))



#endif