#ifndef _HV_PAGE_HT7315_C420_422_00_H_
#define _HV_PAGE_HT7315_C420_422_00_H_

#ifndef HV_C420_422_00_BASE_ADDRESS
    #define HV_C420_422_00_BASE_ADDRESS                                         0x11020500
#endif


#define DISP_TOP_C420_422_00_00                                          (HV_C420_422_00_BASE_ADDRESS + 0x00)

#define DISP_TOP_C420_422_00_00_struct                                   rs_disp_top_c420_422_00_00

typedef struct _rs_disp_top_c420_422_00_00  rs_disp_top_c420_422_00_00;
struct _rs_disp_top_c420_422_00_00 {
    unsigned int reg_00_420_422_en                          : 1;
    unsigned int reg_00_420_422_coef                        : 2;
    unsigned int reg_00_en                                  : 1;
    unsigned int reg_00_en_no_latch                         : 1;
    unsigned int reg_00_test_pattern                        : 1;
    unsigned int reg_00_clk_en                              : 1;
    unsigned int reserved                                   :25;
};
#define disp_top_c420_422_00_00(val) ((rs_disp_top_c420_422_00_00*)&(val))



#define DISP_TOP_C420_422_00_04                                          (HV_C420_422_00_BASE_ADDRESS + 0x04)

#define DISP_TOP_C420_422_00_04_struct                                   rs_disp_top_c420_422_00_04

typedef struct _rs_disp_top_c420_422_00_04  rs_disp_top_c420_422_00_04;
struct _rs_disp_top_c420_422_00_04 {
    unsigned int reg_00_420_422_2coef_0                     : 8;
    unsigned int reg_00_420_422_2coef_1                     : 8;
    unsigned int reserved                                   :16;
};
#define disp_top_c420_422_00_04(val) ((rs_disp_top_c420_422_00_04*)&(val))



#define DISP_TOP_C420_422_00_08                                          (HV_C420_422_00_BASE_ADDRESS + 0x08)

#define DISP_TOP_C420_422_00_08_struct                                   rs_disp_top_c420_422_00_08

typedef struct _rs_disp_top_c420_422_00_08  rs_disp_top_c420_422_00_08;
struct _rs_disp_top_c420_422_00_08 {
    unsigned int reg_00_cbcr_pos_adj                        : 1;
    unsigned int reserved                                   :15;
    unsigned int reg_00_htotal                              :13;
    unsigned int reg_00_de_en                               : 3;
};
#define disp_top_c420_422_00_08(val) ((rs_disp_top_c420_422_00_08*)&(val))



#define DISP_TOP_C420_422_00_0C                                          (HV_C420_422_00_BASE_ADDRESS + 0x0C)

#define DISP_TOP_C420_422_00_0C_struct                                   rs_disp_top_c420_422_00_0c

typedef struct _rs_disp_top_c420_422_00_0c  rs_disp_top_c420_422_00_0c;
struct _rs_disp_top_c420_422_00_0c {
    unsigned int reg_00_hact                                :13;
    unsigned int reg_00_vact                                :13;
    unsigned int reserved                                   : 6;
};
#define disp_top_c420_422_00_0c(val) ((rs_disp_top_c420_422_00_0c*)&(val))



#define DISP_TOP_C420_422_00_10                                          (HV_C420_422_00_BASE_ADDRESS + 0x10)

#define DISP_TOP_C420_422_00_10_struct                                   rs_disp_top_c420_422_00_10

typedef struct _rs_disp_top_c420_422_00_10  rs_disp_top_c420_422_00_10;
struct _rs_disp_top_c420_422_00_10 {
    unsigned int regr_00_rd_input_hact_back                 :13;
    unsigned int regr_00_rd_input_vact_back                 :13;
    unsigned int reserved                                   : 6;
};
#define disp_top_c420_422_00_10(val) ((rs_disp_top_c420_422_00_10*)&(val))



#define DISP_TOP_C420_422_00_2C                                          (HV_C420_422_00_BASE_ADDRESS + 0x2C)

#define DISP_TOP_C420_422_00_2C_struct                                   rs_disp_top_c420_422_00_2c

typedef struct _rs_disp_top_c420_422_00_2c  rs_disp_top_c420_422_00_2c;
struct _rs_disp_top_c420_422_00_2c {
    unsigned int reg_00_mem_reg0                            : 8;
    unsigned int reg_00_mem_reg1                            : 8;
    unsigned int reg_00_mem_reg2                            : 8;
    unsigned int reg_00_mem_reg3                            : 8;
};
#define disp_top_c420_422_00_2c(val) ((rs_disp_top_c420_422_00_2c*)&(val))



#define DISP_TOP_C420_422_00_30                                          (HV_C420_422_00_BASE_ADDRESS + 0x30)

#define DISP_TOP_C420_422_00_30_struct                                   rs_disp_top_c420_422_00_30

typedef struct _rs_disp_top_c420_422_00_30  rs_disp_top_c420_422_00_30;
struct _rs_disp_top_c420_422_00_30 {
    unsigned int reg_00_mem_reg4                            : 8;
    unsigned int reg_00_mem_reg5                            : 8;
    unsigned int reg_00_mem_reg6                            : 8;
    unsigned int reg_00_mem_reg7                            : 8;
};
#define disp_top_c420_422_00_30(val) ((rs_disp_top_c420_422_00_30*)&(val))



#define DISP_TOP_C420_422_00_34                                          (HV_C420_422_00_BASE_ADDRESS + 0x34)

#define DISP_TOP_C420_422_00_34_struct                                   rs_disp_top_c420_422_00_34

typedef struct _rs_disp_top_c420_422_00_34  rs_disp_top_c420_422_00_34;
struct _rs_disp_top_c420_422_00_34 {
    unsigned int reg_00_mem_reg8                            : 8;
    unsigned int reserved                                   :24;
};
#define disp_top_c420_422_00_34(val) ((rs_disp_top_c420_422_00_34*)&(val))



#define DISP_TOP_C420_422_00_38                                          (HV_C420_422_00_BASE_ADDRESS + 0x38)

#define DISP_TOP_C420_422_00_38_struct                                   rs_disp_top_c420_422_00_38

typedef struct _rs_disp_top_c420_422_00_38  rs_disp_top_c420_422_00_38;
struct _rs_disp_top_c420_422_00_38 {
    unsigned int reg_00_mem_ema0                            :16;
    unsigned int reg_00_mem_ema1                            :16;
};
#define disp_top_c420_422_00_38(val) ((rs_disp_top_c420_422_00_38*)&(val))



#define DISP_TOP_C420_422_00_3C                                          (HV_C420_422_00_BASE_ADDRESS + 0x3C)

#define DISP_TOP_C420_422_00_3C_struct                                   rs_disp_top_c420_422_00_3c

typedef struct _rs_disp_top_c420_422_00_3c  rs_disp_top_c420_422_00_3c;
struct _rs_disp_top_c420_422_00_3c {
    unsigned int reg_00_mem_ema2                            :16;
    unsigned int reg_00_mem_ema3                            :16;
};
#define disp_top_c420_422_00_3c(val) ((rs_disp_top_c420_422_00_3c*)&(val))



#define DISP_TOP_C420_422_00_40                                          (HV_C420_422_00_BASE_ADDRESS + 0x40)

#define DISP_TOP_C420_422_00_40_struct                                   rs_disp_top_c420_422_00_40

typedef struct _rs_disp_top_c420_422_00_40  rs_disp_top_c420_422_00_40;
struct _rs_disp_top_c420_422_00_40 {
    unsigned int reg_00_mem_ema4                            :16;
    unsigned int reg_00_mem_ema5                            :16;
};
#define disp_top_c420_422_00_40(val) ((rs_disp_top_c420_422_00_40*)&(val))



#define DISP_TOP_C420_422_00_44                                          (HV_C420_422_00_BASE_ADDRESS + 0x44)

#define DISP_TOP_C420_422_00_44_struct                                   rs_disp_top_c420_422_00_44

typedef struct _rs_disp_top_c420_422_00_44  rs_disp_top_c420_422_00_44;
struct _rs_disp_top_c420_422_00_44 {
    unsigned int reg_00_mem_ema6                            :16;
    unsigned int reg_00_mem_ema7                            :16;
};
#define disp_top_c420_422_00_44(val) ((rs_disp_top_c420_422_00_44*)&(val))



#define DISP_TOP_C420_422_00_48                                          (HV_C420_422_00_BASE_ADDRESS + 0x48)

#define DISP_TOP_C420_422_00_48_struct                                   rs_disp_top_c420_422_00_48

typedef struct _rs_disp_top_c420_422_00_48  rs_disp_top_c420_422_00_48;
struct _rs_disp_top_c420_422_00_48 {
    unsigned int reg_00_mem_ema8                            :16;
    unsigned int regr_00_mem_ro_8                           : 4;
    unsigned int reserved                                   :12;
};
#define disp_top_c420_422_00_48(val) ((rs_disp_top_c420_422_00_48*)&(val))



#define DISP_TOP_C420_422_00_4C                                          (HV_C420_422_00_BASE_ADDRESS + 0x4C)

#define DISP_TOP_C420_422_00_4C_struct                                   rs_disp_top_c420_422_00_4c

typedef struct _rs_disp_top_c420_422_00_4c  rs_disp_top_c420_422_00_4c;
struct _rs_disp_top_c420_422_00_4c {
    unsigned int regr_00_mem_ro_0                           : 4;
    unsigned int regr_00_mem_ro_1                           : 4;
    unsigned int regr_00_mem_ro_2                           : 4;
    unsigned int regr_00_mem_ro_3                           : 4;
    unsigned int regr_00_mem_ro_4                           : 4;
    unsigned int regr_00_mem_ro_5                           : 4;
    unsigned int regr_00_mem_ro_6                           : 4;
    unsigned int regr_00_mem_ro_7                           : 4;
};
#define disp_top_c420_422_00_4c(val) ((rs_disp_top_c420_422_00_4c*)&(val))



#define DISP_TOP_C420_422_00_50                                          (HV_C420_422_00_BASE_ADDRESS + 0x50)

#define DISP_TOP_C420_422_00_50_struct                                   rs_disp_top_c420_422_00_50

typedef struct _rs_disp_top_c420_422_00_50  rs_disp_top_c420_422_00_50;
struct _rs_disp_top_c420_422_00_50 {
    unsigned int reg_00_cursor_en                           : 1;
    unsigned int reg_00_cursor_3d                           : 1;
    unsigned int reg_00_cursor_lr                           : 1;
    unsigned int reg_00_cursor_hwidth                       : 4;
    unsigned int reg_00_cursor_vwidth                       : 4;
    unsigned int reg_00_cursor_color                        : 3;
    unsigned int regr_00_cursor_data_c1                     :12;
    unsigned int reserved                                   : 6;
};
#define disp_top_c420_422_00_50(val) ((rs_disp_top_c420_422_00_50*)&(val))



#define DISP_TOP_C420_422_00_54                                          (HV_C420_422_00_BASE_ADDRESS + 0x54)

#define DISP_TOP_C420_422_00_54_struct                                   rs_disp_top_c420_422_00_54

typedef struct _rs_disp_top_c420_422_00_54  rs_disp_top_c420_422_00_54;
struct _rs_disp_top_c420_422_00_54 {
    unsigned int regr_00_cursor_data_c2                     :12;
    unsigned int regr_00_cursor_data_c3                     :12;
    unsigned int reserved                                   : 8;
};
#define disp_top_c420_422_00_54(val) ((rs_disp_top_c420_422_00_54*)&(val))



#define DISP_TOP_C420_422_00_58                                          (HV_C420_422_00_BASE_ADDRESS + 0x58)

#define DISP_TOP_C420_422_00_58_struct                                   rs_disp_top_c420_422_00_58

typedef struct _rs_disp_top_c420_422_00_58  rs_disp_top_c420_422_00_58;
struct _rs_disp_top_c420_422_00_58 {
    unsigned int reg_00_cursor_hcnt                         :16;
    unsigned int reg_00_cursor_vcnt                         :16;
};
#define disp_top_c420_422_00_58(val) ((rs_disp_top_c420_422_00_58*)&(val))



#endif