#ifndef _HV_PAGE_HT7315_KV_WIN_P0_00_H_
#define _HV_PAGE_HT7315_KV_WIN_P0_00_H_

#ifndef HV_KV_WIN_P0_00_BASE_ADDRESS
    #define HV_KV_WIN_P0_00_BASE_ADDRESS                                         0x11061000
#endif


#define OSD_KV_WIN_P0_00_00                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x00)

#define OSD_KV_WIN_P0_00_00_struct                                       rs_osd_kv_win_p0_00_00

typedef struct _rs_osd_kv_win_p0_00_00  rs_osd_kv_win_p0_00_00;
struct _rs_osd_kv_win_p0_00_00 {
    unsigned int font_h_addr_reg_00                         : 7;
    unsigned int reserved                                   : 1;
    unsigned int font_v_addr_reg_00                         :11;
    unsigned int reserved_1                                 : 1;
    unsigned int font_12_16_reg_00                          :12;
};
#define osd_kv_win_p0_00_00(val) ((rs_osd_kv_win_p0_00_00*)&(val))



#define OSD_KV_WIN_P0_00_04                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x04)

#define OSD_KV_WIN_P0_00_04_struct                                       rs_osd_kv_win_p0_00_04

typedef struct _rs_osd_kv_win_p0_00_04  rs_osd_kv_win_p0_00_04;
struct _rs_osd_kv_win_p0_00_04 {
    unsigned int font_20_32_reg_00                          : 9;
    unsigned int reserved                                   : 1;
    unsigned int font_24_32_reg_00                          : 6;
    unsigned int reserved_1                                 :16;
};
#define osd_kv_win_p0_00_04(val) ((rs_osd_kv_win_p0_00_04*)&(val))



#define OSD_KV_WIN_P0_00_08                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x08)

#define OSD_KV_WIN_P0_00_08_struct                                       rs_osd_kv_win_p0_00_08

typedef struct _rs_osd_kv_win_p0_00_08  rs_osd_kv_win_p0_00_08;
struct _rs_osd_kv_win_p0_00_08 {
    unsigned int reg_00_vrm_ofs                             :11;
    unsigned int reserved                                   : 5;
    unsigned int reg_00_vrm_lg                              :11;
    unsigned int reserved_1                                 : 5;
};
#define osd_kv_win_p0_00_08(val) ((rs_osd_kv_win_p0_00_08*)&(val))



#define OSD_KV_WIN_P0_00_0C                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x0C)

#define OSD_KV_WIN_P0_00_0C_struct                                       rs_osd_kv_win_p0_00_0c

typedef struct _rs_osd_kv_win_p0_00_0c  rs_osd_kv_win_p0_00_0c;
struct _rs_osd_kv_win_p0_00_0c {
    unsigned int reg_00_font_stax                           :14;
    unsigned int reserved                                   : 2;
    unsigned int reg_00_font_stay                           :13;
    unsigned int reserved_1                                 : 1;
    unsigned int reg_00_vs_edg_sel                          : 1;
    unsigned int reg_00_hs_edg_sel                          : 1;
};
#define osd_kv_win_p0_00_0c(val) ((rs_osd_kv_win_p0_00_0c*)&(val))



#define OSD_KV_WIN_P0_00_10                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x10)

#define OSD_KV_WIN_P0_00_10_struct                                       rs_osd_kv_win_p0_00_10

typedef struct _rs_osd_kv_win_p0_00_10  rs_osd_kv_win_p0_00_10;
struct _rs_osd_kv_win_p0_00_10 {
    unsigned int reg_00_trans_mode                          : 2;
    unsigned int reg_00_delay_en                            : 1;
    unsigned int reg_00_sw_hs_sel                           : 1;
    unsigned int reg_00_sw_vs_sel                           : 1;
    unsigned int reg_00_win_clr                             : 1;
    unsigned int reg_00_vrm_clr                             : 1;
    unsigned int reg_00_osd_en                              : 1;
    unsigned int reg_00_ram_delay_num                       : 3;
    unsigned int cpu_reg_00_en                              : 1;
    unsigned int reg_00_ram_dly_ctrl                        : 1;
    unsigned int reserved                                   : 3;
    unsigned int reg_00_font_h_size                         : 8;
    unsigned int reg_00_font_v_size                         : 6;
    unsigned int reserved_1                                 : 2;
};
#define osd_kv_win_p0_00_10(val) ((rs_osd_kv_win_p0_00_10*)&(val))



#define OSD_KV_WIN_P0_00_14                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x14)

#define OSD_KV_WIN_P0_00_14_struct                                       rs_osd_kv_win_p0_00_14

typedef struct _rs_osd_kv_win_p0_00_14  rs_osd_kv_win_p0_00_14;
struct _rs_osd_kv_win_p0_00_14 {
    unsigned int reserved                                   :16;
    unsigned int reg_00_blnk_duty                           : 2;
    unsigned int reg_00_blnk_rate                           : 5;
    unsigned int reserved_1                                 : 1;
    unsigned int reg_00_fsc_cidx                            : 7;
    unsigned int reg_00_fsc_en                              : 1;
};
#define osd_kv_win_p0_00_14(val) ((rs_osd_kv_win_p0_00_14*)&(val))



#define OSD_KV_WIN_P0_00_18                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x18)

#define OSD_KV_WIN_P0_00_18_struct                                       rs_osd_kv_win_p0_00_18

typedef struct _rs_osd_kv_win_p0_00_18  rs_osd_kv_win_p0_00_18;
struct _rs_osd_kv_win_p0_00_18 {
    unsigned int reg_00_fsc_alpha                           : 8;
    unsigned int reserved                                   :11;
    unsigned int reg_00_sw_vref_sel                         : 1;
    unsigned int reserved_1                                 :12;
};
#define osd_kv_win_p0_00_18(val) ((rs_osd_kv_win_p0_00_18*)&(val))



#define OSD_KV_WIN_P0_00_1C                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x1C)

#define OSD_KV_WIN_P0_00_1C_struct                                       rs_osd_kv_win_p0_00_1c

typedef struct _rs_osd_kv_win_p0_00_1c  rs_osd_kv_win_p0_00_1c;
struct _rs_osd_kv_win_p0_00_1c {
    unsigned int reg_00_cpu_trans_xst                       :10;
    unsigned int reserved                                   : 6;
    unsigned int reg_00_cpup_trans_yst                      : 9;
    unsigned int reserved_1                                 : 7;
};
#define osd_kv_win_p0_00_1c(val) ((rs_osd_kv_win_p0_00_1c*)&(val))



#define OSD_KV_WIN_P0_00_20                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x20)

#define OSD_KV_WIN_P0_00_20_struct                                       rs_osd_kv_win_p0_00_20

typedef struct _rs_osd_kv_win_p0_00_20  rs_osd_kv_win_p0_00_20;
struct _rs_osd_kv_win_p0_00_20 {
    unsigned int reg_00_cpu_trans_frame                     : 5;
    unsigned int reg_00_font_en                             : 1;
    unsigned int reg_00_cidx_bit                            : 2;
    unsigned int reg_00_bg_alpha                            : 8;
    unsigned int reserved                                   :16;
};
#define osd_kv_win_p0_00_20(val) ((rs_osd_kv_win_p0_00_20*)&(val))



#define OSD_KV_WIN_P0_00_24                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x24)

#define OSD_KV_WIN_P0_00_24_struct                                       rs_osd_kv_win_p0_00_24

typedef struct _rs_osd_kv_win_p0_00_24  rs_osd_kv_win_p0_00_24;
struct _rs_osd_kv_win_p0_00_24 {
    unsigned int reg_00_cpu_trans_xcen                      :10;
    unsigned int reg_00_cpu_trans_ycen                      : 9;
    unsigned int reg_00_cpu_trans_speed                     : 8;
    unsigned int reserved                                   : 2;
    unsigned int reg_00_cpu_trans_di                        : 3;
};
#define osd_kv_win_p0_00_24(val) ((rs_osd_kv_win_p0_00_24*)&(val))



#define OSD_KV_WIN_P0_00_28                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x28)

#define OSD_KV_WIN_P0_00_28_struct                                       rs_osd_kv_win_p0_00_28

typedef struct _rs_osd_kv_win_p0_00_28  rs_osd_kv_win_p0_00_28;
struct _rs_osd_kv_win_p0_00_28 {
    unsigned int reg_00_win_prisel                          : 8;
    unsigned int reg_00_win_nodisp                          : 1;
    unsigned int reserved                                   : 7;
    unsigned int reg_00_osd_nodisp                          : 9;
    unsigned int reserved_1                                 : 7;
};
#define osd_kv_win_p0_00_28(val) ((rs_osd_kv_win_p0_00_28*)&(val))



#define OSD_KV_WIN_P0_00_2C                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x2C)

#define OSD_KV_WIN_P0_00_2C_struct                                       rs_osd_kv_win_p0_00_2c

typedef struct _rs_osd_kv_win_p0_00_2c  rs_osd_kv_win_p0_00_2c;
struct _rs_osd_kv_win_p0_00_2c {
    unsigned int reg_00_x_all_delay                         :14;
    unsigned int reg_00_x_delay_sel                         : 1;
    unsigned int reserved                                   : 1;
    unsigned int reg_00_y_all_delay                         :13;
    unsigned int reserved_1                                 : 3;
};
#define osd_kv_win_p0_00_2c(val) ((rs_osd_kv_win_p0_00_2c*)&(val))



#define OSD_KV_WIN_P0_00_30                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0x30)

#define OSD_KV_WIN_P0_00_30_struct                                       rs_osd_kv_win_p0_00_30

typedef struct _rs_osd_kv_win_p0_00_30  rs_osd_kv_win_p0_00_30;
struct _rs_osd_kv_win_p0_00_30 {
    unsigned int reg_00_font_y_dly                          :13;
    unsigned int reg_00_font_y_dly_sel                      : 1;
    unsigned int reserved                                   : 2;
    unsigned int reg_00_font_x_dly                          :14;
    unsigned int reg_00_font_x_dly_sel                      : 1;
    unsigned int reserved_1                                 : 1;
};
#define osd_kv_win_p0_00_30(val) ((rs_osd_kv_win_p0_00_30*)&(val))



#define OSD_KV_WIN_P0_00_A8                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xA8)

#define OSD_KV_WIN_P0_00_A8_struct                                       rs_osd_kv_win_p0_00_a8

typedef struct _rs_osd_kv_win_p0_00_a8  rs_osd_kv_win_p0_00_a8;
struct _rs_osd_kv_win_p0_00_a8 {
    unsigned int reg_00_font_type_0_baseaddr                :12;
    unsigned int reg_00_font_type_0_select                  : 4;
    unsigned int reg_00_font_type_1_baseaddr                :12;
    unsigned int reg_00_font_type_1_select                  : 4;
};
#define osd_kv_win_p0_00_a8(val) ((rs_osd_kv_win_p0_00_a8*)&(val))



#define OSD_KV_WIN_P0_00_AC                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xAC)

#define OSD_KV_WIN_P0_00_AC_struct                                       rs_osd_kv_win_p0_00_ac

typedef struct _rs_osd_kv_win_p0_00_ac  rs_osd_kv_win_p0_00_ac;
struct _rs_osd_kv_win_p0_00_ac {
    unsigned int reg_00_font_type_2_baseaddr                :12;
    unsigned int reg_00_font_type_2_select                  : 4;
    unsigned int reg_00_font_type_3_baseaddr                :12;
    unsigned int reg_00_font_type_3_select                  : 4;
};
#define osd_kv_win_p0_00_ac(val) ((rs_osd_kv_win_p0_00_ac*)&(val))



#define OSD_KV_WIN_P0_00_B0                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xB0)

#define OSD_KV_WIN_P0_00_B0_struct                                       rs_osd_kv_win_p0_00_b0

typedef struct _rs_osd_kv_win_p0_00_b0  rs_osd_kv_win_p0_00_b0;
struct _rs_osd_kv_win_p0_00_b0 {
    unsigned int reg_00_font_type_4_baseaddr                :12;
    unsigned int reg_00_font_type_4_select                  : 4;
    unsigned int reg_00_font_type_5_baseaddr                :12;
    unsigned int reg_00_font_type_5_select                  : 4;
};
#define osd_kv_win_p0_00_b0(val) ((rs_osd_kv_win_p0_00_b0*)&(val))



#define OSD_KV_WIN_P0_00_B4                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xB4)

#define OSD_KV_WIN_P0_00_B4_struct                                       rs_osd_kv_win_p0_00_b4

typedef struct _rs_osd_kv_win_p0_00_b4  rs_osd_kv_win_p0_00_b4;
struct _rs_osd_kv_win_p0_00_b4 {
    unsigned int reg_00_font_type_6_baseaddr                :12;
    unsigned int reg_00_font_type_6_select                  : 4;
    unsigned int reg_00_font_type_7_baseaddr                :12;
    unsigned int reg_00_font_type_7_select                  : 4;
};
#define osd_kv_win_p0_00_b4(val) ((rs_osd_kv_win_p0_00_b4*)&(val))



#define OSD_KV_WIN_P0_00_B8                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xB8)

#define OSD_KV_WIN_P0_00_B8_struct                                       rs_osd_kv_win_p0_00_b8

typedef struct _rs_osd_kv_win_p0_00_b8  rs_osd_kv_win_p0_00_b8;
struct _rs_osd_kv_win_p0_00_b8 {
    unsigned int reg_00_font_bmp_same_line                  : 1;
    unsigned int reg_00_font_rd_sel                         : 1;
    unsigned int reg_00_font_rd_sw_en                       : 1;
    unsigned int reg_00_font_rd_sw                          : 1;
    unsigned int reserved                                   :28;
};
#define osd_kv_win_p0_00_b8(val) ((rs_osd_kv_win_p0_00_b8*)&(val))



#define OSD_KV_WIN_P0_00_BC                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xBC)

#define OSD_KV_WIN_P0_00_BC_struct                                       rs_osd_kv_win_p0_00_bc

typedef struct _rs_osd_kv_win_p0_00_bc  rs_osd_kv_win_p0_00_bc;
struct _rs_osd_kv_win_p0_00_bc {
    unsigned int reg_00_font_rd_dly                         :32;
};
#define osd_kv_win_p0_00_bc(val) ((rs_osd_kv_win_p0_00_bc*)&(val))



#define OSD_KV_WIN_P0_00_C0                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xC0)

#define OSD_KV_WIN_P0_00_C0_struct                                       rs_osd_kv_win_p0_00_c0

typedef struct _rs_osd_kv_win_p0_00_c0  rs_osd_kv_win_p0_00_c0;
struct _rs_osd_kv_win_p0_00_c0 {
    unsigned int regr_00_sfifo_row_col_depth                : 5;
    unsigned int reserved                                   : 3;
    unsigned int regr_00_sfifo_pat_depth                    : 7;
    unsigned int reserved_1                                 : 1;
    unsigned int regr_00_font_rd_cnt                        :16;
};
#define osd_kv_win_p0_00_c0(val) ((rs_osd_kv_win_p0_00_c0*)&(val))



#define OSD_KV_WIN_P0_00_C4                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xC4)

#define OSD_KV_WIN_P0_00_C4_struct                                       rs_osd_kv_win_p0_00_c4

typedef struct _rs_osd_kv_win_p0_00_c4  rs_osd_kv_win_p0_00_c4;
struct _rs_osd_kv_win_p0_00_c4 {
    unsigned int regr_00_idx_data1                          :32;
};
#define osd_kv_win_p0_00_c4(val) ((rs_osd_kv_win_p0_00_c4*)&(val))



#define OSD_KV_WIN_P0_00_C8                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xC8)

#define OSD_KV_WIN_P0_00_C8_struct                                       rs_osd_kv_win_p0_00_c8

typedef struct _rs_osd_kv_win_p0_00_c8  rs_osd_kv_win_p0_00_c8;
struct _rs_osd_kv_win_p0_00_c8 {
    unsigned int regr_00_idx_data2                          :32;
};
#define osd_kv_win_p0_00_c8(val) ((rs_osd_kv_win_p0_00_c8*)&(val))



#define OSD_KV_WIN_P0_00_CC                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xCC)

#define OSD_KV_WIN_P0_00_CC_struct                                       rs_osd_kv_win_p0_00_cc

typedef struct _rs_osd_kv_win_p0_00_cc  rs_osd_kv_win_p0_00_cc;
struct _rs_osd_kv_win_p0_00_cc {
    unsigned int regr_00_idx_data3                          :32;
};
#define osd_kv_win_p0_00_cc(val) ((rs_osd_kv_win_p0_00_cc*)&(val))



#define OSD_KV_WIN_P0_00_D0                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xD0)

#define OSD_KV_WIN_P0_00_D0_struct                                       rs_osd_kv_win_p0_00_d0

typedef struct _rs_osd_kv_win_p0_00_d0  rs_osd_kv_win_p0_00_d0;
struct _rs_osd_kv_win_p0_00_d0 {
    unsigned int regr_00_idx_data4                          :32;
};
#define osd_kv_win_p0_00_d0(val) ((rs_osd_kv_win_p0_00_d0*)&(val))



#define OSD_KV_WIN_P0_00_D4                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xD4)

#define OSD_KV_WIN_P0_00_D4_struct                                       rs_osd_kv_win_p0_00_d4

typedef struct _rs_osd_kv_win_p0_00_d4  rs_osd_kv_win_p0_00_d4;
struct _rs_osd_kv_win_p0_00_d4 {
    unsigned int regr_00_pat_data1                          :32;
};
#define osd_kv_win_p0_00_d4(val) ((rs_osd_kv_win_p0_00_d4*)&(val))



#define OSD_KV_WIN_P0_00_D8                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xD8)

#define OSD_KV_WIN_P0_00_D8_struct                                       rs_osd_kv_win_p0_00_d8

typedef struct _rs_osd_kv_win_p0_00_d8  rs_osd_kv_win_p0_00_d8;
struct _rs_osd_kv_win_p0_00_d8 {
    unsigned int regr_00_pat_data2                          :32;
};
#define osd_kv_win_p0_00_d8(val) ((rs_osd_kv_win_p0_00_d8*)&(val))



#define OSD_KV_WIN_P0_00_DC                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xDC)

#define OSD_KV_WIN_P0_00_DC_struct                                       rs_osd_kv_win_p0_00_dc

typedef struct _rs_osd_kv_win_p0_00_dc  rs_osd_kv_win_p0_00_dc;
struct _rs_osd_kv_win_p0_00_dc {
    unsigned int regr_00_pat_data3                          :32;
};
#define osd_kv_win_p0_00_dc(val) ((rs_osd_kv_win_p0_00_dc*)&(val))



#define OSD_KV_WIN_P0_00_E0                                              (HV_KV_WIN_P0_00_BASE_ADDRESS + 0xE0)

#define OSD_KV_WIN_P0_00_E0_struct                                       rs_osd_kv_win_p0_00_e0

typedef struct _rs_osd_kv_win_p0_00_e0  rs_osd_kv_win_p0_00_e0;
struct _rs_osd_kv_win_p0_00_e0 {
    unsigned int regr_00_pat_data4                          :32;
};
#define osd_kv_win_p0_00_e0(val) ((rs_osd_kv_win_p0_00_e0*)&(val))



#endif