#ifndef _HV_PAGE_HT7315_AUDIO_TOP2_H_
#define _HV_PAGE_HT7315_AUDIO_TOP2_H_

#ifndef HV_AUDIO_TOP2_BASE_ADDRESS
    #define HV_AUDIO_TOP2_BASE_ADDRESS                                         0x11045200
#endif


#define RX_AUDIO_TOP2_AUDIO_PLL_1                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x00)

#define RX_AUDIO_TOP2_AUDIO_PLL_1_struct                                 rs_rx_audio_top2_audio_pll_1

typedef struct _rs_rx_audio_top2_audio_pll_1  rs_rx_audio_top2_audio_pll_1;
struct _rs_rx_audio_top2_audio_pll_1 {
    unsigned int reg_audio_pll_0_en                         : 1;
    unsigned int reg_audio_pll_0_stb_en                     : 1;
    unsigned int reg_audio_pll_0_rstn                       : 1;
    unsigned int reg_audio_pll_0_div_mode                   : 1;
    unsigned int reg_audio_pll_0_ib5u_sel                   : 1;
    unsigned int reg_audio_pll_0_test_mode                  : 1;
    unsigned int reg_audio_pll_0_free_run                   : 1;
    unsigned int reg_audio_pll_0_overflow_rst_en            : 1;
    unsigned int reg_audio_pll_0_lock_force                 : 1;
    unsigned int reg_audio_pll_0_lock_cnt_sel               : 1;
    unsigned int reg_audio_pll_0_lock_wd_sel                : 2;
    unsigned int reg_audio_pll_0_ana_test_sel               : 4;
    unsigned int reg_audio_pll_0_dummy                      : 8;
    unsigned int reg_audio_pll_0_rnd_mode                   : 1;
    unsigned int reg_audio_pll_0_dac_en                     : 1;
    unsigned int reserved                                   : 6;
};
#define rx_audio_top2_audio_pll_1(val) ((rs_rx_audio_top2_audio_pll_1*)&(val))



#define RX_AUDIO_TOP2_AUDIO_PLL_2                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x04)

#define RX_AUDIO_TOP2_AUDIO_PLL_2_struct                                 rs_rx_audio_top2_audio_pll_2

typedef struct _rs_rx_audio_top2_audio_pll_2  rs_rx_audio_top2_audio_pll_2;
struct _rs_rx_audio_top2_audio_pll_2 {
    unsigned int reg_audio_pll_0_dly_ctrl                   : 3;
    unsigned int reg_audio_pll_0_icp_bias_tune              : 3;
    unsigned int reg_audio_pll_0_icp_ctrl1                  : 4;
    unsigned int reg_audio_pll_0_icp_ctrl2                  : 3;
    unsigned int reg_audio_pll_0_lpf_ctrl                   : 4;
    unsigned int reg_audio_pll_0_kvco_ctrl                  : 6;
    unsigned int reg_audio_pll_0_ckref_sel                  : 2;
    unsigned int reg_audio_pll_0_prediv                     : 6;
    unsigned int reserved                                   : 1;
};
#define rx_audio_top2_audio_pll_2(val) ((rs_rx_audio_top2_audio_pll_2*)&(val))



#define RX_AUDIO_TOP2_AUDIO_PLL_3                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x08)

#define RX_AUDIO_TOP2_AUDIO_PLL_3_struct                                 rs_rx_audio_top2_audio_pll_3

typedef struct _rs_rx_audio_top2_audio_pll_3  rs_rx_audio_top2_audio_pll_3;
struct _rs_rx_audio_top2_audio_pll_3 {
    unsigned int reg_audio_pll_0_postdiv0                   :10;
    unsigned int reg_audio_pll_0_postdiv1                   :10;
    unsigned int reg_audio_pll_0_postdiv2                   :10;
    unsigned int reserved                                   : 2;
};
#define rx_audio_top2_audio_pll_3(val) ((rs_rx_audio_top2_audio_pll_3*)&(val))



#define RX_AUDIO_TOP2_AUDIO_PLL_4                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x0C)

#define RX_AUDIO_TOP2_AUDIO_PLL_4_struct                                 rs_rx_audio_top2_audio_pll_4

typedef struct _rs_rx_audio_top2_audio_pll_4  rs_rx_audio_top2_audio_pll_4;
struct _rs_rx_audio_top2_audio_pll_4 {
    unsigned int reg_audio_pll_0_postdiv0_div2              : 1;
    unsigned int reg_audio_pll_0_postdiv0_0                 : 6;
    unsigned int reg_audio_pll_0_postdiv0_1                 : 6;
    unsigned int reg_audio_pll_0_postdiv_lvds               : 2;
    unsigned int reg_audio_pll_0_cklvds_al_skew             : 4;
    unsigned int reg_audio_pll_0_cklvds_ar_skew             : 4;
    unsigned int reg_audio_pll_0_cklvds_en                  : 1;
    unsigned int reg_audio_pll_0_cklvds_lr_sel              : 2;
    unsigned int reserved                                   : 6;
};
#define rx_audio_top2_audio_pll_4(val) ((rs_rx_audio_top2_audio_pll_4*)&(val))



#define RX_AUDIO_TOP2_10                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x10)

#define RX_AUDIO_TOP2_10_struct                                          rs_rx_audio_top2_10

typedef struct _rs_rx_audio_top2_10  rs_rx_audio_top2_10;
struct _rs_rx_audio_top2_10 {
    unsigned int reg_audio_pll_0_fbdiv_int                  :10;
    unsigned int reserved                                   : 6;
    unsigned int reg_audio_pll_0_fbdiv_frac                 :16;
};
#define rx_audio_top2_10(val) ((rs_rx_audio_top2_10*)&(val))



#define RX_AUDIO_TOP2_AUDIO_PLL_6                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x14)

#define RX_AUDIO_TOP2_AUDIO_PLL_6_struct                                 rs_rx_audio_top2_audio_pll_6

typedef struct _rs_rx_audio_top2_audio_pll_6  rs_rx_audio_top2_audio_pll_6;
struct _rs_rx_audio_top2_audio_pll_6 {
    unsigned int regr_audio_pll_0_dout_test                 :10;
    unsigned int regr_audio_pll_0_lock_cnt_en               : 1;
    unsigned int regr_audio_pll_0_lock_flag                 : 1;
    unsigned int regr_audio_pll_0_dout_overflow_flag        : 1;
    unsigned int regr_audio_pll_0_dout_phase_error_flag     : 1;
    unsigned int reserved                                   :18;
};
#define rx_audio_top2_audio_pll_6(val) ((rs_rx_audio_top2_audio_pll_6*)&(val))



#define RX_AUDIO_TOP2_AUDIO_CLK_SEL                                      (HV_AUDIO_TOP2_BASE_ADDRESS + 0x18)

#define RX_AUDIO_TOP2_AUDIO_CLK_SEL_struct                               rs_rx_audio_top2_audio_clk_sel

typedef struct _rs_rx_audio_top2_audio_clk_sel  rs_rx_audio_top2_audio_clk_sel;
struct _rs_rx_audio_top2_audio_clk_sel {
    unsigned int reserved                                   : 4;
    unsigned int reg_audio_clk_hw_en                        : 1;
    unsigned int reg_audio_clk_dp_en                        : 1;
    unsigned int reg_audio_clk_to_dp_sel                    : 2;
    unsigned int reg_audio_rx_clk_sel                       : 6;
    unsigned int reg_audio_dm_post_clk_sel                  : 2;
    unsigned int reg_audio_tx_clk_sel                       : 6;
    unsigned int reg_earc_640fs_clk_sel                     : 2;
    unsigned int reg_earc_128fs_clk_sel                     : 2;
    unsigned int reserved_1                                 : 6;
};
#define rx_audio_top2_audio_clk_sel(val) ((rs_rx_audio_top2_audio_clk_sel*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_0                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x1C)

#define RX_AUDIO_TOP2_AUDIO_DM_0_struct                                  rs_rx_audio_top2_audio_dm_0

typedef struct _rs_rx_audio_top2_audio_dm_0  rs_rx_audio_top2_audio_dm_0;
struct _rs_rx_audio_top2_audio_dm_0 {
    unsigned int reg_audio_dm_pre_clk_sel                   : 2;
    unsigned int reg_audio_hw_clk_sel                       : 2;
    unsigned int reg_audio_dm_r_ch_num                      : 4;
    unsigned int reg_audio_dm_r_en                          : 1;
    unsigned int reg_audio_dm_r_hbr_mode                    : 1;
    unsigned int reg_audio_dm_w_en                          : 1;
    unsigned int reg_audio_dm_w_hbr_mode                    : 1;
    unsigned int reg_audio_dm_pcm_sel                       : 2;
    unsigned int reg_audio_dm_pcm_sel0                      : 3;
    unsigned int reg_audio_dm_pcm_sel1                      : 3;
    unsigned int reg_audio_dm_pcm_sel2                      : 3;
    unsigned int reg_audio_dm_pcm_sel3                      : 3;
    unsigned int reg_audio_dm_pcm_sel4                      : 3;
    unsigned int reg_audio_dm_pcm_sel5                      : 3;
};
#define rx_audio_top2_audio_dm_0(val) ((rs_rx_audio_top2_audio_dm_0*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_1                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x20)

#define RX_AUDIO_TOP2_AUDIO_DM_1_struct                                  rs_rx_audio_top2_audio_dm_1

typedef struct _rs_rx_audio_top2_audio_dm_1  rs_rx_audio_top2_audio_dm_1;
struct _rs_rx_audio_top2_audio_dm_1 {
    unsigned int reg_audio_dm_pcm_sel6                      : 3;
    unsigned int reg_audio_dm_pcm_sel7                      : 3;
    unsigned int reg_audio_dm_w_ch_num                      : 4;
    unsigned int reg_dm_rd_4k_bound_en                      : 1;
    unsigned int reg_dm_rd_access_mode                      : 1;
    unsigned int reg_dm_rd_col_step_dir                     : 1;
    unsigned int reg_dm_rd_db_en                            : 1;
    unsigned int reg_dm_rd_enable                           : 1;
    unsigned int reg_dm_rd_line_step_dir                    : 1;
    unsigned int reg_dm_rd_buf_size                         : 6;
    unsigned int reg_dm_rd_clr                              : 1;
    unsigned int reserved                                   : 1;
    unsigned int reg_dm_rd_burst_len                        : 8;
};
#define rx_audio_top2_audio_dm_1(val) ((rs_rx_audio_top2_audio_dm_1*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_2                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x24)

#define RX_AUDIO_TOP2_AUDIO_DM_2_struct                                  rs_rx_audio_top2_audio_dm_2

typedef struct _rs_rx_audio_top2_audio_dm_2  rs_rx_audio_top2_audio_dm_2;
struct _rs_rx_audio_top2_audio_dm_2 {
    unsigned int reg_dm_rd_burst_num                        :32;
};
#define rx_audio_top2_audio_dm_2(val) ((rs_rx_audio_top2_audio_dm_2*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_3                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x28)

#define RX_AUDIO_TOP2_AUDIO_DM_3_struct                                  rs_rx_audio_top2_audio_dm_3

typedef struct _rs_rx_audio_top2_audio_dm_3  rs_rx_audio_top2_audio_dm_3;
struct _rs_rx_audio_top2_audio_dm_3 {
    unsigned int reg_dm_rd_burst_rmd                        : 8;
    unsigned int reg_dm_rd_outstanding                      : 4;
    unsigned int reg_dm_rd_head_prefetch_num                : 2;
    unsigned int reg_dm_rd_udflow_clr                       : 1;
    unsigned int reg_dm_rd_ovflow_clr                       : 1;
    unsigned int reg_dm_rd_col_dat_num                      :16;
};
#define rx_audio_top2_audio_dm_3(val) ((rs_rx_audio_top2_audio_dm_3*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_4                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x2C)

#define RX_AUDIO_TOP2_AUDIO_DM_4_struct                                  rs_rx_audio_top2_audio_dm_4

typedef struct _rs_rx_audio_top2_audio_dm_4  rs_rx_audio_top2_audio_dm_4;
struct _rs_rx_audio_top2_audio_dm_4 {
    unsigned int reg_dm_rd_col_step                         :32;
};
#define rx_audio_top2_audio_dm_4(val) ((rs_rx_audio_top2_audio_dm_4*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_5                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x30)

#define RX_AUDIO_TOP2_AUDIO_DM_5_struct                                  rs_rx_audio_top2_audio_dm_5

typedef struct _rs_rx_audio_top2_audio_dm_5  rs_rx_audio_top2_audio_dm_5;
struct _rs_rx_audio_top2_audio_dm_5 {
    unsigned int reg_dm_rd_line_step                        :32;
};
#define rx_audio_top2_audio_dm_5(val) ((rs_rx_audio_top2_audio_dm_5*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_6                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x34)

#define RX_AUDIO_TOP2_AUDIO_DM_6_struct                                  rs_rx_audio_top2_audio_dm_6

typedef struct _rs_rx_audio_top2_audio_dm_6  rs_rx_audio_top2_audio_dm_6;
struct _rs_rx_audio_top2_audio_dm_6 {
    unsigned int reg_dm_rd_rdata_index                      :32;
};
#define rx_audio_top2_audio_dm_6(val) ((rs_rx_audio_top2_audio_dm_6*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_7                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x38)

#define RX_AUDIO_TOP2_AUDIO_DM_7_struct                                  rs_rx_audio_top2_audio_dm_7

typedef struct _rs_rx_audio_top2_audio_dm_7  rs_rx_audio_top2_audio_dm_7;
struct _rs_rx_audio_top2_audio_dm_7 {
    unsigned int reg_dm_rd_start_adr                        :32;
};
#define rx_audio_top2_audio_dm_7(val) ((rs_rx_audio_top2_audio_dm_7*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_8                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x3C)

#define RX_AUDIO_TOP2_AUDIO_DM_8_struct                                  rs_rx_audio_top2_audio_dm_8

typedef struct _rs_rx_audio_top2_audio_dm_8  rs_rx_audio_top2_audio_dm_8;
struct _rs_rx_audio_top2_audio_dm_8 {
    unsigned int reg_dm_rd_total_col_num                    :16;
    unsigned int reg_dm_rd_total_line_num                   :16;
};
#define rx_audio_top2_audio_dm_8(val) ((rs_rx_audio_top2_audio_dm_8*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_9                                         (HV_AUDIO_TOP2_BASE_ADDRESS + 0x40)

#define RX_AUDIO_TOP2_AUDIO_DM_9_struct                                  rs_rx_audio_top2_audio_dm_9

typedef struct _rs_rx_audio_top2_audio_dm_9  rs_rx_audio_top2_audio_dm_9;
struct _rs_rx_audio_top2_audio_dm_9 {
    unsigned int reg_dm_wr_4k_bound_en                      : 1;
    unsigned int reg_dm_wr_access_mode                      : 1;
    unsigned int reg_dm_wr_col_step_dir                     : 1;
    unsigned int reg_dm_wr_db_en                            : 1;
    unsigned int reg_dm_wr_enable                           : 1;
    unsigned int reg_dm_wr_line_step_dir                    : 1;
    unsigned int reg_dm_wr_ovflow_clr                       : 1;
    unsigned int reg_dm_wr_udflow_clr                       : 1;
    unsigned int reg_dm_wr_buf_size                         : 6;
    unsigned int reg_dm_wr_clr                              : 1;
    unsigned int reserved                                   : 1;
    unsigned int reg_dm_wr_burst_len                        : 8;
    unsigned int reg_dm_wr_burst_rmd                        : 8;
};
#define rx_audio_top2_audio_dm_9(val) ((rs_rx_audio_top2_audio_dm_9*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_10                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x44)

#define RX_AUDIO_TOP2_AUDIO_DM_10_struct                                 rs_rx_audio_top2_audio_dm_10

typedef struct _rs_rx_audio_top2_audio_dm_10  rs_rx_audio_top2_audio_dm_10;
struct _rs_rx_audio_top2_audio_dm_10 {
    unsigned int reg_dm_wr_burst_num                        :32;
};
#define rx_audio_top2_audio_dm_10(val) ((rs_rx_audio_top2_audio_dm_10*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_11                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x48)

#define RX_AUDIO_TOP2_AUDIO_DM_11_struct                                 rs_rx_audio_top2_audio_dm_11

typedef struct _rs_rx_audio_top2_audio_dm_11  rs_rx_audio_top2_audio_dm_11;
struct _rs_rx_audio_top2_audio_dm_11 {
    unsigned int reg_dm_wr_col_step                         :32;
};
#define rx_audio_top2_audio_dm_11(val) ((rs_rx_audio_top2_audio_dm_11*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_12                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x4C)

#define RX_AUDIO_TOP2_AUDIO_DM_12_struct                                 rs_rx_audio_top2_audio_dm_12

typedef struct _rs_rx_audio_top2_audio_dm_12  rs_rx_audio_top2_audio_dm_12;
struct _rs_rx_audio_top2_audio_dm_12 {
    unsigned int reg_dm_wr_line_step                        :32;
};
#define rx_audio_top2_audio_dm_12(val) ((rs_rx_audio_top2_audio_dm_12*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_13                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x50)

#define RX_AUDIO_TOP2_AUDIO_DM_13_struct                                 rs_rx_audio_top2_audio_dm_13

typedef struct _rs_rx_audio_top2_audio_dm_13  rs_rx_audio_top2_audio_dm_13;
struct _rs_rx_audio_top2_audio_dm_13 {
    unsigned int reg_dm_wr_start_adr                        :32;
};
#define rx_audio_top2_audio_dm_13(val) ((rs_rx_audio_top2_audio_dm_13*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_14                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x54)

#define RX_AUDIO_TOP2_AUDIO_DM_14_struct                                 rs_rx_audio_top2_audio_dm_14

typedef struct _rs_rx_audio_top2_audio_dm_14  rs_rx_audio_top2_audio_dm_14;
struct _rs_rx_audio_top2_audio_dm_14 {
    unsigned int reg_dm_wr_total_col_num                    :16;
    unsigned int reg_dm_wr_total_line_num                   :16;
};
#define rx_audio_top2_audio_dm_14(val) ((rs_rx_audio_top2_audio_dm_14*)&(val))



#define RX_AUDIO_TOP2_AUDIO_DM_15                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x58)

#define RX_AUDIO_TOP2_AUDIO_DM_15_struct                                 rs_rx_audio_top2_audio_dm_15

typedef struct _rs_rx_audio_top2_audio_dm_15  rs_rx_audio_top2_audio_dm_15;
struct _rs_rx_audio_top2_audio_dm_15 {
    unsigned int reg_dm_wr_wdata_index                      :32;
};
#define rx_audio_top2_audio_dm_15(val) ((rs_rx_audio_top2_audio_dm_15*)&(val))



#define RX_AUDIO_TOP2_AUDIO_SRC_0                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x5C)

#define RX_AUDIO_TOP2_AUDIO_SRC_0_struct                                 rs_rx_audio_top2_audio_src_0

typedef struct _rs_rx_audio_top2_audio_src_0  rs_rx_audio_top2_audio_src_0;
struct _rs_rx_audio_top2_audio_src_0 {
    unsigned int reg_dm_wr_outstanding                      : 4;
    unsigned int reg_audio_src_fs_in                        : 4;
    unsigned int reg_audio_src_fs_out                       : 4;
    unsigned int reg_audio_src_post_clk_sel                 : 2;
    unsigned int reg_audio_src_pre_clk_sel                  : 2;
    unsigned int reg_audio_src_en                           : 1;
    unsigned int reserved                                   :15;
};
#define rx_audio_top2_audio_src_0(val) ((rs_rx_audio_top2_audio_src_0*)&(val))



#define RX_AUDIO_TOP2_AUDIO_SRC_1                                        (HV_AUDIO_TOP2_BASE_ADDRESS + 0x60)

#define RX_AUDIO_TOP2_AUDIO_SRC_1_struct                                 rs_rx_audio_top2_audio_src_1

typedef struct _rs_rx_audio_top2_audio_src_1  rs_rx_audio_top2_audio_src_1;
struct _rs_rx_audio_top2_audio_src_1 {
    unsigned int reg_audio_src_ratio                        :16;
    unsigned int reg_audio_src_start_pos                    :16;
};
#define rx_audio_top2_audio_src_1(val) ((rs_rx_audio_top2_audio_src_1*)&(val))



#define RX_AUDIO_TOP2_64                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x64)

#define RX_AUDIO_TOP2_64_struct                                          rs_rx_audio_top2_64

typedef struct _rs_rx_audio_top2_64  rs_rx_audio_top2_64;
struct _rs_rx_audio_top2_64 {
    unsigned int reg_audio_src_pcm_sel                      : 2;
    unsigned int reg_audio_src_pcm_sel0                     : 3;
    unsigned int reg_audio_src_pcm_sel1                     : 3;
    unsigned int reg_audio_src_pcm_sel2                     : 3;
    unsigned int reg_audio_src_pcm_sel3                     : 3;
    unsigned int reg_audio_src_pcm_sel4                     : 3;
    unsigned int reg_audio_src_pcm_sel5                     : 3;
    unsigned int reg_audio_src_pcm_sel6                     : 3;
    unsigned int reg_audio_src_pcm_sel7                     : 3;
    unsigned int reserved                                   : 6;
};
#define rx_audio_top2_64(val) ((rs_rx_audio_top2_64*)&(val))



#define RX_AUDIO_TOP2_68                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x68)

#define RX_AUDIO_TOP2_68_struct                                          rs_rx_audio_top2_68

typedef struct _rs_rx_audio_top2_68  rs_rx_audio_top2_68;
struct _rs_rx_audio_top2_68 {
    unsigned int reg_audio_rmem_reg                         : 8;
    unsigned int reg_audio_wmem_reg                         : 8;
    unsigned int reg_audio_ls_mode                          : 1;
    unsigned int reg_audio_rmem_lp                          : 1;
    unsigned int reg_audio_wmem_lp                          : 1;
    unsigned int reserved                                   :13;
};
#define rx_audio_top2_68(val) ((rs_rx_audio_top2_68*)&(val))



#define RX_AUDIO_TOP2_6C                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x6C)

#define RX_AUDIO_TOP2_6C_struct                                          rs_rx_audio_top2_6c

typedef struct _rs_rx_audio_top2_6c  rs_rx_audio_top2_6c;
struct _rs_rx_audio_top2_6c {
    unsigned int reg_audio_rmem_ema                         :16;
    unsigned int reg_audio_wmem_ema                         :16;
};
#define rx_audio_top2_6c(val) ((rs_rx_audio_top2_6c*)&(val))



#define RX_AUDIO_TOP2_70                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x70)

#define RX_AUDIO_TOP2_70_struct                                          rs_rx_audio_top2_70

typedef struct _rs_rx_audio_top2_70  rs_rx_audio_top2_70;
struct _rs_rx_audio_top2_70 {
    unsigned int reg_edp_aud_comp_alg_en                    : 1;
    unsigned int reserved                                   :15;
    unsigned int regr_audio_pll_lockdet_ref_int_value       :16;
};
#define rx_audio_top2_70(val) ((rs_rx_audio_top2_70*)&(val))



#define RX_AUDIO_TOP2_AUDIO_PLL_DET_1                                    (HV_AUDIO_TOP2_BASE_ADDRESS + 0x74)

#define RX_AUDIO_TOP2_AUDIO_PLL_DET_1_struct                             rs_rx_audio_top2_audio_pll_det_1

typedef struct _rs_rx_audio_top2_audio_pll_det_1  rs_rx_audio_top2_audio_pll_det_1;
struct _rs_rx_audio_top2_audio_pll_det_1 {
    unsigned int reg_audio_pll_lockdet_lock_fw_mode         : 1;
    unsigned int reg_audio_pll_lockdet_lock_fw_value        : 1;
    unsigned int reg_audio_pll_lockdet_det_win              : 3;
    unsigned int reg_audio_pll_lockdet_locked_num           : 4;
    unsigned int reg_audio_pll_lockdet_unlocked_num         : 4;
    unsigned int reg_audio_pll_lockdet_lock_err_range       : 8;
    unsigned int reg_audio_pll_lockdet_fast_err_range       : 8;
    unsigned int reserved                                   : 3;
};
#define rx_audio_top2_audio_pll_det_1(val) ((rs_rx_audio_top2_audio_pll_det_1*)&(val))



#define RX_AUDIO_TOP2_AUDIO_PLL_DET_2                                    (HV_AUDIO_TOP2_BASE_ADDRESS + 0x78)

#define RX_AUDIO_TOP2_AUDIO_PLL_DET_2_struct                             rs_rx_audio_top2_audio_pll_det_2

typedef struct _rs_rx_audio_top2_audio_pll_det_2  rs_rx_audio_top2_audio_pll_det_2;
struct _rs_rx_audio_top2_audio_pll_det_2 {
    unsigned int reg_audio_pll_lockdet_no_clk_th            : 8;
    unsigned int regr_audio_pll_lockdet_pll_lock            : 1;
    unsigned int regr_audio_pll_lockdet_ref_clk_fast        : 1;
    unsigned int regr_audio_pll_lockdet_ref_no_clk          : 1;
    unsigned int regr_audio_pll_lockdet_vco_clk_fast        : 1;
    unsigned int regr_audio_pll_lockdet_vco_no_clk          : 1;
    unsigned int reserved                                   : 3;
    unsigned int regr_audio_pll_lockdet_vco_int_value       :16;
};
#define rx_audio_top2_audio_pll_det_2(val) ((rs_rx_audio_top2_audio_pll_det_2*)&(val))



#define RX_AUDIO_TOP2_80                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x80)

#define RX_AUDIO_TOP2_80_struct                                          rs_rx_audio_top2_80

typedef struct _rs_rx_audio_top2_80  rs_rx_audio_top2_80;
struct _rs_rx_audio_top2_80 {
    unsigned int regr_audio_rmem_ro                         : 4;
    unsigned int regr_audio_wmem_ro                         : 4;
    unsigned int reserved                                   :24;
};
#define rx_audio_top2_80(val) ((rs_rx_audio_top2_80*)&(val))



#define RX_AUDIO_TOP2_84                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x84)

#define RX_AUDIO_TOP2_84_struct                                          rs_rx_audio_top2_84

typedef struct _rs_rx_audio_top2_84  rs_rx_audio_top2_84;
struct _rs_rx_audio_top2_84 {
    unsigned int regr_audio_pll_fbdiv_frac                  :16;
    unsigned int regr_audio_pll_fbdiv_int                   :10;
    unsigned int reserved                                   : 6;
};
#define rx_audio_top2_84(val) ((rs_rx_audio_top2_84*)&(val))



#define RX_AUDIO_TOP2_88                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x88)

#define RX_AUDIO_TOP2_88_struct                                          rs_rx_audio_top2_88

typedef struct _rs_rx_audio_top2_88  rs_rx_audio_top2_88;
struct _rs_rx_audio_top2_88 {
    unsigned int regr_audio_pll_fbdiv_a                     :24;
    unsigned int reserved                                   : 8;
};
#define rx_audio_top2_88(val) ((rs_rx_audio_top2_88*)&(val))



#define RX_AUDIO_TOP2_8C                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x8C)

#define RX_AUDIO_TOP2_8C_struct                                          rs_rx_audio_top2_8c

typedef struct _rs_rx_audio_top2_8c  rs_rx_audio_top2_8c;
struct _rs_rx_audio_top2_8c {
    unsigned int regr_audio_pll_fbdiv_b                     :24;
    unsigned int reserved                                   : 8;
};
#define rx_audio_top2_8c(val) ((rs_rx_audio_top2_8c*)&(val))



#define RX_AUDIO_TOP2_90                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x90)

#define RX_AUDIO_TOP2_90_struct                                          rs_rx_audio_top2_90

typedef struct _rs_rx_audio_top2_90  rs_rx_audio_top2_90;
struct _rs_rx_audio_top2_90 {
    unsigned int reg_audio_pll0_clk_src_sel                 : 2;
    unsigned int reg_audio_pll_0_fbdiv_sel                  : 2;
    unsigned int reg_audio_dbg_sel                          : 4;
    unsigned int reg_audio_dbg_clk_sel                      : 3;
    unsigned int reg_audio_pll_0_fbdiv_ratio                : 4;
    unsigned int reserved                                   : 1;
    unsigned int reg_audio_pll_spdif_comp_cnt_thro          :16;
};
#define rx_audio_top2_90(val) ((rs_rx_audio_top2_90*)&(val))



#define RX_AUDIO_TOP2_94                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x94)

#define RX_AUDIO_TOP2_94_struct                                          rs_rx_audio_top2_94

typedef struct _rs_rx_audio_top2_94  rs_rx_audio_top2_94;
struct _rs_rx_audio_top2_94 {
    unsigned int regr_dm_rd_afifo_ovflow                    : 1;
    unsigned int regr_dm_rd_afifo_udflow                    : 1;
    unsigned int regr_dm_rd_buf_ovflow                      : 1;
    unsigned int regr_dm_rd_buf_udflow                      : 1;
    unsigned int regr_dm_rd_bus_idle                        : 1;
    unsigned int regr_dm_rd_buf_space                       : 6;
    unsigned int reserved                                   : 1;
    unsigned int regr_dm_rd_cmd_sent                        : 4;
    unsigned int regr_dm_rd_block_num                       :16;
};
#define rx_audio_top2_94(val) ((rs_rx_audio_top2_94*)&(val))



#define RX_AUDIO_TOP2_98                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x98)

#define RX_AUDIO_TOP2_98_struct                                          rs_rx_audio_top2_98

typedef struct _rs_rx_audio_top2_98  rs_rx_audio_top2_98;
struct _rs_rx_audio_top2_98 {
    unsigned int regr_dm_rd_cnt                             :32;
};
#define rx_audio_top2_98(val) ((rs_rx_audio_top2_98*)&(val))



#define RX_AUDIO_TOP2_9C                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0x9C)

#define RX_AUDIO_TOP2_9C_struct                                          rs_rx_audio_top2_9c

typedef struct _rs_rx_audio_top2_9c  rs_rx_audio_top2_9c;
struct _rs_rx_audio_top2_9c {
    unsigned int regr_dm_rd_dat_wait                        :12;
    unsigned int regr_dm_rd_st                              : 4;
    unsigned int regr_dm_rd_line_num                        :16;
};
#define rx_audio_top2_9c(val) ((rs_rx_audio_top2_9c*)&(val))



#define RX_AUDIO_TOP2_A0                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xA0)

#define RX_AUDIO_TOP2_A0_struct                                          rs_rx_audio_top2_a0

typedef struct _rs_rx_audio_top2_a0  rs_rx_audio_top2_a0;
struct _rs_rx_audio_top2_a0 {
    unsigned int regr_dm_rd_rdata_0                         :32;
};
#define rx_audio_top2_a0(val) ((rs_rx_audio_top2_a0*)&(val))



#define RX_AUDIO_TOP2_A4                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xA4)

#define RX_AUDIO_TOP2_A4_struct                                          rs_rx_audio_top2_a4

typedef struct _rs_rx_audio_top2_a4  rs_rx_audio_top2_a4;
struct _rs_rx_audio_top2_a4 {
    unsigned int regr_dm_rd_rdata_1                         :32;
};
#define rx_audio_top2_a4(val) ((rs_rx_audio_top2_a4*)&(val))



#define RX_AUDIO_TOP2_A8                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xA8)

#define RX_AUDIO_TOP2_A8_struct                                          rs_rx_audio_top2_a8

typedef struct _rs_rx_audio_top2_a8  rs_rx_audio_top2_a8;
struct _rs_rx_audio_top2_a8 {
    unsigned int regr_dm_rd_rdata_2                         :32;
};
#define rx_audio_top2_a8(val) ((rs_rx_audio_top2_a8*)&(val))



#define RX_AUDIO_TOP2_AC                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xAC)

#define RX_AUDIO_TOP2_AC_struct                                          rs_rx_audio_top2_ac

typedef struct _rs_rx_audio_top2_ac  rs_rx_audio_top2_ac;
struct _rs_rx_audio_top2_ac {
    unsigned int regr_dm_rd_rdata_3                         :32;
};
#define rx_audio_top2_ac(val) ((rs_rx_audio_top2_ac*)&(val))



#define RX_AUDIO_TOP2_B0                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xB0)

#define RX_AUDIO_TOP2_B0_struct                                          rs_rx_audio_top2_b0

typedef struct _rs_rx_audio_top2_b0  rs_rx_audio_top2_b0;
struct _rs_rx_audio_top2_b0 {
    unsigned int regr_dm_wr_afifo_ovflow                    : 1;
    unsigned int regr_dm_wr_afifo_udflow                    : 1;
    unsigned int regr_dm_wr_bus_idle                        : 1;
    unsigned int regr_dm_wr_buf_ovflow                      : 1;
    unsigned int regr_dm_wr_buf_udflow                      : 1;
    unsigned int reserved                                   : 3;
    unsigned int regr_dm_wr_cmd_sent                        : 4;
    unsigned int regr_dm_wr_st                              : 4;
    unsigned int regr_dm_wr_block_num                       :16;
};
#define rx_audio_top2_b0(val) ((rs_rx_audio_top2_b0*)&(val))



#define RX_AUDIO_TOP2_B4                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xB4)

#define RX_AUDIO_TOP2_B4_struct                                          rs_rx_audio_top2_b4

typedef struct _rs_rx_audio_top2_b4  rs_rx_audio_top2_b4;
struct _rs_rx_audio_top2_b4 {
    unsigned int regr_dm_wr_dat_need                        :12;
    unsigned int reserved                                   : 4;
    unsigned int regr_dm_wr_line_num                        :16;
};
#define rx_audio_top2_b4(val) ((rs_rx_audio_top2_b4*)&(val))



#define RX_AUDIO_TOP2_B8                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xB8)

#define RX_AUDIO_TOP2_B8_struct                                          rs_rx_audio_top2_b8

typedef struct _rs_rx_audio_top2_b8  rs_rx_audio_top2_b8;
struct _rs_rx_audio_top2_b8 {
    unsigned int regr_dm_wr_wdata_0                         :32;
};
#define rx_audio_top2_b8(val) ((rs_rx_audio_top2_b8*)&(val))



#define RX_AUDIO_TOP2_BC                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xBC)

#define RX_AUDIO_TOP2_BC_struct                                          rs_rx_audio_top2_bc

typedef struct _rs_rx_audio_top2_bc  rs_rx_audio_top2_bc;
struct _rs_rx_audio_top2_bc {
    unsigned int regr_dm_wr_wdata_1                         :32;
};
#define rx_audio_top2_bc(val) ((rs_rx_audio_top2_bc*)&(val))



#define RX_AUDIO_TOP2_C0                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xC0)

#define RX_AUDIO_TOP2_C0_struct                                          rs_rx_audio_top2_c0

typedef struct _rs_rx_audio_top2_c0  rs_rx_audio_top2_c0;
struct _rs_rx_audio_top2_c0 {
    unsigned int regr_dm_wr_wdata_2                         :32;
};
#define rx_audio_top2_c0(val) ((rs_rx_audio_top2_c0*)&(val))



#define RX_AUDIO_TOP2_C4                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xC4)

#define RX_AUDIO_TOP2_C4_struct                                          rs_rx_audio_top2_c4

typedef struct _rs_rx_audio_top2_c4  rs_rx_audio_top2_c4;
struct _rs_rx_audio_top2_c4 {
    unsigned int regr_dm_wr_wdata_3                         :32;
};
#define rx_audio_top2_c4(val) ((rs_rx_audio_top2_c4*)&(val))



#define RX_AUDIO_TOP2_C8                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xC8)

#define RX_AUDIO_TOP2_C8_struct                                          rs_rx_audio_top2_c8

typedef struct _rs_rx_audio_top2_c8  rs_rx_audio_top2_c8;
struct _rs_rx_audio_top2_c8 {
    unsigned int regr_dp_lpcm_v                             : 8;
    unsigned int regr_dp_lpcm_u                             : 8;
    unsigned int regr_dp_lpcm_c                             : 8;
    unsigned int regr_dp_lpcm_p                             : 8;
};
#define rx_audio_top2_c8(val) ((rs_rx_audio_top2_c8*)&(val))



#define RX_AUDIO_TOP2_CC                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xCC)

#define RX_AUDIO_TOP2_CC_struct                                          rs_rx_audio_top2_cc

typedef struct _rs_rx_audio_top2_cc  rs_rx_audio_top2_cc;
struct _rs_rx_audio_top2_cc {
    unsigned int regr_dp_lpcm_pr                            :16;
    unsigned int regr_dp_lpcm_sp                            : 8;
    unsigned int regr_dp_ch_cnt                             : 8;
};
#define rx_audio_top2_cc(val) ((rs_rx_audio_top2_cc*)&(val))



#define RX_AUDIO_TOP2_D0                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xD0)

#define RX_AUDIO_TOP2_D0_struct                                          rs_rx_audio_top2_d0

typedef struct _rs_rx_audio_top2_d0  rs_rx_audio_top2_d0;
struct _rs_rx_audio_top2_d0 {
    unsigned int regr_dp_hbr_v                              : 8;
    unsigned int regr_dp_hbr_u                              : 8;
    unsigned int regr_dp_hbr_c                              : 8;
    unsigned int regr_dp_hbr_p                              : 8;
};
#define rx_audio_top2_d0(val) ((rs_rx_audio_top2_d0*)&(val))



#define RX_AUDIO_TOP2_D4                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xD4)

#define RX_AUDIO_TOP2_D4_struct                                          rs_rx_audio_top2_d4

typedef struct _rs_rx_audio_top2_d4  rs_rx_audio_top2_d4;
struct _rs_rx_audio_top2_d4 {
    unsigned int regr_dp_hbr_pr                             :16;
    unsigned int regr_dp_hbr_sp                             : 8;
    unsigned int reserved                                   : 8;
};
#define rx_audio_top2_d4(val) ((rs_rx_audio_top2_d4*)&(val))



#define RX_AUDIO_TOP2_D8                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xD8)

#define RX_AUDIO_TOP2_D8_struct                                          rs_rx_audio_top2_d8

typedef struct _rs_rx_audio_top2_d8  rs_rx_audio_top2_d8;
struct _rs_rx_audio_top2_d8 {
    unsigned int regr_dp_oba_f                              : 8;
    unsigned int regr_dp_oba_c                              : 8;
    unsigned int regr_dp_oba_v                              : 8;
    unsigned int regr_dp_oba_sp                             : 8;
};
#define rx_audio_top2_d8(val) ((rs_rx_audio_top2_d8*)&(val))



#define RX_AUDIO_TOP2_DC                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xDC)

#define RX_AUDIO_TOP2_DC_struct                                          rs_rx_audio_top2_dc

typedef struct _rs_rx_audio_top2_dc  rs_rx_audio_top2_dc;
struct _rs_rx_audio_top2_dc {
    unsigned int regr_dp_dst_f                              : 8;
    unsigned int regr_dp_dst_c                              : 8;
    unsigned int regr_dp_dst_v                              : 8;
    unsigned int regr_dp_dst_sp                             : 8;
};
#define rx_audio_top2_dc(val) ((rs_rx_audio_top2_dc*)&(val))



#define RX_AUDIO_TOP2_HDMI_AUD_CTL_REG                                   (HV_AUDIO_TOP2_BASE_ADDRESS + 0xE0)

#define RX_AUDIO_TOP2_HDMI_AUD_CTL_REG_struct                            rs_rx_audio_top2_hdmi_aud_ctl_reg

typedef struct _rs_rx_audio_top2_hdmi_aud_ctl_reg  rs_rx_audio_top2_hdmi_aud_ctl_reg;
struct _rs_rx_audio_top2_hdmi_aud_ctl_reg {
    unsigned int regr_hdmi_aud_ctl                          : 2;
    unsigned int regr_hdmi_aud_fmt                          : 3;
    unsigned int regr_hdmi_aud_sp_idx                       : 2;
    unsigned int regr_hdmi_aud_sp_st                        : 1;
    unsigned int regr_hdmi_aud_ch_valid                     : 8;
    unsigned int regr_hdmi_aud_valid                        : 1;
    unsigned int reserved                                   :15;
};
#define rx_audio_top2_hdmi_aud_ctl_reg(val) ((rs_rx_audio_top2_hdmi_aud_ctl_reg*)&(val))



#define RX_AUDIO_TOP2_E4                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xE4)

#define RX_AUDIO_TOP2_E4_struct                                          rs_rx_audio_top2_e4

typedef struct _rs_rx_audio_top2_e4  rs_rx_audio_top2_e4;
struct _rs_rx_audio_top2_e4 {
    unsigned int reg_audpll_pg0_det_delta                   :32;
};
#define rx_audio_top2_e4(val) ((rs_rx_audio_top2_e4*)&(val))



#define RX_AUDIO_TOP2_E8                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xE8)

#define RX_AUDIO_TOP2_E8_struct                                          rs_rx_audio_top2_e8

typedef struct _rs_rx_audio_top2_e8  rs_rx_audio_top2_e8;
struct _rs_rx_audio_top2_e8 {
    unsigned int reg_audpll_pg0_det_high                    :32;
};
#define rx_audio_top2_e8(val) ((rs_rx_audio_top2_e8*)&(val))



#define RX_AUDIO_TOP2_EC                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xEC)

#define RX_AUDIO_TOP2_EC_struct                                          rs_rx_audio_top2_ec

typedef struct _rs_rx_audio_top2_ec  rs_rx_audio_top2_ec;
struct _rs_rx_audio_top2_ec {
    unsigned int reg_audpll_pg0_det_low                     :32;
};
#define rx_audio_top2_ec(val) ((rs_rx_audio_top2_ec*)&(val))



#define RX_AUDIO_TOP2_F0                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xF0)

#define RX_AUDIO_TOP2_F0_struct                                          rs_rx_audio_top2_f0

typedef struct _rs_rx_audio_top2_f0  rs_rx_audio_top2_f0;
struct _rs_rx_audio_top2_f0 {
    unsigned int reg_audpll_pg0_det_win                     :32;
};
#define rx_audio_top2_f0(val) ((rs_rx_audio_top2_f0*)&(val))



#define RX_AUDIO_TOP2_F4                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xF4)

#define RX_AUDIO_TOP2_F4_struct                                          rs_rx_audio_top2_f4

typedef struct _rs_rx_audio_top2_f4  rs_rx_audio_top2_f4;
struct _rs_rx_audio_top2_f4 {
    unsigned int regr_audpll_pg0_det_mon_cnt                :32;
};
#define rx_audio_top2_f4(val) ((rs_rx_audio_top2_f4*)&(val))



#define RX_AUDIO_TOP2_F8                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xF8)

#define RX_AUDIO_TOP2_F8_struct                                          rs_rx_audio_top2_f8

typedef struct _rs_rx_audio_top2_f8  rs_rx_audio_top2_f8;
struct _rs_rx_audio_top2_f8 {
    unsigned int regr_audpll_pg0_det_mon_high               : 1;
    unsigned int regr_audpll_pg0_det_mon_low                : 1;
    unsigned int regr_audpll_pg0_det_mon_nck                : 1;
    unsigned int regr_audpll_pg0_det_mon_nstb               : 1;
    unsigned int reserved                                   :28;
};
#define rx_audio_top2_f8(val) ((rs_rx_audio_top2_f8*)&(val))



#define RX_AUDIO_TOP2_FC                                                 (HV_AUDIO_TOP2_BASE_ADDRESS + 0xFC)

#define RX_AUDIO_TOP2_FC_struct                                          rs_rx_audio_top2_fc

typedef struct _rs_rx_audio_top2_fc  rs_rx_audio_top2_fc;
struct _rs_rx_audio_top2_fc {
    unsigned int reg_video_abnormal_filter                  :24;
    unsigned int reserved                                   : 8;
};
#define rx_audio_top2_fc(val) ((rs_rx_audio_top2_fc*)&(val))



#endif