#ifndef _HV_PAGE_HT7315_HV_HDCP_ENGINE_TOP2_REG_H_
#define _HV_PAGE_HT7315_HV_HDCP_ENGINE_TOP2_REG_H_

#ifndef HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS
    #define HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS                                         0x1104C200
#endif


#define RX_HV_HDCP_ENGINE_TOP2_REG_00                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x00)

#define RX_HV_HDCP_ENGINE_TOP2_REG_00_struct                             rs_rx_hv_hdcp_engine_top2_reg_00

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_00  rs_rx_hv_hdcp_engine_top2_reg_00;
struct _rs_rx_hv_hdcp_engine_top2_reg_00 {
    unsigned int reg_decrypt_q_13                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_00(val) ((rs_rx_hv_hdcp_engine_top2_reg_00*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_04                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x04)

#define RX_HV_HDCP_ENGINE_TOP2_REG_04_struct                             rs_rx_hv_hdcp_engine_top2_reg_04

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_04  rs_rx_hv_hdcp_engine_top2_reg_04;
struct _rs_rx_hv_hdcp_engine_top2_reg_04 {
    unsigned int reg_decrypt_q_12                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_04(val) ((rs_rx_hv_hdcp_engine_top2_reg_04*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_08                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x08)

#define RX_HV_HDCP_ENGINE_TOP2_REG_08_struct                             rs_rx_hv_hdcp_engine_top2_reg_08

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_08  rs_rx_hv_hdcp_engine_top2_reg_08;
struct _rs_rx_hv_hdcp_engine_top2_reg_08 {
    unsigned int reg_decrypt_q_11                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_08(val) ((rs_rx_hv_hdcp_engine_top2_reg_08*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_0C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x0C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_0C_struct                             rs_rx_hv_hdcp_engine_top2_reg_0c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_0c  rs_rx_hv_hdcp_engine_top2_reg_0c;
struct _rs_rx_hv_hdcp_engine_top2_reg_0c {
    unsigned int reg_decrypt_q_10                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_0c(val) ((rs_rx_hv_hdcp_engine_top2_reg_0c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_10                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x10)

#define RX_HV_HDCP_ENGINE_TOP2_REG_10_struct                             rs_rx_hv_hdcp_engine_top2_reg_10

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_10  rs_rx_hv_hdcp_engine_top2_reg_10;
struct _rs_rx_hv_hdcp_engine_top2_reg_10 {
    unsigned int reg_decrypt_q_09                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_10(val) ((rs_rx_hv_hdcp_engine_top2_reg_10*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_14                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x14)

#define RX_HV_HDCP_ENGINE_TOP2_REG_14_struct                             rs_rx_hv_hdcp_engine_top2_reg_14

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_14  rs_rx_hv_hdcp_engine_top2_reg_14;
struct _rs_rx_hv_hdcp_engine_top2_reg_14 {
    unsigned int reg_decrypt_q_08                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_14(val) ((rs_rx_hv_hdcp_engine_top2_reg_14*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_18                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x18)

#define RX_HV_HDCP_ENGINE_TOP2_REG_18_struct                             rs_rx_hv_hdcp_engine_top2_reg_18

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_18  rs_rx_hv_hdcp_engine_top2_reg_18;
struct _rs_rx_hv_hdcp_engine_top2_reg_18 {
    unsigned int reg_decrypt_q_07                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_18(val) ((rs_rx_hv_hdcp_engine_top2_reg_18*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_1C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x1C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_1C_struct                             rs_rx_hv_hdcp_engine_top2_reg_1c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_1c  rs_rx_hv_hdcp_engine_top2_reg_1c;
struct _rs_rx_hv_hdcp_engine_top2_reg_1c {
    unsigned int reg_decrypt_q_06                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_1c(val) ((rs_rx_hv_hdcp_engine_top2_reg_1c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_20                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x20)

#define RX_HV_HDCP_ENGINE_TOP2_REG_20_struct                             rs_rx_hv_hdcp_engine_top2_reg_20

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_20  rs_rx_hv_hdcp_engine_top2_reg_20;
struct _rs_rx_hv_hdcp_engine_top2_reg_20 {
    unsigned int reg_decrypt_q_05                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_20(val) ((rs_rx_hv_hdcp_engine_top2_reg_20*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_24                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x24)

#define RX_HV_HDCP_ENGINE_TOP2_REG_24_struct                             rs_rx_hv_hdcp_engine_top2_reg_24

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_24  rs_rx_hv_hdcp_engine_top2_reg_24;
struct _rs_rx_hv_hdcp_engine_top2_reg_24 {
    unsigned int reg_decrypt_q_04                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_24(val) ((rs_rx_hv_hdcp_engine_top2_reg_24*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_28                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x28)

#define RX_HV_HDCP_ENGINE_TOP2_REG_28_struct                             rs_rx_hv_hdcp_engine_top2_reg_28

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_28  rs_rx_hv_hdcp_engine_top2_reg_28;
struct _rs_rx_hv_hdcp_engine_top2_reg_28 {
    unsigned int reg_decrypt_q_03                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_28(val) ((rs_rx_hv_hdcp_engine_top2_reg_28*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_2C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x2C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_2C_struct                             rs_rx_hv_hdcp_engine_top2_reg_2c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_2c  rs_rx_hv_hdcp_engine_top2_reg_2c;
struct _rs_rx_hv_hdcp_engine_top2_reg_2c {
    unsigned int reg_decrypt_q_02                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_2c(val) ((rs_rx_hv_hdcp_engine_top2_reg_2c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_30                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x30)

#define RX_HV_HDCP_ENGINE_TOP2_REG_30_struct                             rs_rx_hv_hdcp_engine_top2_reg_30

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_30  rs_rx_hv_hdcp_engine_top2_reg_30;
struct _rs_rx_hv_hdcp_engine_top2_reg_30 {
    unsigned int reg_decrypt_q_01                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_30(val) ((rs_rx_hv_hdcp_engine_top2_reg_30*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_34                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x34)

#define RX_HV_HDCP_ENGINE_TOP2_REG_34_struct                             rs_rx_hv_hdcp_engine_top2_reg_34

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_34  rs_rx_hv_hdcp_engine_top2_reg_34;
struct _rs_rx_hv_hdcp_engine_top2_reg_34 {
    unsigned int reg_decrypt_q_00                           :32;
};
#define rx_hv_hdcp_engine_top2_reg_34(val) ((rs_rx_hv_hdcp_engine_top2_reg_34*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_38                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x38)

#define RX_HV_HDCP_ENGINE_TOP2_REG_38_struct                             rs_rx_hv_hdcp_engine_top2_reg_38

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_38  rs_rx_hv_hdcp_engine_top2_reg_38;
struct _rs_rx_hv_hdcp_engine_top2_reg_38 {
    unsigned int reg_decrypt_qinv_15                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_38(val) ((rs_rx_hv_hdcp_engine_top2_reg_38*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_3C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x3C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_3C_struct                             rs_rx_hv_hdcp_engine_top2_reg_3c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_3c  rs_rx_hv_hdcp_engine_top2_reg_3c;
struct _rs_rx_hv_hdcp_engine_top2_reg_3c {
    unsigned int reg_decrypt_qinv_14                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_3c(val) ((rs_rx_hv_hdcp_engine_top2_reg_3c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_40                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x40)

#define RX_HV_HDCP_ENGINE_TOP2_REG_40_struct                             rs_rx_hv_hdcp_engine_top2_reg_40

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_40  rs_rx_hv_hdcp_engine_top2_reg_40;
struct _rs_rx_hv_hdcp_engine_top2_reg_40 {
    unsigned int reg_decrypt_qinv_13                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_40(val) ((rs_rx_hv_hdcp_engine_top2_reg_40*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_44                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x44)

#define RX_HV_HDCP_ENGINE_TOP2_REG_44_struct                             rs_rx_hv_hdcp_engine_top2_reg_44

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_44  rs_rx_hv_hdcp_engine_top2_reg_44;
struct _rs_rx_hv_hdcp_engine_top2_reg_44 {
    unsigned int reg_decrypt_qinv_12                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_44(val) ((rs_rx_hv_hdcp_engine_top2_reg_44*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_48                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x48)

#define RX_HV_HDCP_ENGINE_TOP2_REG_48_struct                             rs_rx_hv_hdcp_engine_top2_reg_48

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_48  rs_rx_hv_hdcp_engine_top2_reg_48;
struct _rs_rx_hv_hdcp_engine_top2_reg_48 {
    unsigned int reg_decrypt_qinv_11                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_48(val) ((rs_rx_hv_hdcp_engine_top2_reg_48*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_4C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x4C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_4C_struct                             rs_rx_hv_hdcp_engine_top2_reg_4c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_4c  rs_rx_hv_hdcp_engine_top2_reg_4c;
struct _rs_rx_hv_hdcp_engine_top2_reg_4c {
    unsigned int reg_decrypt_qinv_10                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_4c(val) ((rs_rx_hv_hdcp_engine_top2_reg_4c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_50                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x50)

#define RX_HV_HDCP_ENGINE_TOP2_REG_50_struct                             rs_rx_hv_hdcp_engine_top2_reg_50

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_50  rs_rx_hv_hdcp_engine_top2_reg_50;
struct _rs_rx_hv_hdcp_engine_top2_reg_50 {
    unsigned int reg_decrypt_qinv_09                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_50(val) ((rs_rx_hv_hdcp_engine_top2_reg_50*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_54                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x54)

#define RX_HV_HDCP_ENGINE_TOP2_REG_54_struct                             rs_rx_hv_hdcp_engine_top2_reg_54

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_54  rs_rx_hv_hdcp_engine_top2_reg_54;
struct _rs_rx_hv_hdcp_engine_top2_reg_54 {
    unsigned int reg_decrypt_qinv_08                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_54(val) ((rs_rx_hv_hdcp_engine_top2_reg_54*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_58                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x58)

#define RX_HV_HDCP_ENGINE_TOP2_REG_58_struct                             rs_rx_hv_hdcp_engine_top2_reg_58

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_58  rs_rx_hv_hdcp_engine_top2_reg_58;
struct _rs_rx_hv_hdcp_engine_top2_reg_58 {
    unsigned int reg_decrypt_qinv_07                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_58(val) ((rs_rx_hv_hdcp_engine_top2_reg_58*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_5C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x5C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_5C_struct                             rs_rx_hv_hdcp_engine_top2_reg_5c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_5c  rs_rx_hv_hdcp_engine_top2_reg_5c;
struct _rs_rx_hv_hdcp_engine_top2_reg_5c {
    unsigned int reg_decrypt_qinv_06                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_5c(val) ((rs_rx_hv_hdcp_engine_top2_reg_5c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_60                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x60)

#define RX_HV_HDCP_ENGINE_TOP2_REG_60_struct                             rs_rx_hv_hdcp_engine_top2_reg_60

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_60  rs_rx_hv_hdcp_engine_top2_reg_60;
struct _rs_rx_hv_hdcp_engine_top2_reg_60 {
    unsigned int reg_decrypt_qinv_05                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_60(val) ((rs_rx_hv_hdcp_engine_top2_reg_60*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_64                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x64)

#define RX_HV_HDCP_ENGINE_TOP2_REG_64_struct                             rs_rx_hv_hdcp_engine_top2_reg_64

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_64  rs_rx_hv_hdcp_engine_top2_reg_64;
struct _rs_rx_hv_hdcp_engine_top2_reg_64 {
    unsigned int reg_decrypt_qinv_04                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_64(val) ((rs_rx_hv_hdcp_engine_top2_reg_64*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_68                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x68)

#define RX_HV_HDCP_ENGINE_TOP2_REG_68_struct                             rs_rx_hv_hdcp_engine_top2_reg_68

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_68  rs_rx_hv_hdcp_engine_top2_reg_68;
struct _rs_rx_hv_hdcp_engine_top2_reg_68 {
    unsigned int reg_decrypt_qinv_03                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_68(val) ((rs_rx_hv_hdcp_engine_top2_reg_68*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_6C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x6C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_6C_struct                             rs_rx_hv_hdcp_engine_top2_reg_6c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_6c  rs_rx_hv_hdcp_engine_top2_reg_6c;
struct _rs_rx_hv_hdcp_engine_top2_reg_6c {
    unsigned int reg_decrypt_qinv_02                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_6c(val) ((rs_rx_hv_hdcp_engine_top2_reg_6c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_70                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x70)

#define RX_HV_HDCP_ENGINE_TOP2_REG_70_struct                             rs_rx_hv_hdcp_engine_top2_reg_70

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_70  rs_rx_hv_hdcp_engine_top2_reg_70;
struct _rs_rx_hv_hdcp_engine_top2_reg_70 {
    unsigned int reg_decrypt_qinv_01                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_70(val) ((rs_rx_hv_hdcp_engine_top2_reg_70*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_74                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x74)

#define RX_HV_HDCP_ENGINE_TOP2_REG_74_struct                             rs_rx_hv_hdcp_engine_top2_reg_74

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_74  rs_rx_hv_hdcp_engine_top2_reg_74;
struct _rs_rx_hv_hdcp_engine_top2_reg_74 {
    unsigned int reg_decrypt_qinv_00                        :32;
};
#define rx_hv_hdcp_engine_top2_reg_74(val) ((rs_rx_hv_hdcp_engine_top2_reg_74*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_78                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x78)

#define RX_HV_HDCP_ENGINE_TOP2_REG_78_struct                             rs_rx_hv_hdcp_engine_top2_reg_78

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_78  rs_rx_hv_hdcp_engine_top2_reg_78;
struct _rs_rx_hv_hdcp_engine_top2_reg_78 {
    unsigned int reg_decrypt_message_31                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_78(val) ((rs_rx_hv_hdcp_engine_top2_reg_78*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_7C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x7C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_7C_struct                             rs_rx_hv_hdcp_engine_top2_reg_7c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_7c  rs_rx_hv_hdcp_engine_top2_reg_7c;
struct _rs_rx_hv_hdcp_engine_top2_reg_7c {
    unsigned int reg_decrypt_message_30                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_7c(val) ((rs_rx_hv_hdcp_engine_top2_reg_7c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_80                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x80)

#define RX_HV_HDCP_ENGINE_TOP2_REG_80_struct                             rs_rx_hv_hdcp_engine_top2_reg_80

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_80  rs_rx_hv_hdcp_engine_top2_reg_80;
struct _rs_rx_hv_hdcp_engine_top2_reg_80 {
    unsigned int reg_decrypt_message_29                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_80(val) ((rs_rx_hv_hdcp_engine_top2_reg_80*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_84                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x84)

#define RX_HV_HDCP_ENGINE_TOP2_REG_84_struct                             rs_rx_hv_hdcp_engine_top2_reg_84

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_84  rs_rx_hv_hdcp_engine_top2_reg_84;
struct _rs_rx_hv_hdcp_engine_top2_reg_84 {
    unsigned int reg_decrypt_message_28                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_84(val) ((rs_rx_hv_hdcp_engine_top2_reg_84*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_88                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x88)

#define RX_HV_HDCP_ENGINE_TOP2_REG_88_struct                             rs_rx_hv_hdcp_engine_top2_reg_88

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_88  rs_rx_hv_hdcp_engine_top2_reg_88;
struct _rs_rx_hv_hdcp_engine_top2_reg_88 {
    unsigned int reg_decrypt_message_27                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_88(val) ((rs_rx_hv_hdcp_engine_top2_reg_88*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_8C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x8C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_8C_struct                             rs_rx_hv_hdcp_engine_top2_reg_8c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_8c  rs_rx_hv_hdcp_engine_top2_reg_8c;
struct _rs_rx_hv_hdcp_engine_top2_reg_8c {
    unsigned int reg_decrypt_message_26                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_8c(val) ((rs_rx_hv_hdcp_engine_top2_reg_8c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_90                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x90)

#define RX_HV_HDCP_ENGINE_TOP2_REG_90_struct                             rs_rx_hv_hdcp_engine_top2_reg_90

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_90  rs_rx_hv_hdcp_engine_top2_reg_90;
struct _rs_rx_hv_hdcp_engine_top2_reg_90 {
    unsigned int reg_decrypt_message_25                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_90(val) ((rs_rx_hv_hdcp_engine_top2_reg_90*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_94                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x94)

#define RX_HV_HDCP_ENGINE_TOP2_REG_94_struct                             rs_rx_hv_hdcp_engine_top2_reg_94

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_94  rs_rx_hv_hdcp_engine_top2_reg_94;
struct _rs_rx_hv_hdcp_engine_top2_reg_94 {
    unsigned int reg_decrypt_message_24                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_94(val) ((rs_rx_hv_hdcp_engine_top2_reg_94*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_98                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x98)

#define RX_HV_HDCP_ENGINE_TOP2_REG_98_struct                             rs_rx_hv_hdcp_engine_top2_reg_98

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_98  rs_rx_hv_hdcp_engine_top2_reg_98;
struct _rs_rx_hv_hdcp_engine_top2_reg_98 {
    unsigned int reg_decrypt_message_23                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_98(val) ((rs_rx_hv_hdcp_engine_top2_reg_98*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_9C                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0x9C)

#define RX_HV_HDCP_ENGINE_TOP2_REG_9C_struct                             rs_rx_hv_hdcp_engine_top2_reg_9c

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_9c  rs_rx_hv_hdcp_engine_top2_reg_9c;
struct _rs_rx_hv_hdcp_engine_top2_reg_9c {
    unsigned int reg_decrypt_message_22                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_9c(val) ((rs_rx_hv_hdcp_engine_top2_reg_9c*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_A0                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xA0)

#define RX_HV_HDCP_ENGINE_TOP2_REG_A0_struct                             rs_rx_hv_hdcp_engine_top2_reg_a0

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_a0  rs_rx_hv_hdcp_engine_top2_reg_a0;
struct _rs_rx_hv_hdcp_engine_top2_reg_a0 {
    unsigned int reg_decrypt_message_21                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_a0(val) ((rs_rx_hv_hdcp_engine_top2_reg_a0*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_A4                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xA4)

#define RX_HV_HDCP_ENGINE_TOP2_REG_A4_struct                             rs_rx_hv_hdcp_engine_top2_reg_a4

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_a4  rs_rx_hv_hdcp_engine_top2_reg_a4;
struct _rs_rx_hv_hdcp_engine_top2_reg_a4 {
    unsigned int reg_decrypt_message_20                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_a4(val) ((rs_rx_hv_hdcp_engine_top2_reg_a4*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_A8                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xA8)

#define RX_HV_HDCP_ENGINE_TOP2_REG_A8_struct                             rs_rx_hv_hdcp_engine_top2_reg_a8

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_a8  rs_rx_hv_hdcp_engine_top2_reg_a8;
struct _rs_rx_hv_hdcp_engine_top2_reg_a8 {
    unsigned int reg_decrypt_message_19                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_a8(val) ((rs_rx_hv_hdcp_engine_top2_reg_a8*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_AC                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xAC)

#define RX_HV_HDCP_ENGINE_TOP2_REG_AC_struct                             rs_rx_hv_hdcp_engine_top2_reg_ac

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_ac  rs_rx_hv_hdcp_engine_top2_reg_ac;
struct _rs_rx_hv_hdcp_engine_top2_reg_ac {
    unsigned int reg_decrypt_message_18                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_ac(val) ((rs_rx_hv_hdcp_engine_top2_reg_ac*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_B0                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xB0)

#define RX_HV_HDCP_ENGINE_TOP2_REG_B0_struct                             rs_rx_hv_hdcp_engine_top2_reg_b0

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_b0  rs_rx_hv_hdcp_engine_top2_reg_b0;
struct _rs_rx_hv_hdcp_engine_top2_reg_b0 {
    unsigned int reg_decrypt_message_17                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_b0(val) ((rs_rx_hv_hdcp_engine_top2_reg_b0*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_B4                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xB4)

#define RX_HV_HDCP_ENGINE_TOP2_REG_B4_struct                             rs_rx_hv_hdcp_engine_top2_reg_b4

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_b4  rs_rx_hv_hdcp_engine_top2_reg_b4;
struct _rs_rx_hv_hdcp_engine_top2_reg_b4 {
    unsigned int reg_decrypt_message_16                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_b4(val) ((rs_rx_hv_hdcp_engine_top2_reg_b4*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_B8                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xB8)

#define RX_HV_HDCP_ENGINE_TOP2_REG_B8_struct                             rs_rx_hv_hdcp_engine_top2_reg_b8

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_b8  rs_rx_hv_hdcp_engine_top2_reg_b8;
struct _rs_rx_hv_hdcp_engine_top2_reg_b8 {
    unsigned int reg_decrypt_message_15                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_b8(val) ((rs_rx_hv_hdcp_engine_top2_reg_b8*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_BC                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xBC)

#define RX_HV_HDCP_ENGINE_TOP2_REG_BC_struct                             rs_rx_hv_hdcp_engine_top2_reg_bc

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_bc  rs_rx_hv_hdcp_engine_top2_reg_bc;
struct _rs_rx_hv_hdcp_engine_top2_reg_bc {
    unsigned int reg_decrypt_message_14                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_bc(val) ((rs_rx_hv_hdcp_engine_top2_reg_bc*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_C0                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xC0)

#define RX_HV_HDCP_ENGINE_TOP2_REG_C0_struct                             rs_rx_hv_hdcp_engine_top2_reg_c0

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_c0  rs_rx_hv_hdcp_engine_top2_reg_c0;
struct _rs_rx_hv_hdcp_engine_top2_reg_c0 {
    unsigned int reg_decrypt_message_13                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_c0(val) ((rs_rx_hv_hdcp_engine_top2_reg_c0*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_C4                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xC4)

#define RX_HV_HDCP_ENGINE_TOP2_REG_C4_struct                             rs_rx_hv_hdcp_engine_top2_reg_c4

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_c4  rs_rx_hv_hdcp_engine_top2_reg_c4;
struct _rs_rx_hv_hdcp_engine_top2_reg_c4 {
    unsigned int reg_decrypt_message_12                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_c4(val) ((rs_rx_hv_hdcp_engine_top2_reg_c4*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_C8                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xC8)

#define RX_HV_HDCP_ENGINE_TOP2_REG_C8_struct                             rs_rx_hv_hdcp_engine_top2_reg_c8

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_c8  rs_rx_hv_hdcp_engine_top2_reg_c8;
struct _rs_rx_hv_hdcp_engine_top2_reg_c8 {
    unsigned int reg_decrypt_message_11                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_c8(val) ((rs_rx_hv_hdcp_engine_top2_reg_c8*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_CC                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xCC)

#define RX_HV_HDCP_ENGINE_TOP2_REG_CC_struct                             rs_rx_hv_hdcp_engine_top2_reg_cc

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_cc  rs_rx_hv_hdcp_engine_top2_reg_cc;
struct _rs_rx_hv_hdcp_engine_top2_reg_cc {
    unsigned int reg_decrypt_message_10                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_cc(val) ((rs_rx_hv_hdcp_engine_top2_reg_cc*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_D0                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xD0)

#define RX_HV_HDCP_ENGINE_TOP2_REG_D0_struct                             rs_rx_hv_hdcp_engine_top2_reg_d0

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_d0  rs_rx_hv_hdcp_engine_top2_reg_d0;
struct _rs_rx_hv_hdcp_engine_top2_reg_d0 {
    unsigned int reg_decrypt_message_09                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_d0(val) ((rs_rx_hv_hdcp_engine_top2_reg_d0*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_D4                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xD4)

#define RX_HV_HDCP_ENGINE_TOP2_REG_D4_struct                             rs_rx_hv_hdcp_engine_top2_reg_d4

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_d4  rs_rx_hv_hdcp_engine_top2_reg_d4;
struct _rs_rx_hv_hdcp_engine_top2_reg_d4 {
    unsigned int reg_decrypt_message_08                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_d4(val) ((rs_rx_hv_hdcp_engine_top2_reg_d4*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_D8                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xD8)

#define RX_HV_HDCP_ENGINE_TOP2_REG_D8_struct                             rs_rx_hv_hdcp_engine_top2_reg_d8

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_d8  rs_rx_hv_hdcp_engine_top2_reg_d8;
struct _rs_rx_hv_hdcp_engine_top2_reg_d8 {
    unsigned int reg_decrypt_message_07                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_d8(val) ((rs_rx_hv_hdcp_engine_top2_reg_d8*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_DC                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xDC)

#define RX_HV_HDCP_ENGINE_TOP2_REG_DC_struct                             rs_rx_hv_hdcp_engine_top2_reg_dc

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_dc  rs_rx_hv_hdcp_engine_top2_reg_dc;
struct _rs_rx_hv_hdcp_engine_top2_reg_dc {
    unsigned int reg_decrypt_message_06                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_dc(val) ((rs_rx_hv_hdcp_engine_top2_reg_dc*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_E0                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xE0)

#define RX_HV_HDCP_ENGINE_TOP2_REG_E0_struct                             rs_rx_hv_hdcp_engine_top2_reg_e0

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_e0  rs_rx_hv_hdcp_engine_top2_reg_e0;
struct _rs_rx_hv_hdcp_engine_top2_reg_e0 {
    unsigned int reg_decrypt_message_05                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_e0(val) ((rs_rx_hv_hdcp_engine_top2_reg_e0*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_E4                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xE4)

#define RX_HV_HDCP_ENGINE_TOP2_REG_E4_struct                             rs_rx_hv_hdcp_engine_top2_reg_e4

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_e4  rs_rx_hv_hdcp_engine_top2_reg_e4;
struct _rs_rx_hv_hdcp_engine_top2_reg_e4 {
    unsigned int reg_decrypt_message_04                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_e4(val) ((rs_rx_hv_hdcp_engine_top2_reg_e4*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_E8                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xE8)

#define RX_HV_HDCP_ENGINE_TOP2_REG_E8_struct                             rs_rx_hv_hdcp_engine_top2_reg_e8

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_e8  rs_rx_hv_hdcp_engine_top2_reg_e8;
struct _rs_rx_hv_hdcp_engine_top2_reg_e8 {
    unsigned int reg_decrypt_message_03                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_e8(val) ((rs_rx_hv_hdcp_engine_top2_reg_e8*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_EC                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xEC)

#define RX_HV_HDCP_ENGINE_TOP2_REG_EC_struct                             rs_rx_hv_hdcp_engine_top2_reg_ec

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_ec  rs_rx_hv_hdcp_engine_top2_reg_ec;
struct _rs_rx_hv_hdcp_engine_top2_reg_ec {
    unsigned int reg_decrypt_message_02                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_ec(val) ((rs_rx_hv_hdcp_engine_top2_reg_ec*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_F0                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xF0)

#define RX_HV_HDCP_ENGINE_TOP2_REG_F0_struct                             rs_rx_hv_hdcp_engine_top2_reg_f0

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_f0  rs_rx_hv_hdcp_engine_top2_reg_f0;
struct _rs_rx_hv_hdcp_engine_top2_reg_f0 {
    unsigned int reg_decrypt_message_01                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_f0(val) ((rs_rx_hv_hdcp_engine_top2_reg_f0*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_F4                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xF4)

#define RX_HV_HDCP_ENGINE_TOP2_REG_F4_struct                             rs_rx_hv_hdcp_engine_top2_reg_f4

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_f4  rs_rx_hv_hdcp_engine_top2_reg_f4;
struct _rs_rx_hv_hdcp_engine_top2_reg_f4 {
    unsigned int reg_decrypt_message_00                     :32;
};
#define rx_hv_hdcp_engine_top2_reg_f4(val) ((rs_rx_hv_hdcp_engine_top2_reg_f4*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_F8                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xF8)

#define RX_HV_HDCP_ENGINE_TOP2_REG_F8_struct                             rs_rx_hv_hdcp_engine_top2_reg_f8

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_f8  rs_rx_hv_hdcp_engine_top2_reg_f8;
struct _rs_rx_hv_hdcp_engine_top2_reg_f8 {
    unsigned int reg_decrypt_start                          : 1;
    unsigned int reserved                                   :31;
};
#define rx_hv_hdcp_engine_top2_reg_f8(val) ((rs_rx_hv_hdcp_engine_top2_reg_f8*)&(val))



#define RX_HV_HDCP_ENGINE_TOP2_REG_FC                                    (HV_HV_HDCP_ENGINE_TOP2_REG_BASE_ADDRESS + 0xFC)

#define RX_HV_HDCP_ENGINE_TOP2_REG_FC_struct                             rs_rx_hv_hdcp_engine_top2_reg_fc

typedef struct _rs_rx_hv_hdcp_engine_top2_reg_fc  rs_rx_hv_hdcp_engine_top2_reg_fc;
struct _rs_rx_hv_hdcp_engine_top2_reg_fc {
    unsigned int regr_decrypt_status                        : 1;
    unsigned int reserved                                   :31;
};
#define rx_hv_hdcp_engine_top2_reg_fc(val) ((rs_rx_hv_hdcp_engine_top2_reg_fc*)&(val))



#endif