/**
 * @file COST_EDP_SG2701G03_3_QHD180.h
 * @brief Header file of Panel Param.
 *
 * @verbatim
 * ==============================================================================
 *                        ##### How to use #####
 * ==============================================================================
 *
 *
 @ endverbatim
 *
 * @author HiView SoC Software Team
 * @version 0.0.1
 * @date 2022-08-26
 */

#ifndef _COST_EDP_SG2701G03_3_QHD180_H_
#define _COST_EDP_SG2701G03_3_QHD180_H_

/*Panel common*/
#define PANEL_NAME                      "COST_EDP_SG2701G03_3_QHD180"

/* QHD attribute */
#define PANEL_H_TOTAL_TYP                  2640
#define PANEL_H_TOTAL_MAX                  2700
#define PANEL_H_TOTAL_MIN                  2640
#define PANEL_V_TOTAL_TYP                  1475
#define PANEL_V_TOTAL_MAX                  5532
#define PANEL_V_TOTAL_MIN                  1470
#define PANEL_H_ACTIVE                     2560
#define PANEL_V_ACTIVE                     1440
#define PANEL_FRAME_RATE_TYP               60
#define PANEL_FRAME_RATE_MAX               180
#define PANEL_FRAME_RATE_MIN               48
#define PANEL_PIXEL_CLOCK_TYP              234000  /*KHZ*/
#define PANEL_PIXEL_CLOCK_MAX              716000  /*KHZ*/
#define PANEL_PIXEL_CLOCK_MIN              145000  /*KHZ*/
#define PANEL_H_SYNC_WIDTH                 16
#define PANEL_V_SYNC_WIDTH                 4
#define PANEL_H_SYNC_BACK_PORCH            126
#define PANEL_V_SYNC_BACK_PORCH            32

#define PANEL_COLOR_DEPTH                  8
#define PANEL_LANE_NUM                     4
#define PANEL_PORT_NUM                     1

/* EDP attribute */
#define PANEL_LANE_RATE                    20  /*for EDP(6:1.62Gbps 10:2.7Gbps 20 5.4Gbps)*/

/* Process */
#define PANEL_POWER_ON_TIME                 800                         /*Panel上电*/
#define PANEL_DATA_ON_TIME                  200                         /*打开data*/
#define PANEL_BLK_ON_TIME                   600                         /*开背光*/
#define PANEL_BLK_OFF_TIME                  5                           /*关闭data*/
#define PANEL_DATA_OF_TIME                  10                          /*关闭背光*/
#define PANEL_POWER_OFF_TIME                10                          /*Panel下电*/
#define PANEL_KTX_PLL_LOCK_TIME             210                         /*KTX PLL LOCK*/
#define PANEL_IDLE_PATTERN_TIME             0                           /*发送idle pattern*/

/* SSC */
#define PANEL_SSC_EN                        0
#define PANEL_SSC_FREQ                      50       /*0-100(k)*/
#define PANEL_SSC_FRAC                      2        /*0-30(0%-3%)*/

#define PANEL_EDP_HPD0_SOFT_MODE            0  /*软件模式（强制HPD模式）, 2表示软件模式开并拉低，3表示软件模式开并拉高，0表示硬件模式*/
#define PANEL_EDP_HPD1_SOFT_MODE            0  /*软件模式（强制HPD模式）, 2表示软件模式开并拉低，3表示软件模式开并拉高，0表示硬件模式*/

/* PHY MUX attribute */
#define PANEL_EDP_AUX0_PN_SWAP_EN           0
#define PANEL_EDP_AUX1_PN_SWAP_EN           0

#define PANEL_PHY0_MUX_EN                   0
#define PANEL_PHY0_0_MUX_SEL                0
#define PANEL_PHY0_1_MUX_SEL                1
#define PANEL_PHY0_2_MUX_SEL                2
#define PANEL_PHY0_3_MUX_SEL                3
#define PANEL_PHY0_LANE0_PN_SWAP            0
#define PANEL_PHY0_LANE1_PN_SWAP            0
#define PANEL_PHY0_LANE2_PN_SWAP            0
#define PANEL_PHY0_LANE3_PN_SWAP            0

#define PANEL_PHY1_MUX_EN                   1
#define PANEL_PHY1_0_MUX_SEL                0
#define PANEL_PHY1_1_MUX_SEL                1
#define PANEL_PHY1_2_MUX_SEL                2
#define PANEL_PHY1_3_MUX_SEL                3
#define PANEL_PHY1_LANE0_PN_SWAP            1
#define PANEL_PHY1_LANE1_PN_SWAP            1
#define PANEL_PHY1_LANE2_PN_SWAP            1
#define PANEL_PHY1_LANE3_PN_SWAP            1

#define PANEL_PHY2_MUX_EN                   0
#define PANEL_PHY2_0_MUX_SEL                0
#define PANEL_PHY2_1_MUX_SEL                1
#define PANEL_PHY2_2_MUX_SEL                2
#define PANEL_PHY2_3_MUX_SEL                3
#define PANEL_PHY2_LANE0_PN_SWAP            0
#define PANEL_PHY2_LANE1_PN_SWAP            0
#define PANEL_PHY2_LANE2_PN_SWAP            0
#define PANEL_PHY2_LANE3_PN_SWAP            0

#endif
