/**
 * @file hv_comm_Define.h
 * @brief Header file of mute module.
 *
 * @verbatim
 * ==============================================================================
 *                        ##### How to use #####
 * ==============================================================================
 *
 * @endverbatim
 *
 * @author HiView SoC Software Team
 * @version 1.0.0
 * @date 2022-08-23
 */

#ifndef __SDK_COMMON_COMMON_H__
#define __SDK_COMMON_COMMON_H__

#define HV_ENABLE                            1
#define HV_DISABLE                           0
#define HV_FALSE                             0
#define HV_TRUE                              1
#define HV_SUCCESS                           0
#define HV_FAILURE                           1
#define HV_CONTINUE                          2
#define HV_FINISH                            3
#define HV_TIMEOUT                           4
#define HV_BUSY                              5
#define HV_INVALID                           6
#define HV_NOREADY                           7
#define HV_ON                                1
#define HV_OFF                               0
#define HV_SET                               1
#define HV_RESET                             0

#ifdef _cplusplus
    #define NULL                             0
#else
    #define NULL                             ((void *)0)
#endif

#define HV_VENDOR_NAME_LEN                   8
#define HV_VENDOR_DESCRIP_LEN                16

#define HV_EDID_BLOCK_DATA_SIZE              128
#define HV_EDID_SEGMENT_DATA_SIZE            256
#define HV_EDID_CTA_BLOCK_TAG                0x2

#define HV_HDCP_1X_SIZE_BKSV                 0x05   /**< Bksv Size          */
#define HV_HDCP_1X_SIZE_DKS_BYTE             280    /**< Device Key Set Size  */
#define HV_HDCP_2X_RX_LC128_SIZE             16     /** Lc128 global constant size in bytes */
#define HV_HDCP_2X_RX_CERT_SIZE              522    /** DCP certificate size in bytes */
#define HV_HDCP_2X_RX_PRIVATEKEY_SIZE        320    /** RSA private key size (64*5) in bytes */

#define HV_ATTR_ISR_SECTION

#define HV_PANEL_NAME_BYTE_MAX              (40)
#define CM_SET_HUE  (0)
#define CM_SET_SAT  (1)
#define CM_SET_LUM  (2)

#define HV_DP_VER14                        0x14         /* DPCD version 1.4 */
#define HV_DP_VER13                        0x13         /* DPCD/SDP version 1.3 */
#define HV_DP_VER12                        0x12         /* DPCD/SDP version 1.2 */
#define HV_DP_VER11                        0x11         /* DPCD/SDP version 1.1 */

typedef enum _ChannelFlashConfigIndex
{
    CHANNEL_FLASH_PORT_INDEX,
    CHANNEL_FLASH_MAGNIFY_SW,
    CHANNEL_FLASH_PXP_MODE,
}ChannelFlashConfigIndex;

typedef enum _LinkPortIndex
{
    LINK_PORT_INDEX_HDMI_RX0,
    LINK_PORT_INDEX_HDMI_RX1,
    LINK_PORT_INDEX_DP_RX0,
    LINK_PORT_INDEX_DP_RX1,
    LINK_PORT_INDEX_INVALID,
}LinkPortIndex;

typedef enum _EdpTxPortIndex
{
    EDP_TX_PROT_INDEX0 = 0,
    EDP_TX_PROT_INDEX1 = 1,
}EdpTxPortIndex;

typedef enum _EdpAuxPortIndex
{
    EDP_AUX_PROT_INDEX0 = 0,
    EDP_AUX_PROT_INDEX1 = 1,
}EdpAuxPortIndex;

typedef enum _EdpHpdPortIndex
{
    EDP_HPD_PROT_INDEX0 = 0,
    EDP_HPD_PROT_INDEX1 = 1,
}EdpHpdPortIndex;

typedef enum _MprtType
{
    MPRT_PWM_CLOSE = 0,
    MPRT_PWM_ENABLE,
    MPRT_PWM_VRR_ENABLE,
}MprtType;

typedef enum _VendorType
{
    VendorType_UnKnown,
    VendorType_HDMI_14b,
    VendorType_HDMI_FORUM,      /* VRR */
    VendorType_AMD,             /* FreeSync */
    VendorType_AMD_AdaptSync,   /* AdaptSync */
    VendorType_NVIDIA,          /* G-Sync */
    VendorType_Num
}VendorType;

/* 顺序跟数字是按照协议排序，如果需要修改需要Re-View HDMI & DP VideoColorParam */
typedef enum _ColorFormatType
{
    ColorFormatType_RGB      = 0x00,
    ColorFormatType_YCbCr422 = 0x01,
    ColorFormatType_YCbCr444 = 0x02,
    ColorFormatType_YCbCr420 = 0x03,
    ColorFormatType_IDODefined,
    ColorFormatType_Reserved
}ColorFormatType;

typedef enum _PicAspRatioType
{
    PicAspRatioType_Nodata      = 0x00,
    PicAspRatioType_4_3         = 0x01,
    PicAspRatioType_16_9        = 0x02,
    PicAspRatioType_Reserved
}PicAspRatioType;


/* 顺序跟数字是按照协议排序，如果需要修改需要Re-View HDMI & DP VideoColorParam */
typedef enum _ColorSpaceType
{
    ColorSpaceType_SRGB           = 0,
    ColorSpaceType_BT601          = 1,
    ColorSpaceType_BT709          = 2,
    ColorSpaceType_XV_YCC_601     = 0x18,
    ColorSpaceType_XV_YCC_709     = 0x19,
    ColorSpaceType_S_YCC_601      = 0x1A,
    ColorSpaceType_OP_YCC_601     = 0x1B,
    ColorSpaceType_OP_RGB         = 0x1C,
    ColorSpaceType_BT2020_cYCC    = 0x1D,
    ColorSpaceType_BT2020_RGB     = 0x1E,
    ColorSpaceType_BT2020_YCC     = 0x1F,
    ColorSpaceType_ST2113_P3D65   = 0x7C,
    ColorSpaceType_ST2113_P3DCI   = 0x7D,
    ColorSpaceType_BT2100_ICTCP   = 0x7E
}ColorSpaceType;

/* 顺序跟数字是按照协议排序，如果需要修改需要Re-View HDMI & DP VideoColorParam */
typedef enum _ColorDepthType
{
    ColorDepthType_6Bit = 3,
    ColorDepthType_8Bit = 4,
    ColorDepthType_10Bit,
    ColorDepthType_12Bit,
    ColorDepthType_16Bit,
    ColorDepthType_NUM,
    ColorDepthType_Invalid
}ColorDepthType;

/* RGB 跟 YCC 对应的Limited 跟 FUll 正好错位，处理需要注意:
 * 下面是YCC的协议定义
     typedef enum _YccColorRangeType
     {
         YccColorRangeType_Limited_Range = 0,
         YccColorRangeType_Full_Range,
         YccColorRangeType_Range_Reserved
     }YccColorRangeType;
 */
typedef enum _ColorRangeType
{
    ColorRangeType_Default = 0,
    ColorRangeType_Limited_Range,
    ColorRangeType_Full_Range,
    ColorRangeType_Range_Reserved
}ColorRangeType;

/* 顺序跟数字是按照协议排序，如果需要修改需要Re-View HDMI & DP VideoColorParam */
typedef enum _CorlorContentType
{
    CorlorContentType_NoDef,
    CorlorContentType_Graphics,
    CorlorContentType_Photo,
    CorlorContentType_Cinema,
    CorlorContentType_Game
}CorlorContentType;

typedef enum _HDRSwitch
{
    HDR_Switch_AutoOff = 0,
    HDR_Switch_AutoOn,
    HDR_Switch_ForceOff,
    HDR_Switch_Num
}HDRSwitch;

typedef enum _HDREOTF
{
    SDR_TYPE,
    HDR_TYPE,
    HDR10_TYPE,
    HLG_TYPE,
    HDR_TYPE_NUM
}HDREOTF;

typedef enum _GCMODE
{
    GC_DEFAULT,
    GC_DYNAMICCONTRAST,
    GC_DARKSTABLIZER,
}GCMODE;

typedef enum _GamutType
{
    PQ_GAMUT_SRGB,
    PQ_GAMUT_709,
    PQ_GAMUT_P3,
    PQ_GAMUT_NATIVE,
    PQ_GAMUT_ADOBE,
    PQ_GAMUT_DISPLAY_P3,
    PQ_GAMUT_2020,
    PQ_GAMUT_NUM,
}PQGamutType;
typedef enum _UserColorSpace
{
    PQ_COLOR_SPACE_RGB,
    PQ_COLOR_SPACE_YUV,
     PQ_COLOR_SPACE_AUTO,
PQ_COLOR_SPACE_NUM,
}PQColorSpace;

typedef enum _UserBrightRange
{
    PQ_BRIGHT_RANGE_AUTO,
    PQ_BRIGHT_RANGE_FULL,
    PQ_BRIGHT_RANGE_LIMIT,
    PQ_BRIGHT_RANGE_NUM,
}PQBrightRange;

typedef enum _PQGammaType{
    PQ_GAMMA1_6,
    PQ_GAMMA1_8,
    PQ_GAMMA2_0,
    PQ_GAMMA2_2,
    PQ_GAMMA2_4,
    PQ_GAMMA2_6,
    PQ_GAMMA2_8,
    PQ_GAMMA_SRGB,
    PQ_GAMMA_1886,
    PQ_GAMMA_NUM,
}PQGammaType;
typedef enum _PQOdLevel{
    PQ_OD_OFF,
    PQ_OD_FAST,
    PQ_OD_FASTER,
    PQ_OD_FASTEST,
    PQ_OD_ULTRAFAST,
    PQ_OD_NUM,
}PQOdLevel;
typedef enum _PQHdrSwitch{
    PQ_HDR_OFF,
    PQ_HDR_ON,
    PQ_HDR_MAX,
}PQHdrSwitch;

typedef enum _PQColorTemp{
    PQ_COLOR_TEMP_COOL,
    PQ_COLOR_TEMP_STANDARD,
    PQ_COLOR_TEMP_WARM,
    PQ_COLOR_TEMP_CUSTOM,
    PQ_COLOR_TEMP_LOWBLUE,
    PQ_COLOR_TEMP_SRGB,
    PQ_COLOR_TEMP_BLUSH,
    PQ_COLOR_TEMP_MAX,
}PQColorTemp;

typedef enum _PQCALLBACKMODE
{
    PQCALLBACK_VSYNC,
    PQCALLBACK_TIMECHANGED,
    PQCALLBACK_RATIOMAPPING,
    PQCALLBACK_VSYNC_DPU,
    PQCALLBACK_HSYNC1,
    PQCALLBACK_HSYNC2,
    PQCALLBACK_HSYNC3,
    PQCALLBACK_HSYNC4,
    PQCALLBACK_HSYNC5,
    PQCALLBACK_HSYNC6,
    PQCALLBACK_HSYNC7,
    PQCALLBACK_HSYNC8,
}PQCALLBACKMODE;

typedef enum _PQ_LDCMODE
{
    PQ_LDCMODE_OFF,
    PQ_LDCMODE_LOW,
    PQ_LDCMODE_MEDIUM,
    PQ_LDCMODE_HIGH,
}PQ_LDCMODE;


typedef enum _CmColorType
{
    PQ_CM_R =  0,
    PQ_CM_G =  1,
    PQ_CM_B =  2,
    PQ_CM_C =  3,
    PQ_CM_Y =  4,
    PQ_CM_M =  5,
    PQ_CM_SKIN =  6,
    PQ_CM_MAX
}CmColorType;


typedef enum _VideoRatio
{
    OUTPUTRATIO_AUTO,
    OUTPUTRATIO_16TO9,
    OUTPUTRATIO_4TO3,
    OUTPUTRATIO_21TO9,
    OUTPUTRATIO_5TO3,
    OUTPUTRATIO_1TO1,
    OUTPUTRATIO_16TO10,
    OUTPUTRATIO_5TO4,
    OUTPUTRATIO_FULL,
    /* 如果图像比例和屏幕大小无关在OUTPUTRATIO_17INCH_4TO3前面添加枚举 
    否则在后面添加枚举 */
    OUTPUTRATIO_17INCH_4TO3,
    OUTPUTRATIO_19INCH_4TO3,
    OUTPUTRATIO_19INCH_5TO4,
    OUTPUTRATIO_19INCH_16TO10,
    OUTPUTRATIO_21P5INCH_16TO9,
    OUTPUTRATIO_22INCH_16TO10,
    OUTPUTRATIO_23INCH_16TO9,
    OUTPUTRATIO_23P6INCH_16TO9,
    OUTPUTRATIO_24INCH_16TO9,
    OUTPUTRATIO_MAX
}VideoRatio;

typedef struct _PanelInchParam{
    USHORT16 usPanelInchW;
    USHORT16 usPanelInchH;
}PanelInchParam;

typedef struct _RatioParam{
    USHORT16 usRatioW;
    USHORT16 usRatioH;
}RatioParam;

typedef struct _VideoColorParam
{
    ColorFormatType     eClrFormat;
    ColorSpaceType      eClrSpace;
    ColorDepthType      eClrDepth;
    ColorRangeType      eClrRange;
    CorlorContentType   eContent;
    UCHAR8              ucPixelRepe;
}VideoColorParam;

typedef enum _DisplayDataMode
{
    DIS_TIMING_MODE_FRAMESYNC,
    DIS_TIMING_MODE_FREE_RUN,
    DIS_TIMING_MODE_TCON,
    DIS_TIMING_MODE_FREE_RUN_MODE1,
}DisplayTimingMode;

typedef enum _DisplayDataPathMode
{
    DATA_PATH_MODE_FRAMESYNC,
    DATA_PATH_MODE_THROUGH_COLORFORMAT_RX,
    DATA_PATH_MODE_COMPRESS_COLORFORMAT1_6_RX,
    DATA_PATH_MODE_COMPRESS_COLORFORMAT_RX,

    DATA_PATH_MODE_THROUGH_COLORFORMAT_YUV444,
    DATA_PATH_MODE_THROUGH_COLORFORMAT_YUV422,
    /*直通的YUV420占用的带宽内存 一定比压缩的YUV422多，且显示效果更差,仅辅通道才选择这种方式*/
    DATA_PATH_MODE_THROUGH_COLORFORMAT_YUV420,

    DATA_PATH_MODE_COMPRESS_COLORFORMAT_YUV444,
    DATA_PATH_MODE_COMPRESS_COLORFORMAT_YUV422,

    DATA_PATH_MODE_COMPRESS_RATIO_3_COLORFORMAT_YUV444,
    DATA_PATH_MODE_COMPRESS_RATIO_3_COLORFORMAT_YUV422,
}DisplayDataPathMode;

typedef enum _ChanelSignalState
{
    ChanelSignalState_Invalid,
    ChanelSignalState_SearchState,
    ChanelSignalState_NoSignal,
    ChanelSignalState_SignalSync,
}ChanelSignalState;

typedef enum _ChannelType
{
    CHANNEL_TYPE_MAIN = 0,
    CHANNEL_TYPE_SUB  = 1,
}ChannelType;

typedef enum _PxpMode
{
    PXP_MODE_CLOSE                = 0,
    PXP_MODE_PIP_ENABLE           = 1,
    PXP_MODE_PBP_ENABLE           = 2,
    PXP_MODE_MAGNIFY_GLASS_ENABLE = 3,
}PxpMode;

typedef enum _PipSize
{
    PIP_SIZE_SMALL                = 0,
    PIP_SIZE_MIDDLE               = 1,
    PIP_SIZE_BIG                  = 2,
}PipSize;

typedef enum _PbpSize
{
    PBP_SIZE_SMALL                = 0,
    PBP_SIZE_MIDDLE               = 1,
    PBP_SIZE_BIG                  = 2,
}PbpSize;

typedef enum _PipPos
{
    PIP_POS_LEFT_TOP             = 0,
    PIP_POS_LEFT_BOTTOM          = 1,
    PIP_POS_RIGHT_TOP            = 2,
    PIP_POS_RIGHT_BOTTOM         = 3,
}PipPos;

/*为了不使用浮点数，并且方便计算将压缩比枚举直接放大十倍*/
typedef enum _CompressRatio
{
    COMPRESS_RATIO_1                 = 10,              /*非压缩模式，压缩比可以当成1*/
    COMPRESS_RATIO_ONE_POINT_SIX     = 16,
    COMPRESS_RATIO_TWO_POINT_FIVE    = 25,
    COMPRESS_RATIO_THREE             = 30,
    COMPRESS_RATIO_FOUR              = 40,
}CompressRatio;

typedef struct _FrameBufferConfig
{
    BOOL bUseFrameBuffer;               /*false-frame sync use water buffer dont use FrameBuffer, true: other case*/
    UCHAR8  ucFrameBufferNumber;        /*framebuffer中缓存的帧数*/
    ColorFormatType  enFBColorFormat;   /*frame buffer缓存的帧中使用的颜色格式*/
    ColorDepthType   enFBColorDepth;    /*frame buffer存储的色深*/
    BOOL bUseCompress;                  /*frameBuffer 中的数据是否使用压缩模式*/
    CompressRatio  enCompressRatio;     /*压缩模式配置的压缩比*/
}FrameBufferConfig;


typedef enum _SouceInfoType
{
    SouceInfoType_UnKnown,
    SouceInfoType_DigitalSTB,
    SouceInfoType_DVDPlayer,
    SouceInfoType_DVHS,
    SouceInfoType_HDD_VideoRecorder,
    SouceInfoType_DVC,
    SouceInfoType_DSC,
    SouceInfoType_VideoCD,
    SouceInfoType_Game,
    SouceInfoType_PCGeneral,
    SouceInfoType_BluRayDisc,
    SouceInfoType_SuperAudioCD,
    SouceInfoType_HD_DVD,
    SouceInfoType_PMP,
    SouceInfoType_Reserved
}SouceInfoType;

typedef enum _HDMIFormat
{
    HDMI_FORMAT_STANDARD,
    HDMI_FORMAT_ENHANCE,
    HDMI_FORMAT_FRL_ENHANCE,
    HDMI_FORMAT_NUM
}HDMIFormat;

typedef enum _EDIDType
{
    EDID_TYPE_DEFAULT = 0,
    EDID_TYPE_DEFAULT_NOHDR,
    EDID_TYPE_TMDS,
    EDID_TYPE_TMDS_VRR,
    EDID_TYPE_FRL,
    EDID_TYPE_FRL_VRR,
    EDID_TYPE_FRL_ENHANCED,
    EDID_TYPE_FRL_ENHANCED_VRR,
    EDID_TYPE_PBP,
    EDID_TYPE_PIP,
    EDID_TYPE_TMDS_1_4,
    EDID_TYPE_ADAPTIVESYNC,
    EDID_TYPE_ADAPTIVESYNC_NOHDR,
    EDID_TYPE_USR_DEF,
    EDID_TYPE_PRO_ESPORT,
    EDID_TYPE_END,
    EDID_TYPE_CLOSE_HDR = BIT_5, /* Only Used for HDMI */
    EDID_TYPE_INVALID = 0xFF,
}EDIDType;

//DTC特殊处理原因
typedef enum _SpecResType
{
    SPECIAL_RESOLUTION_NORMAL,            
    SPECIAL_RESOLUTION_UNSUPPORT,
    SPECIAL_RESOLUTION_FRAME_SYNC,
    SPECIAL_RESOLUTION_FRC,
    SPECIAL_RESOLUTION_FRC_444,
    SPECIAL_RESOLUTION_FRC_422,
    SPECIAL_RESOLUTION_FRC_420,
    SPECIAL_RESOLUTION_DTC_LINE_RATE,
}SpecResType;

typedef struct _VideoTimingParam
{
    USHORT16 usHTotal;
    USHORT16 usHFProch;
    USHORT16 usHSyncW;
    USHORT16 usHBProch;
    USHORT16 usHActive;
    USHORT16 usHPol;
    USHORT16 usVTotal;
    USHORT16 usVFProch;
    USHORT16 usVSyncW;
    USHORT16 usVBProch;
    USHORT16 usVActive;
    USHORT16 usVPol;
    USHORT16 usFrameRate;
    BOOL     bInterlacedMode;       /* Interlace mode or not */
    BOOL     bIsEnterALLM;          /* ALLM Mode Open or Closed */
    BOOL     bIsNoSignal;   /* Ture：表示HDMI未解析出信号，无法SyncOK ,提示"No Signal"； 
                               False：表示HDMI可以正确识别信号，但是无法解析出Timing 及关键参数 AVI etc，提示"Not Support".
                               Only 返回 HV_FAILURE 时候该字段有意义 */
    UINT32   uiFreqKHz;             /* RX Received Pixel Clock KHz */
    UINT32   uiHFreqHz;             /*horizontal frequency*/
    UINT32   uiRxDpllSetFreqKHz;    /* RX dpll set Pixel Clock KHz: 0表示未配置，非0表示已经配置 */
    FLOAT32  fFrameRate;            /* Detail of the Frame rate Detected */
}VideoTimingParam;

typedef enum _DynamicColorWin
{
    MAIN_COLOR_WIN = 0,
    DYNAMIC_COLOR_WIN = 1,
}DynamicColorWin;

typedef struct _AudioTimingParam
{
    UINT32   uiCTS;
    UINT32   uiN;
    UINT32   uiMaud;
    UINT32   uiNaud;
}AudioTimingParam;

typedef struct _AmdSpdInfoParam
{
    BOOL        bFreeSyncSupported;
    BOOL        bFreeSyncEnabled;   /* Sync Should Prapared to Entered FreeSync */
    BOOL        bFreeSyncActive;    /* Entered the Frame changed status */
    BOOL        bNativeColorSpaceActive;
    BOOL        bLocalDimmingDisabled; /* 1: disabled Local Dimming. 0: enable the Local Dimming */
    BOOL        bGamma26EOTFActive;
    BOOL        bGamma22EOTFActive;
    BOOL        bBT709EOTFActive;
    BOOL        bSRGBEOTFActive;
    UCHAR8      ucVersion;
    UCHAR8      ucFreeSyncMinReFresh;
    UCHAR8      ucFreeSyncMaxReFresh;
    UCHAR8      ucBrightneesControl;
}AmdSpdInfoParam;

typedef struct _NvidiaVendSpecInfoParam
{
    UCHAR8          ucModeName[HV_VENDOR_DESCRIP_LEN];
    SouceInfoType   eSourceInfoCode;
}NvidiaVendSpecInfoParam;

typedef struct _SourceProductDesc
{
    UCHAR8          uclVendorName[HV_VENDOR_NAME_LEN];
    UCHAR8          uclVendorDescript[HV_VENDOR_DESCRIP_LEN];
    SouceInfoType   eSourceInfoCode;
}SourceProductDesc;

typedef enum _VfrVRRType
{
    VfrVRRType_HDMIMDGaming,
    VfrVRRType_HDMIMDGamingFVA,
    VfrVRRType_HDMIMDQMS,
    VfrVRRType_HDMIMDNotSupport
}VfrVRRType;

typedef struct _VRRMDContent
{
    VfrVRRType  eVfrVrrType;
    BOOL        bVRREnable;      /* Including All VfrVRRType: bVRRGamingEnable and bVRRQMSEnable */
    UCHAR8      ucFVAFactorM1;   /* VfrVRRType_HDMIMDGamingFVA Only */
    UCHAR8      ucBase_Vfront;
    UCHAR8      ucNextTFR;       /* VfrVRRType_HDMIMDQMS Only */
    USHORT16    usBaseRefreshRate;
}VRRMDContent;

typedef struct _VRRInfoParam
{
    BOOL        bVRREnable;            /* HV_TRUE:Source Entered VRR; HV_HV_FALSE:Source Out Of VRR */
    VendorType  eVendor;               /* Type == VendorType_UnKnown±íÊ¾·ÇVRR±¨ÎÄ */
    union
    {
        AmdSpdInfoParam         stAmdSpdInfPara;
        NvidiaVendSpecInfoParam stNvidiaVSIPara;
        VRRMDContent            stCommVRRinMD;    /* HF-VRR with EMP */
    } uvsi;
}VRRInfoParam;

typedef struct _HDRParam
{
    HDREOTF xType;
    UCHAR8  ucMetaID;
    USHORT16 usPrimX0;
    USHORT16 usPrimY0;
    USHORT16 usPrimX1;
    USHORT16 usPrimY1;
    USHORT16 usPrimX2;
    USHORT16 usPrimY2;
    USHORT16 usWhtX;
    USHORT16 usWhtY;
    USHORT16 usMaxLum;
    USHORT16 usMinLum;
    USHORT16 usMaxCntn;
    USHORT16 usMaxFrmAvg;
}HDRParam;

typedef struct _FreesyncInfo
{
    UCHAR8 ucType; /*0: none 1: DRR 2:DRR+HDR*/
    UCHAR8 ucSupported;
    UCHAR8 ucEnabled;
    UCHAR8 ucActive;
    UCHAR8 ucMinRate;
    UCHAR8 ucMaxRate;
    UCHAR8 ucNative;
    UCHAR8 ucLDDisable;
    UCHAR8 ucGamma2p2EOTF;
}FreesyncInfo;

typedef enum _AudioSampleRate
{
    E_RATE_REFERENCE_STREAM_HEADER = 0,
    E_32K                          = 1,
    E_44P1K                        = 2,
    E_48K                          = 3,
    E_88P2K                        = 4,
    E_96K                          = 5,
    E_176P4K                       = 6,
    E_192K                         = 7,
    E_768K                         = 8
}AudioSampleRate;

typedef enum _AudioSampleDepth
{
    E_DEPTH_REF_STREAM_HEADER      = 0,
    E_AUD_16BIT                    = 1,
    E_AUD_20BIT                    = 2,
    E_AUD_24BIT                    = 3
}AudioSampleDepth;

typedef enum _AudioCodingType
{
    E_AUD_TYPE_REF_STREAM_HEAD     = 0,
    E_AUD_TYPE_L_PCM               = 1,
    E_AUD_TYPE_AC_3                = 2,
    E_AUD_TYPE_MPEG_1              = 3,
    E_AUD_TYPE_MP3                 = 4,
    E_AUD_TYPE_MPEG_2              = 5,
    E_AUD_TYPE_AAC_LC              = 6,
    E_AUD_TYPE_DTS_TS_102          = 7,
    E_AUD_TYPE_ATRAC               = 8,
    E_AUD_TYPE_ONE_BIT_AUD         = 9,
    E_AUD_TYPE_ENHENCE_AC_3        = 10,
    E_AUD_TYPE_DTS_HD_UHD          = 11,
    E_AUD_TYPE_MAT                 = 12,
    E_AUD_TYPE_DTS_IEC             = 13,
    E_AUD_TYPE_WMA_PRO             = 14,
    E_AUD_TYPE_REF_ACET            = 15
}AudioCodingType;

typedef struct _AudioPara
{
    AudioSampleRate  enSampleRate;
    AudioSampleDepth enSampleDepth;
    AudioCodingType  enCodingType;
    BOOL             bAudClkStable;
    UCHAR8           ucChnlCnt;
    UINT32           uiCtsValue;
    UINT32           uiNValue;
}AudioPara;

typedef struct _DpuInterruptDefine
{
    /*ldg_int*/
    UINT32 uiKspiVs             :1;
    UINT32 uiKspiTconVsL        :1;
    UINT32 uiKspiTconVsH        :1;
    UINT32 uiLdgTblGo           :1;
    UINT32 uiKspiIntRdma        :1;
    UINT32 uiKspiIntWbuf        :1;

    /*cap_int*/
    UINT32 uiMainVdmTblCaGo     :1;
    UINT32 uiMainSpchVendIrq    :1;
    UINT32 uiSubVdmTblCaGo      :1;
    UINT32 uiSubSpchVendIrq     :1;

    /*srp_int*/
    UINT32 uiSrTblGo            :1;
    UINT32 uiSrCtMhiHibEndIrq   :1;
    UINT32 uiSrCtMhiHiaEndIrq   :1;
}DpuInterruptDefine; 

typedef struct _DtcInterruptDefine
{
    UINT32 uiMainFrcAbnormConflict          :1;
    UINT32 uiSubFrcAbnormConflict           :1;
    UINT32 uiBufferOverflow                 :1;
    UINT32 uiBufferUnderflow                :1;
    UINT32 uiBufferHigh                     :15;
    UINT32 uiBufferLow                      :15;
}DtcInterruptDefine; 

typedef enum _DisplayInterruptType
{
    DisplayInterruptType_HsIp0,
    DisplayInterruptType_HsIp1,
    DisplayInterruptType_HsDisplay,
    DisplayInterruptType_Dpu,
    DisplayInterruptType_Dtc,
    DisplayInterruptType_Kspi,
    DisplayInterruptType_Mute0,
    DisplayInterruptType_Mute1,
}DisplayInterruptType;

typedef struct _HsIpInterruptDefine
{
    UINT32 uiHsIntSource0          :1;
    UINT32 uiHsIntSource1          :1;
    UINT32 uiHsIntSource2          :1;
    UINT32 uiHsIntSource3          :1;
    UINT32 uiHsIntSource4          :1;
    UINT32 uiHsIntSource5          :1;
    UINT32 uiHsIntSource6          :1;
    UINT32 uiHsIntSource7          :1;
    UINT32 uiHsIntSource8          :1;
    UINT32 uiHsIntSource9          :1;
    UINT32 uiHsIntSource10         :1;
    UINT32 uiHsIntSource11         :1;
    UINT32 uiHsIntSource12         :1;
    UINT32 uiHsIntSource13         :1;
    UINT32 uiHsIntSource14         :1;
    UINT32 uiHsIntSource15         :1;
    UINT32 uiHsIntSource16         :1;
    UINT32 uiHsIntSource17         :1;
    UINT32 uiHsIntSource18         :1;
    UINT32 uiHsIntSource19         :1;
    UINT32 uiHsIntSource20         :1;
    UINT32 uiHsIntSource21         :1;
    UINT32 uiHsIntSource22         :1;
    UINT32 uiHsIntSource23         :1;
}HsIpInterruptDefine;

typedef struct _DisplayInterrupt
{
    HsIpInterruptDefine     stHsIp0;
    HsIpInterruptDefine     stHsIp1;
    HsIpInterruptDefine     stHsDisplay;
    DpuInterruptDefine      stDpuInterrupt;
    DtcInterruptDefine      stDtcInterrupt;
    UINT32                  uiInterruptCount;
    DisplayInterruptType    enInterruptType;
}DisplayInterrupt;

typedef struct _EDPTXInterruptDefine
{
    UINT32 uiHpdEvt;
    UINT32 uiHpdIrq;
    UINT32 uiAuxTransDone;
    UINT32 uiRegEdptxSwIrq;
    UINT32 uiHpdPlug;
}EdpTxInterruptDefine; 

typedef void (*HV_MW_VSYNC_CALLBACK)(VOID);

typedef struct _VideoConfigParams
{
    UINT32                      uiInputVideoWidth;          /*当前通道输入Hactive*/
    UINT32                      uiInputVideoHight;          /*当前通道输入Vactive*/
    UINT32                      uiInputVideoHtotal;         /*当前通道输入H total*/
    UINT32                      uiInputVideoVtotal;         /*当前通道输入V total*/
    UINT32                      uiInputFrameRate;           /*当前通道输入帧率*/
    USHORT16                    usInputCutHsize;            /*cap in cut h size*/
    USHORT16                    usInputCutVsize;            /*cap in cut v size*/
    //SpecResType                 enSpecResType;            /*特殊处理timing类型*/

    UINT32                      uiDdrOrWtrVideoWidth;        /*当前通道Hactive size in frame buffer or waterbuffer*/
    UINT32                      uiDdrOrWtrVideoHight;        /*当前通道Vactive size in frame buffer or waterbuffer*/

    UINT32                      uiOutputVideoWidth;          /*当前通道输出Hactive*/
    UINT32                      uiOutputVideoHight;          /*当前通道输出Vactive*/
    UINT32                      uiOutputVideoHtotal;         /*当前通道输出H total*/
    UINT32                      uiOutputVideoVtotal;         /*当前通道输出V total*/
    UINT32                      uiOutputFrameRate;           /*当前通道输出帧率*/
    UINT32                      uiDtcTxHtotal;               /*framesync模式下设定的DTC TX htotal*/
    
    USHORT16                    usVideoPanelHactive;         /*panel 参数*/
    USHORT16                    usVideoPanelVactive;         /*panel 参数*/
    USHORT16                    usVideoPanelHtotalType;      /*panel 参数*/
    USHORT16                    usVideoPanelVtotalType;      /*panel 参数*/
    USHORT16                    usPanelInchWidth;            /*panel尺寸大小（mm）*/
    USHORT16                    usPanelInchHeight;           /*panel尺寸大小（mm）*/

    UINT32                      uiRxDpllFreq;               /*当前配置的RXD时钟频率，kHZ*/
    UINT32                      uiDisplayPllFreq;           /*当前配置的Display时钟频率，kHZ*/
    UINT32                      uiDestDisplayPllFreq;       /*Display目标时钟频率，kHZ*/
    UINT32                      uiPtcdPreDiv;               /*当前配置的PTCD PLL pre divider*/
    UINT32                      uiPtcdPostDiv;              /*当前配置的PTCD PLL post divider*/
    UINT32                      uiPtcdFBDivInt;             /*当前配置的PTCD PLL      fb int divider*/
    UINT32                      uiPtcdFBDivFrac;            /*当前配置的PTCD PLL      fb frac divider*/

    PxpMode                     enPxpMode;                  /* 0-close 1-PIP 2-PBP*/
    UINT32                      uiSubChannelUsedMemory;     /*主通道计算 内存和带宽时，预估的辅通道最大使用的内存*/
    
    BOOL                        bOsdVrrEnable;              /*OSD当前是否配置了VRR模式*/
    FrameBufferConfig           stFrameBufferCfg;           /*frame buffer config*/
    DisplayTimingMode           enTimingMode;               /*当前通路选择的DTC tming类型*/
    DisplayDataPathMode         enDataPathMode;             /*当前通路配置模式*/

    BOOL                        bHorizontalNeedScaler;      /*cap vgsf模块水平方向需要进行scaler down*/
    BOOL                        bVerticalNeedScaler;        /*cap vgsf模块垂直方向是否需要进行scaler down*/
    ChannelType                 enChannelType;              /*通道类型*/

    BOOL                        bHflipEnable;               /*水平方向翻转功能开关 0-disable 1-enable*/
    BOOL                        bVflipEnable;               /*垂直方向翻转功能开关 0-disable 1-enable*/
    
    VideoColorParam             stColor;                    /*从RX获取到的color配置*/
    HDRParam                    stHdrParam;                 /*HDR meta data got from HDMI/DP*/
    BOOL                        bHdrSwitch;                 /*Driver HDR On/Off*/
    VRRInfoParam                stVRRInfoParam;             /*VRR info got from HDMI/DP*/

    BOOL                        bInterlacedMode;            /*RX timing是否是interlaced模式*/
    VideoRatio                  enAspectRatio;              /*画面比例*/
    BOOL                        bConfigValid;               /*表示当前此结构体变量数据是否有效；除开机及老化时，其它时间均有效*/
    
    BOOL                        bMainFakeSwitch;            /*Dcw功能开关*/
    FLOAT32                     fMainFakeRatio;             /*Dcw功能放大倍数*/
    USHORT16                    usMainFakeHsize;            /*Dcw功能放大resolution Hactive*/
    USHORT16                    usMainFakeVsize;            /*Dcw功能放大resolution Vactive*/
    USHORT16                    usMainFakePosH;             /*Dcw H position*/
    USHORT16                    usMainFakePosV;             /*Dcw V position*/
    UINT32                      uiEdpTuDataSize;            /*edp软件计算的tu*/
    UINT32                      uiMvid;                     /*edp软件计算的mvid*/

    BOOL                        bForceFrc;                  /*强制FRC模式，用于比例缩放*/
    HV_MW_VSYNC_CALLBACK        pfCallBack;
    UCHAR8 (*pfPQCallback)(PQCALLBACKMODE enMode, const VOID *pvVideoConfigParams);

}VideoConfigParams;

typedef struct _DpuDpcCapSrpParam
{
    UCHAR8      ucCaDataMode;       /*0:444 1:422 2:420*/
    UCHAR8      ucCaDataBitwidth;   /*rx input data width，6、8、10、12*/
    UCHAR8      ucCaEncPackWork;    /*0:enc,pack work;1:enc work only;2:pack work only*/
    UCHAR8      ucDecUnpackSel;     /*0:dec; 1: unpack*/
    UCHAR8      ucDataMode;         /*0:444; 1:422; 2:420*/
    UCHAR8      ucDataWidth;        /*0:6bit; 1:8bit; 2:10bit; 3:12bit*/
}DpuDpcCapSrpParam;

typedef struct _DpucScalerParam
{
    USHORT16 usHsfInize;
    USHORT16 usVsfInize;
    USHORT16 usHsfOutsize;
    USHORT16 usVsfOutsize;
    UINT32   uiHfilbase;
    UINT32   uiVfilbase;
}DpucScalerParam;

typedef struct _DpuWindowParam
{
    USHORT16    usDtcChHsta;
    USHORT16    usDtcChHend;
    USHORT16    usDtcChVsta;
    USHORT16    usDtcChVend;
    USHORT16    usBorderHstart;
    USHORT16    usBorderVstart;
    USHORT16    usBorderLength;
    USHORT16    usBorderHeight;
    BOOL        bBorderEn;
    UCHAR8      ucBorderWidth;
    UINT32      ucBborderColor;
}DpuWindowParam;

typedef struct DpuVdmConfigSettings
{
    UINT32      uiDmColStep;
    USHORT16    usDmTotalColNum;
    UCHAR8      ucDmBurstLen;
    UINT32      uiDmBurstNum;
    UCHAR8      ucDmBurstRmd;
    UINT32      uiDmLineStep;
    USHORT16    usDmTotalLineNum;
    UCHAR8      ucDmOutstanding;
    UINT32      uiDmWrStartAdr;
    UINT32      uiDmWrStartAdr0;
    UINT32      uiDmWrStartAdr1;
    UINT32      uiDmWrStartAdr2;
    UCHAR8      ucDmRdColStepDir;
    USHORT16    usDmRdColDatNum;
    UCHAR8      ucDmRdLineStepDir;
    UINT32      uiDmRdStartAdr;
    UINT32      uiDmRdStartAdr0;
    UINT32      uiDmRdStartAdr1;
    UINT32      uiDmRdStartAdr2;
}DpuVdmConfigSettings;

typedef struct _DpuDtcTopTimingParam
{
    CHAR8               ucDtcRbufClkSel;
    UINT32              uiCycleRefclkDelay;
    UINT32              uiCycleRefclkFramesyncRangeMin;
    UINT32              uiCycleRefclkFramesyncRangeMax;
    UINT32              uiCycleRefclkFramesyncRestartTh;
    USHORT16            usRxVact;
    UCHAR8              ucFrcMainBufNum;
    USHORT16            usFrcMainRdDoneTh;
    USHORT16            usFrcMainWrDoneTh;
}DpuDtcTopTimingParam;

typedef struct _DpuCapCutParam
{
    USHORT16    usCutHstart;
    USHORT16    usCutHend;
    USHORT16    usCutVstart;
    USHORT16    usCutVend;
}DpuCapCutParam;

typedef struct _MainRxFakeVideoParam
{
    FLOAT32     fMainFakeRatio;
    USHORT16    usMainFakeHsize;
    USHORT16    usMainFakeVsize;
    USHORT16    usMainFakePosH;
    USHORT16    usMainFakePosV;
}MainRxFakeVideoParam;

typedef struct _HvFactoryEdidInfo
{
    USHORT16    usHActive;
    USHORT16    usVActive;
    USHORT16    usProductCode;
    UINT32      uiSerialNum;
    USHORT16    usYear;
    UCHAR8      ucWeek;
    UCHAR8      ucFactNameLen;
    CHAR8       acFactName[3];
    UCHAR8      ucDescSnCount;
    CHAR8       acDescSn[13];
    CHAR8       acMonitorName[13];
    UCHAR8      ucVersion;
    UCHAR8      ucRevision;
    UCHAR8      ucExtFlag;
    UCHAR8      ucStorageType;          /* 0, None  1, EEPROM  2, FlashROM */
    UCHAR8      ucCheckSumCount;
    UCHAR8      aucCheckSumValue[4];
    BOOL        bCheckSumStatus;
    FLOAT32     fSreenSize;
}HvFactoryEdidInfo;

typedef struct _HvEdidInfoToOsd
{
    USHORT16    usProductCode;
    UINT32      uiSerialNum;
    USHORT16    usYear;
    UCHAR8      ucWeek;
    CHAR8       acFactName[4];
    CHAR8       acDescSn[14];
    CHAR8       acMonitorName[14];
    UCHAR8      ucVersion;
    UCHAR8      ucRevision;
    UCHAR8      ucExtFlag;
    UCHAR8      ucCheckSumCount;
    UCHAR8      aucCheckSumValue[4];
    BOOL        bCheckSumStatus;
}HvEdidInfoToOsd;

/* HDCP Define */

/************ HDCP Begin *************/
typedef enum _HdcpPortType
{
    HdcpPortType_Hdmi =0,
    HdcpPortType_DisplayPort,
    HdcpPortType_Invalid
} HdcpPortType;

typedef enum _HdmiVersion
{
    HdmiVesion_HD14,  //TMDS 1.4
    HdmiVesion_HD20,  //TMDS 2.1 & TMDS 2.0
    HdmiVesion_HD21,  //FRL 2.1
    HdmiVesion_End    //
}HdmiVersion;

typedef enum _HdcpVersion
{
    HdcpVesion_None   = 0x0,  //HDCP Not Used
    HdcpVesion_Hdcp1X = 0x1,  //HDCP 1.X
    HdcpVesion_Hdcp2X = 0x2,  //HDCP 2.X
    HdcpVesion_Invliad
}HdcpVersion;

/************HDCP Rx Role************ */
typedef enum _HdcpRole
{
    HV_HDCP_TRANSMITTER  = 0x0,
    HV_HDCP_RECEIVER     = 0x2,
    HV_HDCP_REPEATER     = 0x3
} HdcpRole;

/************HDCP Rx Role************ */
typedef enum _HdcpKeyCheckResult
{
    HV_HDCP_KEY_VALID       = 0x0,
    HV_HDCP_KEY_INVALID     = 0x1,
    HV_HDCP_KEY_DEFAULT     = 0x3,
    HV_HDCP_KEY_EMPTY       = 0x4
} HdcpKeyCheckResult;

/* HDCP Key */
typedef struct _Hdcp2xRxKey
{
    /*
     * lc128 : 128 bit 私密全局常量
     * 所有HDCP设备共享相同的全局常量
     */
    UCHAR8 aucHdcp2xRxLc128[HV_HDCP_2X_RX_LC128_SIZE]; /* 16 Bytes */

    /* 公钥证书：
     * 0 - 3072 : 3072bit，加密签名，签名方案。
     * 3072 - 3083 ：12bit，保留，全0
     * 3084 - 3087 ：4bit，保留，0x0 或者 0x1
     * 3088 - 4135 ：1048bit，kpub RSA公钥 rx（cert），
                     前1024位是模n的大端表示，后24位是公开指数e的大端表示
     * 4136 - 4175 ：40bit，接收机标识符，它的格式与HDCP1.X相同，包含20个1和20个0
     */
    UCHAR8 aucHdcp2xRxCert[HV_HDCP_2X_RX_CERT_SIZE]; /* 522 Bytes */

    /*
     * RSA私钥：
     * 
     */
    UCHAR8 aucHdcp2xRxPrivKey[HV_HDCP_2X_RX_PRIVATEKEY_SIZE]; /* 320 Bytes */
}Hdcp2xRxKey;
/*******HDCP 2.X***********************/

typedef struct _Hdcp1xRxKey
{
    /* KSV(BKsv) 一共40bit, 有20个1跟20个0组成 */
    UCHAR8 aucBksv[HV_HDCP_1X_SIZE_BKSV]; /* 5 Bytes */

    /*
     * 40个56bit的 secret device keys 组成的Device Private Key
     * 和相匹配的设备标识KSV， KSV是40bit的二进制数。
     */
    UCHAR8 aucDks[HV_HDCP_1X_SIZE_DKS_BYTE]; /* 280 Bytes */
}Hdcp1xRxKey;

/************ HDCP End *************/

typedef enum
{
    QUEUE_OK,
    QUEUE_FULL,
    QUEUE_EMPTY
}QueueStatus;

typedef enum _SscgType
{
    SSCG_VBO,
    SSCG_EDP,
    SSCG_DDR,
    SSCG_MAX,
}SscgType;

typedef enum _SscgMode
{
    SPREAD_CENTER,
    SPREAD_DOWN,
    SPREAD_UP,
}SscgMode;

typedef enum _FlashModel
{
    FLASH_N25Q = 0,
    FLASH_MT25,
    FLASH_P25Q,
    FLASH_W25Q,
    FLASH_GD25,
    FLASH_MX25,
}FlashModel;

typedef enum _FlashModelID
{
    FLASH_MT25_ID = 0x20,
    FLASH_MX25_ID = 0xC2,
}FlashModelID;

typedef struct _FlashAttribute
{
    UCHAR8  FlashReadIdStandardCmd;
    UCHAR8  FlashReadIdMultiIoCmd;
    UCHAR8  FlashReadIdQuadCmd;
    UCHAR8  FlashSectionEraseCmd;
    UCHAR8  FlashSectionEraseCmd_4ByteAddr;
    UCHAR8  FlashMultiSectionEraseCmd;
    UCHAR8  FlashMultiSectionEraseCmd_4ByteAddr;
    UCHAR8  FlashChipEraseCmd;
    UCHAR8  FlashProgStandardCmd;
    UCHAR8  FlashProgStandardCmd_4ByteAddr;
    UCHAR8  FlashProgDualCmd;
    UCHAR8  FlashProgQuadCmd;
    UCHAR8  FlashProgQuadCmd_4ByteAddr;
    UCHAR8  FlashProgQpiCmd;
    UCHAR8  FlashProgQpiCmd_4ByteAddr;
    UCHAR8  FlashProg4xIoCmd;
    UCHAR8  FlashProg4xIoCmd_4ByteAddr;
    UCHAR8  FlashReadStandardCmd;
    UCHAR8  FlashReadStandardCmd_4ByteAddr;
    UCHAR8  FlashReadDualCmd;
    UCHAR8  FlashReadDualCmd_4ByteAddr;
    UCHAR8  FlashReadQuadCmd;
    UCHAR8  FlashReadQuadCmd_4ByteAddr;
    UCHAR8  FlashReadQpiCmd;
    UCHAR8  FlashReadQpiCmd_4ByteAddr;
    UCHAR8  FlashRead4xIoCmd;
    UCHAR8  FlashRead4xIoCmd_4ByteAddr;
    UCHAR8  FlashReadStatusCmd;
    UCHAR8  FlashWriteEnCmd;
    UCHAR8  FlashInstruWidth;
    UCHAR8  FlashCycleDual;
    UCHAR8  FlashCycle4xIo;
    UCHAR8  FlashCycleQpi;
    UCHAR8  FlashCycleFastDual;
    UCHAR8  FlashCycleFastQuad;
    UCHAR8  FlashQuadEnable;
    UCHAR8  FlashQuadDisable;
    UCHAR8  FlashQpiEnable;
    UCHAR8  FlashQpiDisable;
    UINT32 FlashEraseCompltWait;
}FlashAttribute;

typedef enum _I2cBusID
{
    I2CM0,
    I2CS0,
    MI2C,
    SIMI2C0,
    SIMI2C1,
    SIMI2C2,
    SIMI2CMAX,
}I2cBusID;

typedef enum _LedMode
{
    LED_POWERON,
    LED_POWERSTANDBY,
    LED_POWEROFF,
    LED_BURN_IN,
    LED_BURN_OUT,
#if (HV_PROJECT_CONFIG_POWERON_AUTO_OTA == HV_CONFIG_ON)
    LED_OTA_PROGRESSING,
    LED_OTA_OK,
#endif
    LED_MODEMAX
}LedMode;

typedef struct _PanelParam
{
    UCHAR8      ucPanelName[HV_PANEL_NAME_BYTE_MAX];    /*最大40byte*/
    USHORT16    usPanelHtotalType;
    USHORT16    usPanelHtotalMax;
    USHORT16    usPanelHtotalMin;
    USHORT16    usPanelVtotalType;
    USHORT16    usPanelVtotalMax;
    USHORT16    usPanelVtotalMin;
    USHORT16    usPanelHactive;
    USHORT16    usPanelVactive;
    USHORT16    usPanelFrameRateType;
    USHORT16    usPanelFrameRateMax;
    USHORT16    usPanelFrameRateMin;
    UCHAR8      ucPanelHsyncWidth;
    UCHAR8      ucPanelVsyncWidth;
    UCHAR8      ucPanelHsyncBackPorch;
    UCHAR8      ucPanelVsyncBackPorch;
    UCHAR8      ucPanelColorDepth;
    UCHAR8      ucPanelLaneNum;
    UCHAR8      ucPanelPortNum;
    UCHAR8      ucPanelLaneRate;
    UINT32      uiPanelPixelClockType;
    UINT32      uiPanelPixelClockMax;
    UINT32      uiPanelPixelClockMin;
    USHORT16    usPanelPowerOnTime;
    USHORT16    usPanelDataOnTime;
    USHORT16    usPanelBlkOnTime;
    USHORT16    usPanelBlkOffTime;
    USHORT16    usPanelDataOfTime;
    USHORT16    usPanelPowerOffTime;
    USHORT16    usPanelPllLockTime;
    USHORT16    usPanelIdlePatternTime;
    BOOL        bPanelSscgEn;
    USHORT16    usPanelSscgFreq;        // 0-100(k)
    UCHAR8      ucPanelSscgFrac;        // 0-30(0%-3%)
    UCHAR8      ucPanelEdpHpd0SoftMode;
    UCHAR8      ucPanelEdpHpd1SoftMode;
    BOOL        bPanelEdpAux0PnSwapEn;
    BOOL        bPanelEdpAux1PnSwapEn;
    BOOL        bPanelPhy0MuxEn;
    UCHAR8      ucPanelPhy0Lane0MuxSel;
    UCHAR8      ucPanelPhy0Lane1MuxSel;
    UCHAR8      ucPanelPhy0Lane2MuxSel;
    UCHAR8      ucPanelPhy0Lane3MuxSel;
    BOOL        bPanelPhy0Lane0PnSwap;
    BOOL        bPanelPhy0Lane1PnSwap;
    BOOL        bPanelPhy0Lane2PnSwap;
    BOOL        bPanelPhy0Lane3PnSwap;
    BOOL        bPanelPhy1MuxEn;
    UCHAR8      ucPanelPhy1Lane0MuxSel;
    UCHAR8      ucPanelPhy1Lane1MuxSel;
    UCHAR8      ucPanelPhy1Lane2MuxSel;
    UCHAR8      ucPanelPhy1Lane3MuxSel;
    BOOL        bPanelPhy1Lane0PnSwap;
    BOOL        bPanelPhy1Lane1PnSwap;
    BOOL        bPanelPhy1Lane2PnSwap;
    BOOL        bPanelPhy1Lane3PnSwap;
    BOOL        bPanelPhy2MuxEn;
    UCHAR8      ucPanelPhy2Lane0MuxSel;
    UCHAR8      ucPanelPhy2Lane1MuxSel;
    UCHAR8      ucPanelPhy2Lane2MuxSel;
    UCHAR8      ucPanelPhy2Lane3MuxSel;
    BOOL        bPanelPhy2Lane0PnSwap;
    BOOL        bPanelPhy2Lane1PnSwap;
    BOOL        bPanelPhy2Lane2PnSwap;
    BOOL        bPanelPhy2Lane3PnSwap;
    USHORT16    usPanelInchWidth;
    USHORT16    usPanelInchHeight;
    /* ldc 点屏参数 */
    USHORT16    usPanelLdcVccOnTime;
    USHORT16    usPanelLdcVinOnTime;
    USHORT16    usPanelLdcPwmOnTime;
    USHORT16    usPanelLdcLdEnTime;
    USHORT16    usPanelLdcSpiOnTime;
    USHORT16    usPanelLdcBlOnTime;
    /* ldc 关屏参数 */
    USHORT16    usPanelLdcBlOffTime;
    USHORT16    usPanelLdcSpiOffTime;
    USHORT16    usPanelLdcLdEnOffTime;
    USHORT16    usPanelLdcPwmOffTime;
    USHORT16    usPanelLdcVinOffTime;
    USHORT16    usPanelLdcVccOffTime;

}PanelParam;

typedef struct _PanelControl
{
    VOID (*pfPanelInit)(const PanelParam* pstPanelParam);

    VOID (*pfPanelEnable)(BOOL bEn);

    Status (*pfGetPanelStatus)(VOID);

    VOID (*pfSetMNTuSize)(UINT32 uiEdpTuDataSize, UINT32 uiMvid);
     
    VOID (*pfCalMNTuSize)(VideoConfigParams* pstVideoConfigParams, const PanelParam *pstPanelParam, UINT32 uiClock);
    
    BOOL (*pfCheckPanelExist)(VOID);

    VOID (*pfPanelIrqEnable)(EdpHpdPortIndex enHpdPort);
    VOID (*pfPanelIrqDisable)(EdpHpdPortIndex enHpdPort);
}__attribute__((aligned(4)))PanelControl;

typedef struct _GamutSet
{
    USHORT16 usCoef_R_r;
    USHORT16 usCoef_G_r;
    USHORT16 usCoef_B_r;
    USHORT16 usCoef_R_g;
    USHORT16 usCoef_G_g;
    USHORT16 usCoef_B_g;
    USHORT16 usCoef_R_b;
    USHORT16 usCoef_G_b;
    USHORT16 usCoef_B_b;

    USHORT16 usOsdCoef_R_r;
    USHORT16 usOsdCoef_G_r;
    USHORT16 usOsdCoef_B_r;
    USHORT16 usOsdCoef_R_g;
    USHORT16 usOsdCoef_G_g;
    USHORT16 usOsdCoef_B_g;
    USHORT16 usOsdCoef_R_b;
    USHORT16 usOsdCoef_G_b;
    USHORT16 usOsdCoef_B_b;

}GamutSet;

typedef struct _GamutOffset
{
    UINT32 uiOfsOutR;
    UINT32 uiOfsOutG;
    UINT32 uiOfsOutB;
}GamutOffset;

typedef struct _BrightnessOsdSet
{
    UINT32 BrightOsdStart;
    UINT32 BrightOsdMidl;
    UINT32 BrightOsdEnd;
    UINT32 BrightDrvforOsdStart;
    UINT32 BrightDrvforOsdMidl;
    UINT32 BrightDrvforOsdEnd;
    USHORT16 BrightforHdrMax;
    USHORT16 BrightforPart1;
    USHORT16 BrightforPart2;
    USHORT16 BrightforPart3;
}BrightnessOsdSet;

typedef enum _OsdRotationType
{
    OSD_ROTATION_NONE,
    OSD_ROTATION_90,
    OSD_ROTATION_180,
    OSD_ROTATION_270,
} OsdRotationType;


typedef enum _HotfixMainType
{
    HOTFIX_MAIN_BOOT,
    HOTFIX_MAIN_CHANNEL,
    HOTFIX_MAIN_HDMI0,
    HOTFIX_MAIN_HDMI1,
    HOTFIX_MAIN_DP,
    HOTFIX_MAIN_OSD,
    HOTFIX_MAIN_PQ,
    HOTFIX_MAIN_TX,
    HOTFIX_MAIN_DPU,
    HOTFIX_MAIN_VGA,
    HOTFIX_MAIN_HDCP0,
    HOTFIX_MAIN_HDCP1,
    HOTFIX_MAIN_TYPEC,
    HOTFIX_MAIN_USB,
}HotfixMainType;

typedef enum _HotfixBootType
{
    HOTFIX_BOOT_CLK,
    HOTFIX_BOOT_MAIN,
    HOTFIX_BOOT_STANDBY
}HotfixBootType;

typedef enum _HotfixHDMIType
{
    HOTFIX_HDMI_INIT,
    HOTFIX_HDMI_IDLE,
    HOTFIX_HDMI_WAIT_SYNC,
    HOTFIX_HDMI_SYNC_OK,
    HOTFIX_HDMI_DISPLAY_RDY,
    HOTFIX_HDMI_WAIT_FAST_LOCK,
    HOTFIX_HDMI_FAST_LOCKED,
    HOTFIX_HDMI_WAIT_EQ_DONE,
    HOTFIX_HDMI_TIMING_CHG,
    HOTFIX_HDMI_TIMING_CHG_STILL,
    HOTFIX_HDMI_TRAINING_DONE,
    HOTFIX_HDMI_SIGNAL_LOSS,
    HOTFIX_HDMI_VRR_ENTER,
    HOTFIX_HDMI_VRR_EXIT,
    HOTFIX_HDMI_HDR_CHG,
    HOTFIX_HDMI_COLOR_CHG,
    HOTFIX_HDMI_SET_HPD_HIGH,
    HOTFIX_HDMI_SET_HPD_LOW,
    HOTFIX_HDMI_RESET_AUDIO_FIFO,
    HOTFIX_HDMI_WAITSYNC_TIMEOUT,
    HOTFIX_HDMI_SYNCOK_TIMEOUT,
    HOTFIX_HDMI_DVI_MODE,
    HOTFIX_HDMI_INTERLACE_MODE,
    HOTFIX_HDMI_PKT_ERR,
    HOTFIX_HDMI_HDCP_SYNC,
    HOTFIX_HDMI_HDCP_1X_AUTH_START,
    HOTFIX_HDMI_HDCP_1X_AUTH_DONE,
    HOTFIX_HDMI_HDCP_2X_AUTH_START,
    HOTFIX_HDMI_HDCP_2X_AUTH_DONE,
    HOTFIX_HDMI_HDCP_EDID_UPDATE,
    HOTFIX_HDMI_END
}HotfixHDMIType;

typedef enum _HotfixHDCPType
{
    HOTFIX_HDCP_INIT,
    HOTFIX_HDCP_1X_AUTH_START,
    HOTFIX_HDCP_1X_AUTH_DONE,
    HOTFIX_HDCP_2X_INIT,
    HOTFIX_HDCP_2X_NO_STORE_KM,
    HOTFIX_HDCP_2X_STORED_KM,
    HOTFIX_HDCP_2X_RD_HPRIME,
    HOTFIX_HDCP_2X_LC_INIT,
    HOTFIX_HDCP_2X_SND_EKS,
    HOTFIX_HDCP_END
}HotfixHDCPType;

typedef enum _HotfixDPType
{
    HOTFIX_DP0_INIT,
    HOTFIX_DP1_INIT,
    HOTFIX_DP0_IDLESTART,
    HOTFIX_DP1_IDLESTART,
    HOTFIX_DP0_TRAININGDONE,
    HOTFIX_DP1_TRAININGDONE,
    HOTFIX_DP0_TRAININGFAIL,
    HOTFIX_DP1_TRAININGFAIL,
    HOTFIX_DP0_DISPLAYREADY,
    HOTFIX_DP1_DISPLAYREADY,
    HOTFIX_DP0_POWERON,
    HOTFIX_DP1_POWERON,
    HOTFIX_DP_END
}HotfixDPType;

#endif
