#ifndef _HV_PAGE_HT7315_DTC_TOP1_H_
#define _HV_PAGE_HT7315_DTC_TOP1_H_

#ifndef HV_DTC_TOP1_BASE_ADDRESS
    #define HV_DTC_TOP1_BASE_ADDRESS                                         0x11023100
#endif


#define DISP_TOP_DTC_TOP1_00                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x00)

#define DISP_TOP_DTC_TOP1_00_struct                                      rs_disp_top_dtc_top1_00

typedef struct _rs_disp_top_dtc_top1_00  rs_disp_top_dtc_top1_00;
struct _rs_disp_top_dtc_top1_00 {
    unsigned int reg_ana_osc_clk_en                         : 1;
    unsigned int reg_axi_clk_dpu_en                         : 1;
    unsigned int reg_axi_clk_sh1_en                         : 1;
    unsigned int reg_blk2_pd_oscclk_window_length           :12;
    unsigned int reg_blk2_pd_prc_det_clkgate_en             : 1;
    unsigned int reg_blk2_pd_prc_det_mode                   : 3;
    unsigned int reg_enc1_clk_en                            : 1;
    unsigned int reg_enc2_clk_en                            : 1;
    unsigned int reg_kspi_clk_en                            : 1;
    unsigned int reg_osc_clk_en                             : 1;
    unsigned int reg_osd_clk_en                             : 1;
    unsigned int reg_osd_div_num                            : 3;
    unsigned int reg_rx1_clk_en                             : 1;
    unsigned int reg_rx2_clk_en                             : 1;
    unsigned int reserved                                   : 3;
};
#define disp_top_dtc_top1_00(val) ((rs_disp_top_dtc_top1_00*)&(val))



#define DISP_TOP_DTC_TOP1_04                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x04)

#define DISP_TOP_DTC_TOP1_04_struct                                      rs_disp_top_dtc_top1_04

typedef struct _rs_disp_top_dtc_top1_04  rs_disp_top_dtc_top1_04;
struct _rs_disp_top_dtc_top1_04 {
    unsigned int reg_sr_clk_div_en                          : 1;
    unsigned int reg_sr_clk_div_num                         : 3;
    unsigned int reg_sr_clk_en                              : 1;
    unsigned int reg_dtc_ref_clk_sel                        : 2;
    unsigned int reg_dtc_rbuf_clk_sel                       : 1;
    unsigned int reserved                                   :24;
};
#define disp_top_dtc_top1_04(val) ((rs_disp_top_dtc_top1_04*)&(val))



#define DISP_TOP_DTC_TOP1_08                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x08)

#define DISP_TOP_DTC_TOP1_08_struct                                      rs_disp_top_dtc_top1_08

typedef struct _rs_disp_top_dtc_top1_08  rs_disp_top_dtc_top1_08;
struct _rs_disp_top_dtc_top1_08 {
    unsigned int reg_int_en                                 : 8;
    unsigned int reg_int_mode                               :16;
    unsigned int reg_int_clr                                : 8;
};
#define disp_top_dtc_top1_08(val) ((rs_disp_top_dtc_top1_08*)&(val))



#define DISP_TOP_DTC_TOP1_10                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x10)

#define DISP_TOP_DTC_TOP1_10_struct                                      rs_disp_top_dtc_top1_10

typedef struct _rs_disp_top_dtc_top1_10  rs_disp_top_dtc_top1_10;
struct _rs_disp_top_dtc_top1_10 {
    unsigned int reg_dtc_buffer_low_monitor_start           :16;
    unsigned int reg_dtc_buffer_low_monitor_end             :16;
};
#define disp_top_dtc_top1_10(val) ((rs_disp_top_dtc_top1_10*)&(val))



#define DISP_TOP_DTC_TOP1_14                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x14)

#define DISP_TOP_DTC_TOP1_14_struct                                      rs_disp_top_dtc_top1_14

typedef struct _rs_disp_top_dtc_top1_14  rs_disp_top_dtc_top1_14;
struct _rs_disp_top_dtc_top1_14 {
    unsigned int reg_dtc_buffer_high_monitor_start          :16;
    unsigned int reg_dtc_buffer_high_monitor_end            :16;
};
#define disp_top_dtc_top1_14(val) ((rs_disp_top_dtc_top1_14*)&(val))



#define DISP_TOP_DTC_TOP1_18                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x18)

#define DISP_TOP_DTC_TOP1_18_struct                                      rs_disp_top_dtc_top1_18

typedef struct _rs_disp_top_dtc_top1_18  rs_disp_top_dtc_top1_18;
struct _rs_disp_top_dtc_top1_18 {
    unsigned int reg_dtc_buffer_low_th                      :15;
    unsigned int reg_dtc_buffer_low_clr                     : 1;
    unsigned int reg_dtc_buffer_high_th                     :15;
    unsigned int reg_dtc_buffer_high_clr                    : 1;
};
#define disp_top_dtc_top1_18(val) ((rs_disp_top_dtc_top1_18*)&(val))



#define DISP_TOP_DTC_TOP1_1C                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x1C)

#define DISP_TOP_DTC_TOP1_1C_struct                                      rs_disp_top_dtc_top1_1c

typedef struct _rs_disp_top_dtc_top1_1c  rs_disp_top_dtc_top1_1c;
struct _rs_disp_top_dtc_top1_1c {
    unsigned int reg_dtc_buffer_monitor_mode                : 1;
    unsigned int reserved                                   :31;
};
#define disp_top_dtc_top1_1c(val) ((rs_disp_top_dtc_top1_1c*)&(val))



#define DISP_TOP_DTC_TOP1_20                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x20)

#define DISP_TOP_DTC_TOP1_20_struct                                      rs_disp_top_dtc_top1_20

typedef struct _rs_disp_top_dtc_top1_20  rs_disp_top_dtc_top1_20;
struct _rs_disp_top_dtc_top1_20 {
    unsigned int reg_frc_s_index_chgcnt_trg                 : 1;
    unsigned int reg_frc_m_index_chgcnt_trg                 : 1;
    unsigned int reg_axi_flag_clr                           : 1;
    unsigned int reserved                                   :29;
};
#define disp_top_dtc_top1_20(val) ((rs_disp_top_dtc_top1_20*)&(val))



#define DISP_TOP_DTC_TOP1_24                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x24)

#define DISP_TOP_DTC_TOP1_24_struct                                      rs_disp_top_dtc_top1_24

typedef struct _rs_disp_top_dtc_top1_24  rs_disp_top_dtc_top1_24;
struct _rs_disp_top_dtc_top1_24 {
    unsigned int reg_axi_addr_buf0_low                      :32;
};
#define disp_top_dtc_top1_24(val) ((rs_disp_top_dtc_top1_24*)&(val))



#define DISP_TOP_DTC_TOP1_28                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x28)

#define DISP_TOP_DTC_TOP1_28_struct                                      rs_disp_top_dtc_top1_28

typedef struct _rs_disp_top_dtc_top1_28  rs_disp_top_dtc_top1_28;
struct _rs_disp_top_dtc_top1_28 {
    unsigned int reg_axi_addr_buf0_high                     :32;
};
#define disp_top_dtc_top1_28(val) ((rs_disp_top_dtc_top1_28*)&(val))



#define DISP_TOP_DTC_TOP1_2C                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x2C)

#define DISP_TOP_DTC_TOP1_2C_struct                                      rs_disp_top_dtc_top1_2c

typedef struct _rs_disp_top_dtc_top1_2c  rs_disp_top_dtc_top1_2c;
struct _rs_disp_top_dtc_top1_2c {
    unsigned int reg_axi_addr_buf_ofst                      :32;
};
#define disp_top_dtc_top1_2c(val) ((rs_disp_top_dtc_top1_2c*)&(val))



#define DISP_TOP_DTC_TOP1_30                                             (HV_DTC_TOP1_BASE_ADDRESS + 0x30)

#define DISP_TOP_DTC_TOP1_30_struct                                      rs_disp_top_dtc_top1_30

typedef struct _rs_disp_top_dtc_top1_30  rs_disp_top_dtc_top1_30;
struct _rs_disp_top_dtc_top1_30 {
    unsigned int reg_axi_meter_width                        :32;
};
#define disp_top_dtc_top1_30(val) ((rs_disp_top_dtc_top1_30*)&(val))



#define DISP_TOP_DTC_TOP1_C4                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xC4)

#define DISP_TOP_DTC_TOP1_C4_struct                                      rs_disp_top_dtc_top1_c4

typedef struct _rs_disp_top_dtc_top1_c4  rs_disp_top_dtc_top1_c4;
struct _rs_disp_top_dtc_top1_c4 {
    unsigned int regr_dtc_buffer_prefetch_start_position    :24;
    unsigned int reserved                                   : 8;
};
#define disp_top_dtc_top1_c4(val) ((rs_disp_top_dtc_top1_c4*)&(val))



#define DISP_TOP_DTC_TOP1_C8                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xC8)

#define DISP_TOP_DTC_TOP1_C8_struct                                      rs_disp_top_dtc_top1_c8

typedef struct _rs_disp_top_dtc_top1_c8  rs_disp_top_dtc_top1_c8;
struct _rs_disp_top_dtc_top1_c8 {
    unsigned int regr_dtc_buffer_prefetch_stop_position     :24;
    unsigned int reserved                                   : 8;
};
#define disp_top_dtc_top1_c8(val) ((rs_disp_top_dtc_top1_c8*)&(val))



#define DISP_TOP_DTC_TOP1_CC                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xCC)

#define DISP_TOP_DTC_TOP1_CC_struct                                      rs_disp_top_dtc_top1_cc

typedef struct _rs_disp_top_dtc_top1_cc  rs_disp_top_dtc_top1_cc;
struct _rs_disp_top_dtc_top1_cc {
    unsigned int regr_dtc_buffer_read_start_position        :24;
    unsigned int reserved                                   : 8;
};
#define disp_top_dtc_top1_cc(val) ((rs_disp_top_dtc_top1_cc*)&(val))



#define DISP_TOP_DTC_TOP1_D0                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xD0)

#define DISP_TOP_DTC_TOP1_D0_struct                                      rs_disp_top_dtc_top1_d0

typedef struct _rs_disp_top_dtc_top1_d0  rs_disp_top_dtc_top1_d0;
struct _rs_disp_top_dtc_top1_d0 {
    unsigned int regr_axi_crash_addr_flag                   : 1;
    unsigned int reserved                                   :31;
};
#define disp_top_dtc_top1_d0(val) ((rs_disp_top_dtc_top1_d0*)&(val))



#define DISP_TOP_DTC_TOP1_D4                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xD4)

#define DISP_TOP_DTC_TOP1_D4_struct                                      rs_disp_top_dtc_top1_d4

typedef struct _rs_disp_top_dtc_top1_d4  rs_disp_top_dtc_top1_d4;
struct _rs_disp_top_dtc_top1_d4 {
    unsigned int regr_axi_crash_wr_addr_w                   :32;
};
#define disp_top_dtc_top1_d4(val) ((rs_disp_top_dtc_top1_d4*)&(val))



#define DISP_TOP_DTC_TOP1_D8                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xD8)

#define DISP_TOP_DTC_TOP1_D8_struct                                      rs_disp_top_dtc_top1_d8

typedef struct _rs_disp_top_dtc_top1_d8  rs_disp_top_dtc_top1_d8;
struct _rs_disp_top_dtc_top1_d8 {
    unsigned int regr_axi_crash_wr_addr_r                   :32;
};
#define disp_top_dtc_top1_d8(val) ((rs_disp_top_dtc_top1_d8*)&(val))



#define DISP_TOP_DTC_TOP1_DC                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xDC)

#define DISP_TOP_DTC_TOP1_DC_struct                                      rs_disp_top_dtc_top1_dc

typedef struct _rs_disp_top_dtc_top1_dc  rs_disp_top_dtc_top1_dc;
struct _rs_disp_top_dtc_top1_dc {
    unsigned int regr_frc_s_wlncnt_at_firstrde              :16;
    unsigned int regr_frc_s_rlncnt_at_firstwde              :16;
};
#define disp_top_dtc_top1_dc(val) ((rs_disp_top_dtc_top1_dc*)&(val))



#define DISP_TOP_DTC_TOP1_E0                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xE0)

#define DISP_TOP_DTC_TOP1_E0_struct                                      rs_disp_top_dtc_top1_e0

typedef struct _rs_disp_top_dtc_top1_e0  rs_disp_top_dtc_top1_e0;
struct _rs_disp_top_dtc_top1_e0 {
    unsigned int regr_frc_m_wlncnt_at_firstrde              :16;
    unsigned int regr_frc_m_rlncnt_at_firstwde              :16;
};
#define disp_top_dtc_top1_e0(val) ((rs_disp_top_dtc_top1_e0*)&(val))



#define DISP_TOP_DTC_TOP1_E4                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xE4)

#define DISP_TOP_DTC_TOP1_E4_struct                                      rs_disp_top_dtc_top1_e4

typedef struct _rs_disp_top_dtc_top1_e4  rs_disp_top_dtc_top1_e4;
struct _rs_disp_top_dtc_top1_e4 {
    unsigned int regr_frc_s_windex_chg_cnt                  :16;
    unsigned int regr_frc_s_rindex_chg_cnt                  :16;
};
#define disp_top_dtc_top1_e4(val) ((rs_disp_top_dtc_top1_e4*)&(val))



#define DISP_TOP_DTC_TOP1_E8                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xE8)

#define DISP_TOP_DTC_TOP1_E8_struct                                      rs_disp_top_dtc_top1_e8

typedef struct _rs_disp_top_dtc_top1_e8  rs_disp_top_dtc_top1_e8;
struct _rs_disp_top_dtc_top1_e8 {
    unsigned int regr_frc_m_windex_chg_cnt                  :16;
    unsigned int regr_frc_m_rindex_chg_cnt                  :16;
};
#define disp_top_dtc_top1_e8(val) ((rs_disp_top_dtc_top1_e8*)&(val))



#define DISP_TOP_DTC_TOP1_EC                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xEC)

#define DISP_TOP_DTC_TOP1_EC_struct                                      rs_disp_top_dtc_top1_ec

typedef struct _rs_disp_top_dtc_top1_ec  rs_disp_top_dtc_top1_ec;
struct _rs_disp_top_dtc_top1_ec {
    unsigned int regr_dtc_buffer_low_depth                  :15;
    unsigned int regr_dtc_buffer_low                        : 1;
    unsigned int regr_dtc_buffer_high_depth                 :15;
    unsigned int regr_dtc_buffer_high                       : 1;
};
#define disp_top_dtc_top1_ec(val) ((rs_disp_top_dtc_top1_ec*)&(val))



#define DISP_TOP_DTC_TOP1_F0                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xF0)

#define DISP_TOP_DTC_TOP1_F0_struct                                      rs_disp_top_dtc_top1_f0

typedef struct _rs_disp_top_dtc_top1_f0  rs_disp_top_dtc_top1_f0;
struct _rs_disp_top_dtc_top1_f0 {
    unsigned int regr_dtc_tx_hcnt                           :16;
    unsigned int regr_dtc_tx_vcnt                           :16;
};
#define disp_top_dtc_top1_f0(val) ((rs_disp_top_dtc_top1_f0*)&(val))



#define DISP_TOP_DTC_TOP1_F4                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xF4)

#define DISP_TOP_DTC_TOP1_F4_struct                                      rs_disp_top_dtc_top1_f4

typedef struct _rs_disp_top_dtc_top1_f4  rs_disp_top_dtc_top1_f4;
struct _rs_disp_top_dtc_top1_f4 {
    unsigned int regr_dbg_dtc_rx_de_to_buf_wr_delay         :24;
    unsigned int reserved                                   : 8;
};
#define disp_top_dtc_top1_f4(val) ((rs_disp_top_dtc_top1_f4*)&(val))



#define DISP_TOP_DTC_TOP1_F8                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xF8)

#define DISP_TOP_DTC_TOP1_F8_struct                                      rs_disp_top_dtc_top1_f8

typedef struct _rs_disp_top_dtc_top1_f8  rs_disp_top_dtc_top1_f8;
struct _rs_disp_top_dtc_top1_f8 {
    unsigned int regr_int_womask_status                     : 8;
    unsigned int regr_int_wimask_status                     : 8;
    unsigned int reserved                                   :16;
};
#define disp_top_dtc_top1_f8(val) ((rs_disp_top_dtc_top1_f8*)&(val))



#define DISP_TOP_DTC_TOP1_FC                                             (HV_DTC_TOP1_BASE_ADDRESS + 0xFC)

#define DISP_TOP_DTC_TOP1_FC_struct                                      rs_disp_top_dtc_top1_fc

typedef struct _rs_disp_top_dtc_top1_fc  rs_disp_top_dtc_top1_fc;
struct _rs_disp_top_dtc_top1_fc {
    unsigned int regr_blk2_pd0_mclk_window_length           :16;
    unsigned int regr_blk2_pd1_mclk_window_length           :16;
};
#define disp_top_dtc_top1_fc(val) ((rs_disp_top_dtc_top1_fc*)&(val))



#endif