#ifndef _HV_PAGE_HT7315_DISP_CTRL_TOP_1_H_
#define _HV_PAGE_HT7315_DISP_CTRL_TOP_1_H_

#ifndef HV_DISP_CTRL_TOP_1_BASE_ADDRESS
    #define HV_DISP_CTRL_TOP_1_BASE_ADDRESS                                         0x11052D00
#endif


#define TX_DISP_CTRL_TOP_1_00                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x00)

#define TX_DISP_CTRL_TOP_1_00_struct                                     rs_tx_disp_ctrl_top_1_00

typedef struct _rs_tx_disp_ctrl_top_1_00  rs_tx_disp_ctrl_top_1_00;
struct _rs_tx_disp_ctrl_top_1_00 {
    unsigned int reg_ktx_pre_map_dualgate_en                : 1;
    unsigned int reg_ktx_pre_map_trigate_en                 : 1;
    unsigned int reg_ktx_flip_enable                        : 1;
    unsigned int reg_ktx_dualgate_scanmode                  : 1;
    unsigned int reg_ktx_pre_insert_pixel_swap              : 1;
    unsigned int reg_ktx_even_frame_inv                     : 1;
    unsigned int reserved                                   : 1;
    unsigned int reg_ktx_pre_flip_dualgate_en               : 1;
    unsigned int reg_ktx_pre_flip_trigate_en                : 1;
    unsigned int reserved_1                                 : 1;
    unsigned int reg_ktx_1366_en                            : 1;
    unsigned int reg_ktx_1366_flip_blk_value_sel            : 1;
    unsigned int reg_ktx_1366_trigate_blank_value           : 1;
    unsigned int reg_ktx_1366_trigate_flip_2dummy           : 1;
    unsigned int reserved_2                                 :18;
};
#define tx_disp_ctrl_top_1_00(val) ((rs_tx_disp_ctrl_top_1_00*)&(val))



#define TX_DISP_CTRL_TOP_1_04                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x04)

#define TX_DISP_CTRL_TOP_1_04_struct                                     rs_tx_disp_ctrl_top_1_04

typedef struct _rs_tx_disp_ctrl_top_1_04  rs_tx_disp_ctrl_top_1_04;
struct _rs_tx_disp_ctrl_top_1_04 {
    unsigned int reg_ktx_1st_flip_pix_patt                  : 4;
    unsigned int reg_ktx_1st_flip_l_num                     : 3;
    unsigned int reg_ktx_1st_flip_r_num                     : 3;
    unsigned int reg_ktx_1st_fdata_sel                      : 3;
    unsigned int reg_ktx_1st_fdata_value                    : 1;
    unsigned int reg_ktx_1st_bdata_sel                      : 3;
    unsigned int reg_ktx_1st_bdata_value                    : 1;
    unsigned int reg_ktx_2nd_flip_pix_patt                  : 4;
    unsigned int reg_ktx_2nd_flip_l_num                     : 3;
    unsigned int reg_ktx_2nd_flip_r_num                     : 3;
    unsigned int reg_ktx_2nd_fdata_sel                      : 3;
    unsigned int reg_ktx_2nd_fdata_value                    : 1;
};
#define tx_disp_ctrl_top_1_04(val) ((rs_tx_disp_ctrl_top_1_04*)&(val))



#define TX_DISP_CTRL_TOP_1_08                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x08)

#define TX_DISP_CTRL_TOP_1_08_struct                                     rs_tx_disp_ctrl_top_1_08

typedef struct _rs_tx_disp_ctrl_top_1_08  rs_tx_disp_ctrl_top_1_08;
struct _rs_tx_disp_ctrl_top_1_08 {
    unsigned int reg_ktx_2nd_bdata_sel                      : 3;
    unsigned int reg_ktx_2nd_bdata_value                    : 1;
    unsigned int reg_ktx_3rd_flip_pix_patt                  : 4;
    unsigned int reg_ktx_3rd_flip_l_num                     : 3;
    unsigned int reg_ktx_3rd_flip_r_num                     : 3;
    unsigned int reg_ktx_3rd_fdata_sel                      : 3;
    unsigned int reg_ktx_3rd_fdata_value                    : 1;
    unsigned int reg_ktx_3rd_bdata_sel                      : 3;
    unsigned int reg_ktx_3rd_bdata_value                    : 1;
    unsigned int reserved                                   :10;
};
#define tx_disp_ctrl_top_1_08(val) ((rs_tx_disp_ctrl_top_1_08*)&(val))



#define TX_DISP_CTRL_TOP_1_0C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x0C)

#define TX_DISP_CTRL_TOP_1_0C_struct                                     rs_tx_disp_ctrl_top_1_0c

typedef struct _rs_tx_disp_ctrl_top_1_0c  rs_tx_disp_ctrl_top_1_0c;
struct _rs_tx_disp_ctrl_top_1_0c {
    unsigned int reserved                                   : 5;
    unsigned int reg_ktx_dg_frm0_ln0_sel                    : 2;
    unsigned int reg_ktx_dg_frm0_ln1_sel                    : 2;
    unsigned int reg_ktx_dg_frm0_ln2_sel                    : 2;
    unsigned int reg_ktx_dg_frm0_ln3_sel                    : 2;
    unsigned int reg_ktx_dg_frm1_ln0_sel                    : 2;
    unsigned int reg_ktx_dg_frm1_ln1_sel                    : 2;
    unsigned int reg_ktx_dg_frm1_ln2_sel                    : 2;
    unsigned int reg_ktx_dg_frm1_ln3_sel                    : 2;
    unsigned int reg_ktx_dg_ln_patt_cycle                   : 2;
    unsigned int reg_ktx_dg_mapping_mode                    : 1;
    unsigned int reg_ktx_dg_rev_4port_mode                  : 1;
    unsigned int reserved_1                                 : 7;
};
#define tx_disp_ctrl_top_1_0c(val) ((rs_tx_disp_ctrl_top_1_0c*)&(val))



#define TX_DISP_CTRL_TOP_1_10                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x10)

#define TX_DISP_CTRL_TOP_1_10_struct                                     rs_tx_disp_ctrl_top_1_10

typedef struct _rs_tx_disp_ctrl_top_1_10  rs_tx_disp_ctrl_top_1_10;
struct _rs_tx_disp_ctrl_top_1_10 {
    unsigned int reg_ktx_dg_mode0_00_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_01_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_02_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_03_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_04_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_05_sel                    : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_10(val) ((rs_tx_disp_ctrl_top_1_10*)&(val))



#define TX_DISP_CTRL_TOP_1_14                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x14)

#define TX_DISP_CTRL_TOP_1_14_struct                                     rs_tx_disp_ctrl_top_1_14

typedef struct _rs_tx_disp_ctrl_top_1_14  rs_tx_disp_ctrl_top_1_14;
struct _rs_tx_disp_ctrl_top_1_14 {
    unsigned int reg_ktx_dg_mode0_10_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_11_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_12_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_13_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_14_sel                    : 5;
    unsigned int reg_ktx_dg_mode0_15_sel                    : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_14(val) ((rs_tx_disp_ctrl_top_1_14*)&(val))



#define TX_DISP_CTRL_TOP_1_18                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x18)

#define TX_DISP_CTRL_TOP_1_18_struct                                     rs_tx_disp_ctrl_top_1_18

typedef struct _rs_tx_disp_ctrl_top_1_18  rs_tx_disp_ctrl_top_1_18;
struct _rs_tx_disp_ctrl_top_1_18 {
    unsigned int reg_ktx_dg_mode1_00_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_01_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_02_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_03_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_04_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_05_sel                    : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_18(val) ((rs_tx_disp_ctrl_top_1_18*)&(val))



#define TX_DISP_CTRL_TOP_1_1C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x1C)

#define TX_DISP_CTRL_TOP_1_1C_struct                                     rs_tx_disp_ctrl_top_1_1c

typedef struct _rs_tx_disp_ctrl_top_1_1c  rs_tx_disp_ctrl_top_1_1c;
struct _rs_tx_disp_ctrl_top_1_1c {
    unsigned int reg_ktx_dg_mode1_10_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_11_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_12_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_13_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_14_sel                    : 5;
    unsigned int reg_ktx_dg_mode1_15_sel                    : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_1c(val) ((rs_tx_disp_ctrl_top_1_1c*)&(val))



#define TX_DISP_CTRL_TOP_1_20                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x20)

#define TX_DISP_CTRL_TOP_1_20_struct                                     rs_tx_disp_ctrl_top_1_20

typedef struct _rs_tx_disp_ctrl_top_1_20  rs_tx_disp_ctrl_top_1_20;
struct _rs_tx_disp_ctrl_top_1_20 {
    unsigned int reg_ktx_dg_mode2_00_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_01_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_02_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_03_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_04_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_05_sel                    : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_20(val) ((rs_tx_disp_ctrl_top_1_20*)&(val))



#define TX_DISP_CTRL_TOP_1_24                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x24)

#define TX_DISP_CTRL_TOP_1_24_struct                                     rs_tx_disp_ctrl_top_1_24

typedef struct _rs_tx_disp_ctrl_top_1_24  rs_tx_disp_ctrl_top_1_24;
struct _rs_tx_disp_ctrl_top_1_24 {
    unsigned int reg_ktx_dg_mode2_10_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_11_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_12_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_13_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_14_sel                    : 5;
    unsigned int reg_ktx_dg_mode2_15_sel                    : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_24(val) ((rs_tx_disp_ctrl_top_1_24*)&(val))



#define TX_DISP_CTRL_TOP_1_28                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x28)

#define TX_DISP_CTRL_TOP_1_28_struct                                     rs_tx_disp_ctrl_top_1_28

typedef struct _rs_tx_disp_ctrl_top_1_28  rs_tx_disp_ctrl_top_1_28;
struct _rs_tx_disp_ctrl_top_1_28 {
    unsigned int reg_ktx_dg_mode3_00_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_01_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_02_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_03_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_04_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_05_sel                    : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_28(val) ((rs_tx_disp_ctrl_top_1_28*)&(val))



#define TX_DISP_CTRL_TOP_1_2C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x2C)

#define TX_DISP_CTRL_TOP_1_2C_struct                                     rs_tx_disp_ctrl_top_1_2c

typedef struct _rs_tx_disp_ctrl_top_1_2c  rs_tx_disp_ctrl_top_1_2c;
struct _rs_tx_disp_ctrl_top_1_2c {
    unsigned int reg_ktx_dg_mode3_10_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_11_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_12_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_13_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_14_sel                    : 5;
    unsigned int reg_ktx_dg_mode3_15_sel                    : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_2c(val) ((rs_tx_disp_ctrl_top_1_2c*)&(val))



#define TX_DISP_CTRL_TOP_1_30                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x30)

#define TX_DISP_CTRL_TOP_1_30_struct                                     rs_tx_disp_ctrl_top_1_30

typedef struct _rs_tx_disp_ctrl_top_1_30  rs_tx_disp_ctrl_top_1_30;
struct _rs_tx_disp_ctrl_top_1_30 {
    unsigned int reg_ktx_in_hact                            :15;
    unsigned int reserved                                   :17;
};
#define tx_disp_ctrl_top_1_30(val) ((rs_tx_disp_ctrl_top_1_30*)&(val))



#define TX_DISP_CTRL_TOP_1_34                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x34)

#define TX_DISP_CTRL_TOP_1_34_struct                                     rs_tx_disp_ctrl_top_1_34

typedef struct _rs_tx_disp_ctrl_top_1_34  rs_tx_disp_ctrl_top_1_34;
struct _rs_tx_disp_ctrl_top_1_34 {
    unsigned int reg_ktx_pre_insert_00_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_01_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_02_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_03_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_04_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_05_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_00_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_01_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_02_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_03_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_04_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_05_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_ln_patt_cycle           : 2;
};
#define tx_disp_ctrl_top_1_34(val) ((rs_tx_disp_ctrl_top_1_34*)&(val))



#define TX_DISP_CTRL_TOP_1_38                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x38)

#define TX_DISP_CTRL_TOP_1_38_struct                                     rs_tx_disp_ctrl_top_1_38

typedef struct _rs_tx_disp_ctrl_top_1_38  rs_tx_disp_ctrl_top_1_38;
struct _rs_tx_disp_ctrl_top_1_38 {
    unsigned int reg_ktx_pre_insert_06_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_07_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_08_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_09_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_10_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_11_dummy_sel            : 3;
    unsigned int reg_ktx_pre_insert_06_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_07_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_08_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_09_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_10_ln_sel               : 2;
    unsigned int reg_ktx_pre_insert_11_ln_sel               : 2;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_38(val) ((rs_tx_disp_ctrl_top_1_38*)&(val))



#define TX_DISP_CTRL_TOP_1_3C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x3C)

#define TX_DISP_CTRL_TOP_1_3C_struct                                     rs_tx_disp_ctrl_top_1_3c

typedef struct _rs_tx_disp_ctrl_top_1_3c  rs_tx_disp_ctrl_top_1_3c;
struct _rs_tx_disp_ctrl_top_1_3c {
    unsigned int reg_ktx_pre_insert_00_position             :16;
    unsigned int reg_ktx_pre_insert_01_position             :16;
};
#define tx_disp_ctrl_top_1_3c(val) ((rs_tx_disp_ctrl_top_1_3c*)&(val))



#define TX_DISP_CTRL_TOP_1_40                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x40)

#define TX_DISP_CTRL_TOP_1_40_struct                                     rs_tx_disp_ctrl_top_1_40

typedef struct _rs_tx_disp_ctrl_top_1_40  rs_tx_disp_ctrl_top_1_40;
struct _rs_tx_disp_ctrl_top_1_40 {
    unsigned int reg_ktx_pre_insert_02_position             :16;
    unsigned int reg_ktx_pre_insert_03_position             :16;
};
#define tx_disp_ctrl_top_1_40(val) ((rs_tx_disp_ctrl_top_1_40*)&(val))



#define TX_DISP_CTRL_TOP_1_44                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x44)

#define TX_DISP_CTRL_TOP_1_44_struct                                     rs_tx_disp_ctrl_top_1_44

typedef struct _rs_tx_disp_ctrl_top_1_44  rs_tx_disp_ctrl_top_1_44;
struct _rs_tx_disp_ctrl_top_1_44 {
    unsigned int reg_ktx_pre_insert_04_position             :16;
    unsigned int reg_ktx_pre_insert_05_position             :16;
};
#define tx_disp_ctrl_top_1_44(val) ((rs_tx_disp_ctrl_top_1_44*)&(val))



#define TX_DISP_CTRL_TOP_1_48                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x48)

#define TX_DISP_CTRL_TOP_1_48_struct                                     rs_tx_disp_ctrl_top_1_48

typedef struct _rs_tx_disp_ctrl_top_1_48  rs_tx_disp_ctrl_top_1_48;
struct _rs_tx_disp_ctrl_top_1_48 {
    unsigned int reg_ktx_pre_insert_06_position             :16;
    unsigned int reg_ktx_pre_insert_07_position             :16;
};
#define tx_disp_ctrl_top_1_48(val) ((rs_tx_disp_ctrl_top_1_48*)&(val))



#define TX_DISP_CTRL_TOP_1_4C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x4C)

#define TX_DISP_CTRL_TOP_1_4C_struct                                     rs_tx_disp_ctrl_top_1_4c

typedef struct _rs_tx_disp_ctrl_top_1_4c  rs_tx_disp_ctrl_top_1_4c;
struct _rs_tx_disp_ctrl_top_1_4c {
    unsigned int reg_ktx_pre_insert_08_position             :16;
    unsigned int reg_ktx_pre_insert_09_position             :16;
};
#define tx_disp_ctrl_top_1_4c(val) ((rs_tx_disp_ctrl_top_1_4c*)&(val))



#define TX_DISP_CTRL_TOP_1_50                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x50)

#define TX_DISP_CTRL_TOP_1_50_struct                                     rs_tx_disp_ctrl_top_1_50

typedef struct _rs_tx_disp_ctrl_top_1_50  rs_tx_disp_ctrl_top_1_50;
struct _rs_tx_disp_ctrl_top_1_50 {
    unsigned int reg_ktx_pre_insert_10_position             :16;
    unsigned int reg_ktx_pre_insert_11_position             :16;
};
#define tx_disp_ctrl_top_1_50(val) ((rs_tx_disp_ctrl_top_1_50*)&(val))



#define TX_DISP_CTRL_TOP_1_5C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x5C)

#define TX_DISP_CTRL_TOP_1_5C_struct                                     rs_tx_disp_ctrl_top_1_5c

typedef struct _rs_tx_disp_ctrl_top_1_5c  rs_tx_disp_ctrl_top_1_5c;
struct _rs_tx_disp_ctrl_top_1_5c {
    unsigned int reg_ktx_pre_insert_00_type                 : 4;
    unsigned int reg_ktx_pre_insert_01_type                 : 4;
    unsigned int reg_ktx_pre_insert_02_type                 : 4;
    unsigned int reg_ktx_pre_insert_03_type                 : 4;
    unsigned int reg_ktx_pre_insert_04_type                 : 4;
    unsigned int reg_ktx_pre_insert_05_type                 : 4;
    unsigned int reg_ktx_pre_insert_06_type                 : 4;
    unsigned int reg_ktx_pre_insert_07_type                 : 4;
};
#define tx_disp_ctrl_top_1_5c(val) ((rs_tx_disp_ctrl_top_1_5c*)&(val))



#define TX_DISP_CTRL_TOP_1_60                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x60)

#define TX_DISP_CTRL_TOP_1_60_struct                                     rs_tx_disp_ctrl_top_1_60

typedef struct _rs_tx_disp_ctrl_top_1_60  rs_tx_disp_ctrl_top_1_60;
struct _rs_tx_disp_ctrl_top_1_60 {
    unsigned int reg_ktx_pre_insert_08_type                 : 4;
    unsigned int reg_ktx_pre_insert_09_type                 : 4;
    unsigned int reg_ktx_pre_insert_10_type                 : 4;
    unsigned int reg_ktx_pre_insert_11_type                 : 4;
    unsigned int reserved                                   :16;
};
#define tx_disp_ctrl_top_1_60(val) ((rs_tx_disp_ctrl_top_1_60*)&(val))



#define TX_DISP_CTRL_TOP_1_64                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x64)

#define TX_DISP_CTRL_TOP_1_64_struct                                     rs_tx_disp_ctrl_top_1_64

typedef struct _rs_tx_disp_ctrl_top_1_64  rs_tx_disp_ctrl_top_1_64;
struct _rs_tx_disp_ctrl_top_1_64 {
    unsigned int reg_ktx_pre_insert_dummy_value             :24;
    unsigned int reserved                                   : 8;
};
#define tx_disp_ctrl_top_1_64(val) ((rs_tx_disp_ctrl_top_1_64*)&(val))



#define TX_DISP_CTRL_TOP_1_68                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x68)

#define TX_DISP_CTRL_TOP_1_68_struct                                     rs_tx_disp_ctrl_top_1_68

typedef struct _rs_tx_disp_ctrl_top_1_68  rs_tx_disp_ctrl_top_1_68;
struct _rs_tx_disp_ctrl_top_1_68 {
    unsigned int reg_ktx_dg_rev_mode0_00_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_01_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_02_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_03_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_04_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_05_sel                : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_68(val) ((rs_tx_disp_ctrl_top_1_68*)&(val))



#define TX_DISP_CTRL_TOP_1_6C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x6C)

#define TX_DISP_CTRL_TOP_1_6C_struct                                     rs_tx_disp_ctrl_top_1_6c

typedef struct _rs_tx_disp_ctrl_top_1_6c  rs_tx_disp_ctrl_top_1_6c;
struct _rs_tx_disp_ctrl_top_1_6c {
    unsigned int reg_ktx_dg_rev_mode0_10_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_11_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_12_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_13_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_14_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode0_15_sel                : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_6c(val) ((rs_tx_disp_ctrl_top_1_6c*)&(val))



#define TX_DISP_CTRL_TOP_1_78                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x78)

#define TX_DISP_CTRL_TOP_1_78_struct                                     rs_tx_disp_ctrl_top_1_78

typedef struct _rs_tx_disp_ctrl_top_1_78  rs_tx_disp_ctrl_top_1_78;
struct _rs_tx_disp_ctrl_top_1_78 {
    unsigned int reg_ktx_dg_rev_mode1_00_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_01_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_02_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_03_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_04_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_05_sel                : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_78(val) ((rs_tx_disp_ctrl_top_1_78*)&(val))



#define TX_DISP_CTRL_TOP_1_7C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x7C)

#define TX_DISP_CTRL_TOP_1_7C_struct                                     rs_tx_disp_ctrl_top_1_7c

typedef struct _rs_tx_disp_ctrl_top_1_7c  rs_tx_disp_ctrl_top_1_7c;
struct _rs_tx_disp_ctrl_top_1_7c {
    unsigned int reg_ktx_dg_rev_mode1_10_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_11_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_12_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_13_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_14_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode1_15_sel                : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_7c(val) ((rs_tx_disp_ctrl_top_1_7c*)&(val))



#define TX_DISP_CTRL_TOP_1_80                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x80)

#define TX_DISP_CTRL_TOP_1_80_struct                                     rs_tx_disp_ctrl_top_1_80

typedef struct _rs_tx_disp_ctrl_top_1_80  rs_tx_disp_ctrl_top_1_80;
struct _rs_tx_disp_ctrl_top_1_80 {
    unsigned int reg_ktx_dg_rev_mode2_00_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_01_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_02_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_03_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_04_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_05_sel                : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_80(val) ((rs_tx_disp_ctrl_top_1_80*)&(val))



#define TX_DISP_CTRL_TOP_1_84                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x84)

#define TX_DISP_CTRL_TOP_1_84_struct                                     rs_tx_disp_ctrl_top_1_84

typedef struct _rs_tx_disp_ctrl_top_1_84  rs_tx_disp_ctrl_top_1_84;
struct _rs_tx_disp_ctrl_top_1_84 {
    unsigned int reg_ktx_dg_rev_mode2_10_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_11_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_12_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_13_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_14_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode2_15_sel                : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_84(val) ((rs_tx_disp_ctrl_top_1_84*)&(val))



#define TX_DISP_CTRL_TOP_1_88                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x88)

#define TX_DISP_CTRL_TOP_1_88_struct                                     rs_tx_disp_ctrl_top_1_88

typedef struct _rs_tx_disp_ctrl_top_1_88  rs_tx_disp_ctrl_top_1_88;
struct _rs_tx_disp_ctrl_top_1_88 {
    unsigned int reg_ktx_dg_rev_mode3_00_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_01_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_02_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_03_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_04_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_05_sel                : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_88(val) ((rs_tx_disp_ctrl_top_1_88*)&(val))



#define TX_DISP_CTRL_TOP_1_8C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x8C)

#define TX_DISP_CTRL_TOP_1_8C_struct                                     rs_tx_disp_ctrl_top_1_8c

typedef struct _rs_tx_disp_ctrl_top_1_8c  rs_tx_disp_ctrl_top_1_8c;
struct _rs_tx_disp_ctrl_top_1_8c {
    unsigned int reg_ktx_dg_rev_mode3_10_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_11_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_12_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_13_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_14_sel                : 5;
    unsigned int reg_ktx_dg_rev_mode3_15_sel                : 5;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_8c(val) ((rs_tx_disp_ctrl_top_1_8c*)&(val))



#define TX_DISP_CTRL_TOP_1_90                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x90)

#define TX_DISP_CTRL_TOP_1_90_struct                                     rs_tx_disp_ctrl_top_1_90

typedef struct _rs_tx_disp_ctrl_top_1_90  rs_tx_disp_ctrl_top_1_90;
struct _rs_tx_disp_ctrl_top_1_90 {
    unsigned int reg_ktx_top_patt_enable                    : 1;
    unsigned int reg_ktx_top_patt_slf_gen                   : 1;
    unsigned int reg_ktx_top_patt_mode                      : 4;
    unsigned int reg_ktx_top_patt_httl_mode                 : 2;
    unsigned int reg_ktx_top_patt_httl_var                  : 4;
    unsigned int reserved                                   :20;
};
#define tx_disp_ctrl_top_1_90(val) ((rs_tx_disp_ctrl_top_1_90*)&(val))



#define TX_DISP_CTRL_TOP_1_94                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x94)

#define TX_DISP_CTRL_TOP_1_94_struct                                     rs_tx_disp_ctrl_top_1_94

typedef struct _rs_tx_disp_ctrl_top_1_94  rs_tx_disp_ctrl_top_1_94;
struct _rs_tx_disp_ctrl_top_1_94 {
    unsigned int reg_ktx_top_patt_htotal                    :16;
    unsigned int reg_ktx_top_patt_vtotal                    :16;
};
#define tx_disp_ctrl_top_1_94(val) ((rs_tx_disp_ctrl_top_1_94*)&(val))



#define TX_DISP_CTRL_TOP_1_98                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x98)

#define TX_DISP_CTRL_TOP_1_98_struct                                     rs_tx_disp_ctrl_top_1_98

typedef struct _rs_tx_disp_ctrl_top_1_98  rs_tx_disp_ctrl_top_1_98;
struct _rs_tx_disp_ctrl_top_1_98 {
    unsigned int reg_ktx_top_patt_hact                      :16;
    unsigned int reg_ktx_top_patt_vact                      :16;
};
#define tx_disp_ctrl_top_1_98(val) ((rs_tx_disp_ctrl_top_1_98*)&(val))



#define TX_DISP_CTRL_TOP_1_9C                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0x9C)

#define TX_DISP_CTRL_TOP_1_9C_struct                                     rs_tx_disp_ctrl_top_1_9c

typedef struct _rs_tx_disp_ctrl_top_1_9c  rs_tx_disp_ctrl_top_1_9c;
struct _rs_tx_disp_ctrl_top_1_9c {
    unsigned int reg_ktx_top_patt_hs_width                  : 8;
    unsigned int reg_ktx_top_patt_vs_width                  : 8;
    unsigned int reg_ktx_top_patt_hs_bporch                 : 8;
    unsigned int reg_ktx_top_patt_vs_bporch                 : 8;
};
#define tx_disp_ctrl_top_1_9c(val) ((rs_tx_disp_ctrl_top_1_9c*)&(val))



#define TX_DISP_CTRL_TOP_1_A0                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xA0)

#define TX_DISP_CTRL_TOP_1_A0_struct                                     rs_tx_disp_ctrl_top_1_a0

typedef struct _rs_tx_disp_ctrl_top_1_a0  rs_tx_disp_ctrl_top_1_a0;
struct _rs_tx_disp_ctrl_top_1_a0 {
    unsigned int reg_ktx_top_patt_0e_grid                   : 8;
    unsigned int reg_ktx_top_patt_0f_region                 :12;
    unsigned int reg_ktx_top_patt_pre_de_vs_bporch          : 8;
    unsigned int reserved                                   : 4;
};
#define tx_disp_ctrl_top_1_a0(val) ((rs_tx_disp_ctrl_top_1_a0*)&(val))



#define TX_DISP_CTRL_TOP_1_A4                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xA4)

#define TX_DISP_CTRL_TOP_1_A4_struct                                     rs_tx_disp_ctrl_top_1_a4

typedef struct _rs_tx_disp_ctrl_top_1_a4  rs_tx_disp_ctrl_top_1_a4;
struct _rs_tx_disp_ctrl_top_1_a4 {
    unsigned int reg_ktx_top_patt_r0                        :10;
    unsigned int reg_ktx_top_patt_g0                        :10;
    unsigned int reg_ktx_top_patt_b0                        :10;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_a4(val) ((rs_tx_disp_ctrl_top_1_a4*)&(val))



#define TX_DISP_CTRL_TOP_1_A8                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xA8)

#define TX_DISP_CTRL_TOP_1_A8_struct                                     rs_tx_disp_ctrl_top_1_a8

typedef struct _rs_tx_disp_ctrl_top_1_a8  rs_tx_disp_ctrl_top_1_a8;
struct _rs_tx_disp_ctrl_top_1_a8 {
    unsigned int reg_ktx_top_patt_r1                        :10;
    unsigned int reg_ktx_top_patt_g1                        :10;
    unsigned int reg_ktx_top_patt_b1                        :10;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_a8(val) ((rs_tx_disp_ctrl_top_1_a8*)&(val))



#define TX_DISP_CTRL_TOP_1_AC                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xAC)

#define TX_DISP_CTRL_TOP_1_AC_struct                                     rs_tx_disp_ctrl_top_1_ac

typedef struct _rs_tx_disp_ctrl_top_1_ac  rs_tx_disp_ctrl_top_1_ac;
struct _rs_tx_disp_ctrl_top_1_ac {
    unsigned int reg_ktx_top_patt_r2                        :10;
    unsigned int reg_ktx_top_patt_g2                        :10;
    unsigned int reg_ktx_top_patt_b2                        :10;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_ac(val) ((rs_tx_disp_ctrl_top_1_ac*)&(val))



#define TX_DISP_CTRL_TOP_1_B0                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xB0)

#define TX_DISP_CTRL_TOP_1_B0_struct                                     rs_tx_disp_ctrl_top_1_b0

typedef struct _rs_tx_disp_ctrl_top_1_b0  rs_tx_disp_ctrl_top_1_b0;
struct _rs_tx_disp_ctrl_top_1_b0 {
    unsigned int reg_ktx_top_patt_r3                        :10;
    unsigned int reg_ktx_top_patt_g3                        :10;
    unsigned int reg_ktx_top_patt_b3                        :10;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_b0(val) ((rs_tx_disp_ctrl_top_1_b0*)&(val))



#define TX_DISP_CTRL_TOP_1_B4                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xB4)

#define TX_DISP_CTRL_TOP_1_B4_struct                                     rs_tx_disp_ctrl_top_1_b4

typedef struct _rs_tx_disp_ctrl_top_1_b4  rs_tx_disp_ctrl_top_1_b4;
struct _rs_tx_disp_ctrl_top_1_b4 {
    unsigned int regr_ktx_top_in_hact                       :15;
    unsigned int reserved                                   : 1;
    unsigned int regr_ktx_top_in_vact                       :15;
    unsigned int reserved_1                                 : 1;
};
#define tx_disp_ctrl_top_1_b4(val) ((rs_tx_disp_ctrl_top_1_b4*)&(val))



#define TX_DISP_CTRL_TOP_1_B8                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xB8)

#define TX_DISP_CTRL_TOP_1_B8_struct                                     rs_tx_disp_ctrl_top_1_b8

typedef struct _rs_tx_disp_ctrl_top_1_b8  rs_tx_disp_ctrl_top_1_b8;
struct _rs_tx_disp_ctrl_top_1_b8 {
    unsigned int reg_disp_ctrl_post_cursor_3d               : 1;
    unsigned int reg_disp_ctrl_post_cursor_color            : 3;
    unsigned int reserved                                   : 1;
    unsigned int reg_disp_ctrl_post_cursor_en               : 1;
    unsigned int reg_disp_ctrl_post_cursor_lr               : 1;
    unsigned int reg_disp_ctrl_post_cursor_step_en          : 1;
    unsigned int reg_disp_ctrl_post_cursor_fcnt             :11;
    unsigned int reserved_1                                 :13;
};
#define tx_disp_ctrl_top_1_b8(val) ((rs_tx_disp_ctrl_top_1_b8*)&(val))



#define TX_DISP_CTRL_TOP_1_BC                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xBC)

#define TX_DISP_CTRL_TOP_1_BC_struct                                     rs_tx_disp_ctrl_top_1_bc

typedef struct _rs_tx_disp_ctrl_top_1_bc  rs_tx_disp_ctrl_top_1_bc;
struct _rs_tx_disp_ctrl_top_1_bc {
    unsigned int reg_disp_ctrl_post_cursor_hcnt             :16;
    unsigned int reg_disp_ctrl_post_cursor_hstep            : 6;
    unsigned int reserved                                   : 2;
    unsigned int reg_disp_ctrl_post_cursor_hwidth           : 4;
    unsigned int reserved_1                                 : 4;
};
#define tx_disp_ctrl_top_1_bc(val) ((rs_tx_disp_ctrl_top_1_bc*)&(val))



#define TX_DISP_CTRL_TOP_1_C0                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xC0)

#define TX_DISP_CTRL_TOP_1_C0_struct                                     rs_tx_disp_ctrl_top_1_c0

typedef struct _rs_tx_disp_ctrl_top_1_c0  rs_tx_disp_ctrl_top_1_c0;
struct _rs_tx_disp_ctrl_top_1_c0 {
    unsigned int reg_disp_ctrl_post_cursor_vcnt             :16;
    unsigned int reg_disp_ctrl_post_cursor_vstep            : 6;
    unsigned int reserved                                   : 2;
    unsigned int reg_disp_ctrl_post_cursor_vwidth           : 4;
    unsigned int reserved_1                                 : 4;
};
#define tx_disp_ctrl_top_1_c0(val) ((rs_tx_disp_ctrl_top_1_c0*)&(val))



#define TX_DISP_CTRL_TOP_1_C4                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xC4)

#define TX_DISP_CTRL_TOP_1_C4_struct                                     rs_tx_disp_ctrl_top_1_c4

typedef struct _rs_tx_disp_ctrl_top_1_c4  rs_tx_disp_ctrl_top_1_c4;
struct _rs_tx_disp_ctrl_top_1_c4 {
    unsigned int regr_disp_ctrl_post_cursor_bd              :30;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_c4(val) ((rs_tx_disp_ctrl_top_1_c4*)&(val))



#define TX_DISP_CTRL_TOP_1_C8                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xC8)

#define TX_DISP_CTRL_TOP_1_C8_struct                                     rs_tx_disp_ctrl_top_1_c8

typedef struct _rs_tx_disp_ctrl_top_1_c8  rs_tx_disp_ctrl_top_1_c8;
struct _rs_tx_disp_ctrl_top_1_c8 {
    unsigned int regr_disp_ctrl_post_cursor_fd              :30;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_c8(val) ((rs_tx_disp_ctrl_top_1_c8*)&(val))



#define TX_DISP_CTRL_TOP_1_D0                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xD0)

#define TX_DISP_CTRL_TOP_1_D0_struct                                     rs_tx_disp_ctrl_top_1_d0

typedef struct _rs_tx_disp_ctrl_top_1_d0  rs_tx_disp_ctrl_top_1_d0;
struct _rs_tx_disp_ctrl_top_1_d0 {
    unsigned int reg_ktx_crc_en                             : 1;
    unsigned int reg_ktx_crc_mode                           : 6;
    unsigned int reg_ktx_crc_fnum                           : 8;
    unsigned int reg_ktx_crc_lnum                           : 8;
    unsigned int reserved                                   : 9;
};
#define tx_disp_ctrl_top_1_d0(val) ((rs_tx_disp_ctrl_top_1_d0*)&(val))



#define TX_DISP_CTRL_TOP_1_D4                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xD4)

#define TX_DISP_CTRL_TOP_1_D4_struct                                     rs_tx_disp_ctrl_top_1_d4

typedef struct _rs_tx_disp_ctrl_top_1_d4  rs_tx_disp_ctrl_top_1_d4;
struct _rs_tx_disp_ctrl_top_1_d4 {
    unsigned int reg_ktx_crc_value_15_0                     :16;
    unsigned int reserved                                   :16;
};
#define tx_disp_ctrl_top_1_d4(val) ((rs_tx_disp_ctrl_top_1_d4*)&(val))



#define TX_DISP_CTRL_TOP_1_D8                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xD8)

#define TX_DISP_CTRL_TOP_1_D8_struct                                     rs_tx_disp_ctrl_top_1_d8

typedef struct _rs_tx_disp_ctrl_top_1_d8  rs_tx_disp_ctrl_top_1_d8;
struct _rs_tx_disp_ctrl_top_1_d8 {
    unsigned int regr_ktx_crc_done                          : 1;
    unsigned int regr_ktx_crc_fail                          : 1;
    unsigned int reserved                                   :30;
};
#define tx_disp_ctrl_top_1_d8(val) ((rs_tx_disp_ctrl_top_1_d8*)&(val))



#define TX_DISP_CTRL_TOP_1_DC                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xDC)

#define TX_DISP_CTRL_TOP_1_DC_struct                                     rs_tx_disp_ctrl_top_1_dc

typedef struct _rs_tx_disp_ctrl_top_1_dc  rs_tx_disp_ctrl_top_1_dc;
struct _rs_tx_disp_ctrl_top_1_dc {
    unsigned int regr_ktx_crc_result_15_0                   :16;
    unsigned int reserved                                   :16;
};
#define tx_disp_ctrl_top_1_dc(val) ((rs_tx_disp_ctrl_top_1_dc*)&(val))



#define TX_DISP_CTRL_TOP_1_E0                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xE0)

#define TX_DISP_CTRL_TOP_1_E0_struct                                     rs_tx_disp_ctrl_top_1_e0

typedef struct _rs_tx_disp_ctrl_top_1_e0  rs_tx_disp_ctrl_top_1_e0;
struct _rs_tx_disp_ctrl_top_1_e0 {
    unsigned int reg_ktx_pre_cut_color                      :30;
    unsigned int reserved                                   : 2;
};
#define tx_disp_ctrl_top_1_e0(val) ((rs_tx_disp_ctrl_top_1_e0*)&(val))



#define TX_DISP_CTRL_TOP_1_E4                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xE4)

#define TX_DISP_CTRL_TOP_1_E4_struct                                     rs_tx_disp_ctrl_top_1_e4

typedef struct _rs_tx_disp_ctrl_top_1_e4  rs_tx_disp_ctrl_top_1_e4;
struct _rs_tx_disp_ctrl_top_1_e4 {
    unsigned int reg_ktx_pre_cut_en                         : 1;
    unsigned int reg_ktx_pre_cut_intvl                      : 8;
    unsigned int reg_ktx_pre_cut_mode                       : 2;
    unsigned int reserved                                   :21;
};
#define tx_disp_ctrl_top_1_e4(val) ((rs_tx_disp_ctrl_top_1_e4*)&(val))



#define TX_DISP_CTRL_TOP_1_E8                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xE8)

#define TX_DISP_CTRL_TOP_1_E8_struct                                     rs_tx_disp_ctrl_top_1_e8

typedef struct _rs_tx_disp_ctrl_top_1_e8  rs_tx_disp_ctrl_top_1_e8;
struct _rs_tx_disp_ctrl_top_1_e8 {
    unsigned int reg_ktx_pre_cut_hend                       :16;
    unsigned int reg_ktx_pre_cut_hsta                       :16;
};
#define tx_disp_ctrl_top_1_e8(val) ((rs_tx_disp_ctrl_top_1_e8*)&(val))



#define TX_DISP_CTRL_TOP_1_F0                                            (HV_DISP_CTRL_TOP_1_BASE_ADDRESS + 0xF0)

#define TX_DISP_CTRL_TOP_1_F0_struct                                     rs_tx_disp_ctrl_top_1_f0

typedef struct _rs_tx_disp_ctrl_top_1_f0  rs_tx_disp_ctrl_top_1_f0;
struct _rs_tx_disp_ctrl_top_1_f0 {
    unsigned int reg_ktx_pre_cut_vend                       :16;
    unsigned int reg_ktx_pre_cut_vsta                       :16;
};
#define tx_disp_ctrl_top_1_f0(val) ((rs_tx_disp_ctrl_top_1_f0*)&(val))



#endif