#ifndef _HV_PAGE_HT7315_C422_420_01_H_
#define _HV_PAGE_HT7315_C422_420_01_H_

#ifndef HV_C422_420_01_BASE_ADDRESS
    #define HV_C422_420_01_BASE_ADDRESS                                         0x11022600
#endif


#define DISP_TOP_C422_420_01_00                                          (HV_C422_420_01_BASE_ADDRESS + 0x00)

#define DISP_TOP_C422_420_01_00_struct                                   rs_disp_top_c422_420_01_00

typedef struct _rs_disp_top_c422_420_01_00  rs_disp_top_c422_420_01_00;
struct _rs_disp_top_c422_420_01_00 {
    unsigned int reg_01_422_420_en                          : 1;
    unsigned int reg_01_en                                  : 1;
    unsigned int reg_01_en_no_latch                         : 1;
    unsigned int reg_01_test_pattern                        : 1;
    unsigned int reg_01_clk_en                              : 1;
    unsigned int reserved                                   :27;
};
#define disp_top_c422_420_01_00(val) ((rs_disp_top_c422_420_01_00*)&(val))



#define DISP_TOP_C422_420_01_04                                          (HV_C422_420_01_BASE_ADDRESS + 0x04)

#define DISP_TOP_C422_420_01_04_struct                                   rs_disp_top_c422_420_01_04

typedef struct _rs_disp_top_c422_420_01_04  rs_disp_top_c422_420_01_04;
struct _rs_disp_top_c422_420_01_04 {
    unsigned int reg_01_422_420_3coef_0                     : 8;
    unsigned int reg_01_422_420_3coef_1                     : 8;
    unsigned int reg_01_422_420_3coef_2                     : 8;
    unsigned int reg_01_cbcr_pos_adj                        : 1;
    unsigned int reserved                                   : 7;
};
#define disp_top_c422_420_01_04(val) ((rs_disp_top_c422_420_01_04*)&(val))



#define DISP_TOP_C422_420_01_08                                          (HV_C422_420_01_BASE_ADDRESS + 0x08)

#define DISP_TOP_C422_420_01_08_struct                                   rs_disp_top_c422_420_01_08

typedef struct _rs_disp_top_c422_420_01_08  rs_disp_top_c422_420_01_08;
struct _rs_disp_top_c422_420_01_08 {
    unsigned int reg_01_htotal                              :13;
    unsigned int reg_01_de_en                               : 3;
    unsigned int reg_01_config_0                            : 8;
    unsigned int reg_01_config_1                            : 8;
};
#define disp_top_c422_420_01_08(val) ((rs_disp_top_c422_420_01_08*)&(val))



#define DISP_TOP_C422_420_01_0C                                          (HV_C422_420_01_BASE_ADDRESS + 0x0C)

#define DISP_TOP_C422_420_01_0C_struct                                   rs_disp_top_c422_420_01_0c

typedef struct _rs_disp_top_c422_420_01_0c  rs_disp_top_c422_420_01_0c;
struct _rs_disp_top_c422_420_01_0c {
    unsigned int reg_01_hact                                :13;
    unsigned int reg_01_vact                                :13;
    unsigned int reserved                                   : 6;
};
#define disp_top_c422_420_01_0c(val) ((rs_disp_top_c422_420_01_0c*)&(val))



#define DISP_TOP_C422_420_01_10                                          (HV_C422_420_01_BASE_ADDRESS + 0x10)

#define DISP_TOP_C422_420_01_10_struct                                   rs_disp_top_c422_420_01_10

typedef struct _rs_disp_top_c422_420_01_10  rs_disp_top_c422_420_01_10;
struct _rs_disp_top_c422_420_01_10 {
    unsigned int regr_01_rd_input_hact_back                 :13;
    unsigned int regr_01_rd_input_vact_back                 :13;
    unsigned int reserved                                   : 6;
};
#define disp_top_c422_420_01_10(val) ((rs_disp_top_c422_420_01_10*)&(val))



#define DISP_TOP_C422_420_01_30                                          (HV_C422_420_01_BASE_ADDRESS + 0x30)

#define DISP_TOP_C422_420_01_30_struct                                   rs_disp_top_c422_420_01_30

typedef struct _rs_disp_top_c422_420_01_30  rs_disp_top_c422_420_01_30;
struct _rs_disp_top_c422_420_01_30 {
    unsigned int reg_01_mem_reg0                            : 8;
    unsigned int reg_01_mem_reg1                            : 8;
    unsigned int reg_01_mem_reg2                            : 8;
    unsigned int reg_01_mem_reg3                            : 8;
};
#define disp_top_c422_420_01_30(val) ((rs_disp_top_c422_420_01_30*)&(val))



#define DISP_TOP_C422_420_01_34                                          (HV_C422_420_01_BASE_ADDRESS + 0x34)

#define DISP_TOP_C422_420_01_34_struct                                   rs_disp_top_c422_420_01_34

typedef struct _rs_disp_top_c422_420_01_34  rs_disp_top_c422_420_01_34;
struct _rs_disp_top_c422_420_01_34 {
    unsigned int reg_01_mem_reg4                            : 8;
    unsigned int reg_01_mem_reg5                            : 8;
    unsigned int reg_01_mem_reg6                            : 8;
    unsigned int reserved                                   : 8;
};
#define disp_top_c422_420_01_34(val) ((rs_disp_top_c422_420_01_34*)&(val))



#define DISP_TOP_C422_420_01_38                                          (HV_C422_420_01_BASE_ADDRESS + 0x38)

#define DISP_TOP_C422_420_01_38_struct                                   rs_disp_top_c422_420_01_38

typedef struct _rs_disp_top_c422_420_01_38  rs_disp_top_c422_420_01_38;
struct _rs_disp_top_c422_420_01_38 {
    unsigned int reg_01_mem_ema0                            :16;
    unsigned int reg_01_mem_ema1                            :16;
};
#define disp_top_c422_420_01_38(val) ((rs_disp_top_c422_420_01_38*)&(val))



#define DISP_TOP_C422_420_01_3C                                          (HV_C422_420_01_BASE_ADDRESS + 0x3C)

#define DISP_TOP_C422_420_01_3C_struct                                   rs_disp_top_c422_420_01_3c

typedef struct _rs_disp_top_c422_420_01_3c  rs_disp_top_c422_420_01_3c;
struct _rs_disp_top_c422_420_01_3c {
    unsigned int reg_01_mem_ema2                            :16;
    unsigned int reg_01_mem_ema3                            :16;
};
#define disp_top_c422_420_01_3c(val) ((rs_disp_top_c422_420_01_3c*)&(val))



#define DISP_TOP_C422_420_01_40                                          (HV_C422_420_01_BASE_ADDRESS + 0x40)

#define DISP_TOP_C422_420_01_40_struct                                   rs_disp_top_c422_420_01_40

typedef struct _rs_disp_top_c422_420_01_40  rs_disp_top_c422_420_01_40;
struct _rs_disp_top_c422_420_01_40 {
    unsigned int reg_01_mem_ema4                            :16;
    unsigned int reg_01_mem_ema5                            :16;
};
#define disp_top_c422_420_01_40(val) ((rs_disp_top_c422_420_01_40*)&(val))



#define DISP_TOP_C422_420_01_44                                          (HV_C422_420_01_BASE_ADDRESS + 0x44)

#define DISP_TOP_C422_420_01_44_struct                                   rs_disp_top_c422_420_01_44

typedef struct _rs_disp_top_c422_420_01_44  rs_disp_top_c422_420_01_44;
struct _rs_disp_top_c422_420_01_44 {
    unsigned int reg_01_mem_ema6                            :16;
    unsigned int reserved                                   :16;
};
#define disp_top_c422_420_01_44(val) ((rs_disp_top_c422_420_01_44*)&(val))



#define DISP_TOP_C422_420_01_48                                          (HV_C422_420_01_BASE_ADDRESS + 0x48)

#define DISP_TOP_C422_420_01_48_struct                                   rs_disp_top_c422_420_01_48

typedef struct _rs_disp_top_c422_420_01_48  rs_disp_top_c422_420_01_48;
struct _rs_disp_top_c422_420_01_48 {
    unsigned int regr_01_mem_ro_0                           : 4;
    unsigned int regr_01_mem_ro_1                           : 4;
    unsigned int regr_01_mem_ro_2                           : 4;
    unsigned int regr_01_mem_ro_3                           : 4;
    unsigned int regr_01_mem_ro_4                           : 4;
    unsigned int regr_01_mem_ro_5                           : 4;
    unsigned int regr_01_mem_ro_6                           : 4;
    unsigned int reserved                                   : 4;
};
#define disp_top_c422_420_01_48(val) ((rs_disp_top_c422_420_01_48*)&(val))



#define DISP_TOP_C422_420_01_4C                                          (HV_C422_420_01_BASE_ADDRESS + 0x4C)

#define DISP_TOP_C422_420_01_4C_struct                                   rs_disp_top_c422_420_01_4c

typedef struct _rs_disp_top_c422_420_01_4c  rs_disp_top_c422_420_01_4c;
struct _rs_disp_top_c422_420_01_4c {
    unsigned int reg_01_cursor_en                           : 1;
    unsigned int reg_01_cursor_3d                           : 1;
    unsigned int reg_01_cursor_lr                           : 1;
    unsigned int reg_01_cursor_hwidth                       : 4;
    unsigned int reg_01_cursor_vwidth                       : 4;
    unsigned int reg_01_cursor_color                        : 3;
    unsigned int regr_01_cursor_data_c1                     :12;
    unsigned int reserved                                   : 6;
};
#define disp_top_c422_420_01_4c(val) ((rs_disp_top_c422_420_01_4c*)&(val))



#define DISP_TOP_C422_420_01_50                                          (HV_C422_420_01_BASE_ADDRESS + 0x50)

#define DISP_TOP_C422_420_01_50_struct                                   rs_disp_top_c422_420_01_50

typedef struct _rs_disp_top_c422_420_01_50  rs_disp_top_c422_420_01_50;
struct _rs_disp_top_c422_420_01_50 {
    unsigned int regr_01_cursor_data_c2                     :12;
    unsigned int regr_01_cursor_data_c3                     :12;
    unsigned int reserved                                   : 8;
};
#define disp_top_c422_420_01_50(val) ((rs_disp_top_c422_420_01_50*)&(val))



#define DISP_TOP_C422_420_01_54                                          (HV_C422_420_01_BASE_ADDRESS + 0x54)

#define DISP_TOP_C422_420_01_54_struct                                   rs_disp_top_c422_420_01_54

typedef struct _rs_disp_top_c422_420_01_54  rs_disp_top_c422_420_01_54;
struct _rs_disp_top_c422_420_01_54 {
    unsigned int reg_01_cursor_hcnt                         :16;
    unsigned int reg_01_cursor_vcnt                         :16;
};
#define disp_top_c422_420_01_54(val) ((rs_disp_top_c422_420_01_54*)&(val))



#endif