first push,43inch demo

Makefile

@@ -0,0 +1,2 @@
+
+include build/Makefile

build/Makefile

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+
+export CONFIG_FILE = .config
+export ROOT_DIR = $(shell pwd)/..
+export BUILD_DIR = $(ROOT_DIR)/build
+export OUT_DIR = $(ROOT_DIR)/out
+export SDK_DIR=$(ROOT_DIR)/sdk
+export SDK_BOOT_DIR=$(SDK_DIR)/Boot
+export SDK_COMMON_DIR=$(SDK_DIR)/Common
+export SDK_DRIVER_DIR=$(SDK_DIR)/Driver
+export SDK_MIDDLEWARE_DIR=$(SDK_DIR)/MiddleWare
+export SDK_PQ_DIR=$(SDK_DIR)/PQlib
+export SDK_PM_DIR=$(SDK_DIR)/PM
+export SDK_VOS_DIR=$(SDK_DIR)/Vos
+export USER_DIR=$(ROOT_DIR)/user
+export USER_DDCCI_DIR=$(ROOT_DIR)/user/Comm/DDCCI
+export USER_DDCCI_PRODUCT_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/DDCCI
+export USER_OSD_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/OSD
+export USER_DATABASE_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/DataBase
+export USER_PINSHARE_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/Pinshare
+export USER_LED_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/Led
+export USER_PANEL_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/Panel
+export USER_KEYPAD_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/Keypad
+export USER_IR_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/IR
+export USER_EDID_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/EDID
+export USER_PQ_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/PQ
+export USER_PLATFORM_DIR=$(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/Platform
+export TOOLS_DIR=$(ROOT_DIR)/tools
+export TOOLS_FLASH_DIR=$(ROOT_DIR)/tools/flash_tool
+export TOOLS_OSD_DIR=$(ROOT_DIR)/tools/osd_tool
+export TOOLS_PQ_DIR=$(ROOT_DIR)/tools/pq_tool
+export SDK_PREBUILD_DIR=$(ROOT_DIR)/Prebuilds
+
+export CONFIG_SDK_LIB = libboot.a libvos.a libdriver.a libcommon.a  libmiddleware.a
+export CONFIG_USER_LIB = libosd.a libddcci.a libdatabase.a libedid.a libplatform.a
+export CONFIG_SDK_PREBUILD_LIB = libddr.a libpq.a libDispCtrl.a libbcon.a libAesKey.a libHdmiCal.a libDpRxCal.a libHdcpCal.a libHdcpEngine.a libDpuDcw.a
+export CONFIG_SDK_PREBUILD_NO_LIB = libzero.a
+all:
+MULTI_DEPEND_TARGET=
+MULTI_DEPEND_TARGETD=
+MULTI_TARGET_CLEAN=
+
+ifeq ($(wildcard $(ROOT_DIR)/out/$(CONFIG_FILE)),)
+  $(error ".config not exist,please exe ./project_config.sh first" )
+endif
+include $(ROOT_DIR)/out/$(CONFIG_FILE)
+include $(BUILD_DIR)/compile/$(CONFIG_CHIP)/common.inc
+include $(BUILD_DIR)/compile/$(CONFIG_CHIP)/sdk_targets.inc
+include $(BUILD_DIR)/compile/$(CONFIG_CHIP)/user_targets.inc
+#include $(BUILD_DIR)/compile/$(CONFIG_CHIP)/prebuilds.inc
+
+PRE_CHECK:
+	@echo "Compile Begin************************"
+	@mkdir -p $(BUILD_OUT_IMG_DIR)
+	@mkdir -p $(BUILD_OUT_OBJ_DIR)
+	@cp $(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/Prebuilds/$(CONFIG_CHIP)_pm.bin $(BUILD_OUT_IMG_DIR)/
+	@cp $(ROOT_DIR)/prebuilds/*.a $(BUILD_OUT_IMG_DIR)/
+
+
+define POST_CHECK
+ @echo "Compile Finish************************"
+ @echo "Merge Bin*****************************"
+ @dd if=$(BUILD_OUT_IMG_DIR)/$(CONFIG_CHIP)_pm.bin of=$(BUILD_OUT_IMG_DIR)/tmp_pm.bin ibs=32768 conv=sync
+ @cat $(BUILD_OUT_IMG_DIR)/tmp_pm.bin $(BUILD_OUT_IMG_DIR)/Monitor_SOC.bin > $(BUILD_OUT_IMG_DIR)/Monitor_SOC_PM.bin
+ @rm $(BUILD_OUT_IMG_DIR)/tmp_pm.bin
+ @cp $(BUILD_OUT_IMG_DIR)/Monitor_SOC_PM.bin $(OUT_DIR)/
+ @cp $(BUILD_OUT_IMG_DIR)/silicon* $(OUT_DIR)/
+ @cp $(BUILD_OUT_IMG_DIR)/ddr* $(OUT_DIR)/
+ @cp $(BUILD_OUT_IMG_DIR)/$(CONFIG_CHIP)_pm.bin $(OUT_DIR)/pm.bin
+ @echo "Merge Bin Finish**********************"
+endef
+
+all:debug
+
+debug:PRE_CHECK  $(MULTI_DEPEND_TARGETD)
+	@$(MAKE) debug COMPILE_MODE=debug -C "$(BUILD_OUT_OBJ_DIR)" -f $(BUILD_DIR)/Makefile.mk
+	$(call POST_CHECK)
+
+release:PRE_CHECK  $(MULTI_DEPEND_TARGET)
+	@$(MAKE) release COMPILE_MODE=release -C "$(BUILD_OUT_OBJ_DIR)" -f $(BUILD_DIR)/Makefile.mk
+	$(call POST_CHECK)
+#$(MULTI_TARGET_CLEAN)
+clean:
+	@rm -f $(BUILD_OUT_IMG_DIR)/*
+	@rm -f $(BUILD_OUT_OBJ_DIR)/*
+	@rm -rf $(OUT_DIR)/*.bin
+	@rm -rf $(OUT_DIR)/compressed/*
+	@rm -rf $(OUT_DIR)/ddr*
+	@rm -rf $(OUT_DIR)/silicon*
+#IP=172.16.204.41:3333  need input
+gdb:PRE_CHECK  $(MULTI_DEPEND_TARGETD)
+	@$(MAKE) gdb COMPILE_MODE=debug  -C "$(BUILD_OUT_OBJ_DIR)" -f $(BUILD_DIR)/Makefile.mk
+
+

build/Makefile.mk

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+
+include $(BUILD_DIR)/compile/$(CONFIG_CHIP)/common.inc
+MONITOR_SOC_NAME=Monitor_SOC
+VPATH = $(SDK_MIDDLEWARE_DIR)
+
+INCLUDES = -I$(SDK_BOOT_DIR)/../Driver/Chip/$(CONFIG_CHIP)
+INCLUDES += -I$(SDK_BOOT_DIR)/../Driver/Chip/$(CONFIG_CHIP)/regs
+INCLUDES += -I$(SDK_VOS_DIR)/inc
+INCLUDES += -I$(SDK_VOS_DIR)/risc/inc
+INCLUDES += -I$(SDK_VOS_DIR)/freertos/FreeRTOS/Include
+INCLUDES += -I$(SDK_VOS_DIR)/freertos/FreeRTOS/Source/include
+INCLUDES += -I$(SDK_VOS_DIR)/freertos/FreeRTOS/Source/portable/GCC/RISC32
+
+
+INCLUDES += -I$(SDK_COMMON_DIR)
+INCLUDES += -I$(SDK_COMMON_DIR)/Util/HvQueue/inc
+INCLUDES += -I$(SDK_COMMON_DIR)/Util/Utilities/inc
+INCLUDES += -I$(SDK_COMMON_DIR)/Event
+INCLUDES += -I$(SDK_COMMON_DIR)/Assert
+INCLUDES += -I$(SDK_COMMON_DIR)/Timer/inc
+INCLUDES += -I$(SDK_COMMON_DIR)/Database/inc
+INCLUDES += -I$(SDK_COMMON_DIR)/Debug/LetterShell/inc
+
+INCLUDES += -I$(SDK_DIR)
+INCLUDES += -I$(SDK_DIR)/MiddleWare/ChannelManager/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/PowerManager/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/InputPortManager/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/InputPortManager/Ddcci/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/InputPortManager/DisplayPort/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/InputPortManager/HDCP/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/InputPortManager/HDMI/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/PanelManager/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/RunTime/SystemTask/inc
+INCLUDES += -I$(USER_DIR)/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/System/EventHub/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/RunTime/OsdTask/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/RunTime/UrgentTask/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/RunTime/UsbTask/inc
+INCLUDES += -I$(SDK_DIR)/MiddleWare/RunTime/AmbientLight/inc
+INCLUDES += -I$(USER_DIR)/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/Pq
+
+LINK_SCRIPT_DIR = $(BUILD_DIR)/scripts/ldscript/$(CONFIG_CHIP)
+LINK_SCRIPT = $(LINK_SCRIPT_DIR)/$(CONFIG_CHIP).ld
+LINK_SCRIPT_DB = $(LINK_SCRIPT_DIR)/$(CONFIG_CHIP)-db.ld
+LIB_INCLUDE= -L$(LINK_SCRIPT_DIR) 
+LIB_STATIC= $(addprefix $(BUILD_OUT_IMG_DIR)/,$(CONFIG_SDK_LIB)) $(addprefix $(BUILD_OUT_IMG_DIR)/,$(CONFIG_USER_LIB)) $(addprefix $(BUILD_OUT_IMG_DIR)/,$(CONFIG_SDK_PREBUILD_LIB)) $(addprefix $(BUILD_OUT_IMG_DIR)/,$(CONFIG_SDK_PREBUILD_NO_LIB))
+
+
+OBJ_MONITOR_SOC_APP_C = $(wildcard $(SDK_MIDDLEWARE_DIR)/*.c)
+OBJ_MONITOR_SOC_APP_C_NODIR = $(notdir $(OBJ_MONITOR_SOC_APP_C))
+OBJ_MONITOR_SOC_APP_O = $(OBJ_MONITOR_SOC_APP_C_NODIR:%.c=%.o)
+
+MONITOR_SOC_APP_C_NODIR_O = $(OBJ_MONITOR_SOC_APP_O)
+MONITOR_SOC_APP_C_WITH_DIR_O= $(addprefix $(BUILD_OUT_OBJ_DIR)/,$(MONITOR_SOC_APP_C_NODIR_O))
+
+MONITOR_SOC_APP = $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).bin
+
+debug:$(MONITOR_SOC_APP)
+release:$(MONITOR_SOC_APP)
+
+gdb:$(MONITOR_SOC_APP)
+	$(HEADER)$(GDB) $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf -x "$(BUILD_DIR)/scripts/risc.gdbinit" -ex target\ remote\ $(IP) -ex set\ endian\ little -ex mon\ halt
+
+
+define PRINT_SECTION_INFO
+ $(HEADER)$(OBJDUMP) -hww $1
+endef 
+
+$(MONITOR_SOC_APP):$(MONITOR_SOC_APP_C_NODIR_O) $(LIB_STATIC)
+	$(HEADER)$(CC) $(LIB_INCLUDE) -T$(LINK_SCRIPT) $(LD_FLAG) $(MONITOR_SOC_APP_C_WITH_DIR_O)  -o $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf -Wl,-Map=$(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).map -Wl,-start-group $(LIB_STATIC) -lc -lm -lgcc -Wl,-end-group
+	$(HEADER)$(OBJCOPY) -O binary $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf $@
+	$(HEADER)$(OBJCOPY) -O binary $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf --only-section=.boot_text --only-section=.boot_rodata --only-section=.boot_data --only-section=.boot_vector $(BUILD_OUT_IMG_DIR)/ram-$(MONITOR_SOC_NAME).bin
+	$(HEADER)$(OBJCOPY) -O binary $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf --only-section=.text  --only-section=.rodata --only-section=.data $(BUILD_OUT_IMG_DIR)/ddr-$(MONITOR_SOC_NAME).bin
+	$(HEADER)$(OBJCOPY) -O binary $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf --only-section=.boot_rom_text --only-section=.boot_text --only-section=.boot_rodata --only-section=.boot_data --only-section=.boot_vector $(BUILD_OUT_IMG_DIR)/silicon_boot.bin
+#	$(HEADER)$(OBJDUMP) -D -S $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf > $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).S
+	$(call PRINT_SECTION_INFO,$(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf)
+	$(HEADER)$(CC) $(LIB_INCLUDE) -T$(LINK_SCRIPT_DB) $(LD_FLAG) $(MONITOR_SOC_APP_C_WITH_DIR_O)  -o $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf-DB -Wl,-Map=$(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).map-DB -Wl,-start-group $(LIB_STATIC) -lc -lm -lgcc -Wl,-end-group
+	$(HEADER)$(OBJCOPY) -O binary $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf-DB $@-DB
+	$(HEADER)$(OBJCOPY) -O binary $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf-DB --only-section=.boot_text --only-section=.boot_rodata --only-section=.boot_data --only-section=.boot_vector $(BUILD_OUT_IMG_DIR)/ram-$(MONITOR_SOC_NAME).bin-DB
+	$(HEADER)$(OBJCOPY) -O binary $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf-DB --only-section=.text  --only-section=.rodata --only-section=.data $(BUILD_OUT_IMG_DIR)/ddr-$(MONITOR_SOC_NAME).bin-DB
+	$(HEADER)$(OBJCOPY) -O binary $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf-DB --only-section=.boot_rom_text --only-section=.boot_text --only-section=.boot_rodata --only-section=.boot_data --only-section=.boot_vector $(BUILD_OUT_IMG_DIR)/silicon_boot.bin-DB
+#	$(HEADER)$(OBJDUMP) -D -S $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf-DB > $(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME)-DB.S
+	$(call PRINT_SECTION_INFO,$(BUILD_OUT_IMG_DIR)/$(MONITOR_SOC_NAME).elf-DB)
+
+

build/common_config.sh

@@ -0,0 +1,88 @@
+#!/bin/bash
+#strVendor='hiview'
+#strProject='ht7315_evb'
+#strChip='ht7315'
+strDate=`date "+%Y-%m-%d %H:%M:%S"`
+
+funWriteLog()
+{
+	strLog="$strDate  $*"
+	echo $strLog
+}
+
+funGenerateConfigFile()
+{
+	: > $1
+
+	if [ -f $2/$strChip/common.config ]
+	then
+		while read strLine
+		do
+			if [ "$strLine" != "" -a "$strLine" != " " -a "$strLine" != "  " -a "$strLine" != "   " ]
+			then
+				echo "export $strLine">>$1
+			fi
+		done < $2/$strChip/common.config
+	else
+		funWriteLog "$2/$strChip/common.config not exist"
+	fi
+
+
+	if [ -f  $projectPath/../user/$strVendor/$strProject/property.config ]
+	then
+		grep "?=" $projectPath/../user/$strVendor/$strProject/property.config > $1.tmp
+	else
+		funWriteLog "$projectPath/../user/$strVendor/$strProject/property.config not exist"
+	fi
+
+	if [ -f  $1.tmp ]
+	then
+		while read strLine
+		do
+			if [ "$strLine" != "" -a "$strLine" != " " -a "$strLine" != "  " -a "$strLine" != "   " ]
+			then
+				echo "export $strLine">>$1
+			fi
+		done < $1.tmp
+	else
+		funWriteLog "$1.tmp not exist"
+	fi
+
+	echo "export CONFIG_VENDOR ?= $strVendor" >>$1
+	echo "export CONFIG_PROJECT ?= $strProject" >>$1
+	echo "export CONFIG_CODE_PATH ?= $srcRootPath" >>$1
+}
+
+funListChoice()
+{
+	echo "******************************************************************************"
+    echo -e "seq \t vendor \t project \t chip"
+	echo -e " 2 \t hiview \t ht7315_evb \t ht7315"
+	echo -e " 8 \t hiview \t ht7315_product  ht7315"
+	echo -e " 9 \t hisense \t G5F \t \t ht7315"
+	echo "******************************************************************************"
+	read strValue
+	case $strValue in
+	   2)
+			strVendor='hiview'
+			strProject='ht7315_evb'
+			strChip='ht7315'
+		;;
+	   8)
+			strVendor='hiview'
+			strProject='ht7315_product'
+			strChip='ht7315'
+		;;
+	   9)
+			strVendor='hisense'
+			strProject='G5F'
+			strChip='ht7315'
+		;;
+	esac
+}
+
+funSelectPara()
+{
+	echo "Please Choose Parameter Config"
+	funListChoice
+}

build/compile/ht7315/common.inc

@@ -0,0 +1,98 @@
+
+BUILD_OUT_IMG_DIR ?= $(ROOT_DIR)/out/$(CONFIG_CHIP)/img
+BUILD_OUT_OBJ_DIR ?= $(ROOT_DIR)/out/$(CONFIG_CHIP)/obj
+
+
+
+LD_FLAG = -EL -nostdlib -Wl,--gc-sections -mips32r3
+C_DEF_FLAG =
+
+C_COMPILE_FLAG = -EL -mips32r3 -mabi=32 -mmt -march=mips32r3 -ffunction-sections -fdata-sections -G0   #mips parameter
+C_COMPILE_FLAG += -Wall -Werror -Wno-unused-variable -Wno-unused-function -Wno-pointer-sign -Wno-format -Wno-unused-but-set-variable -Wno-strict-aliasing -Wno-misleading-indentation  #gcc parameter
+C_COMPILE_FLAG += -D__FILENAME__='"$(subst $(dir $<),,$<)"' #self def parameter
+C_COMPILE_FLAG += -fdebug-prefix-map=$(CONFIG_CODE_PATH)/=./
+
+ifeq ($(CONFIG_HARD_FLOAT),yes)
+  C_COMPILE_FLAG += -mhard-float
+  LD_FLAG += -mhard-float
+  C_DEF_FLAG += -DHV_CONFIG_HARD_FLOAT
+else
+  C_COMPILE_FLAG += -msoft-float
+  LD_FLAG += -msoft-float
+endif
+
+ifeq ($(CONFIG_PRINT),yes)
+  C_DEF_FLAG += -DHV_CONFIG_ENABLE_PRINT
+endif
+
+C_DEF_FLAG += -DHV_CONFIG_CHIP_$(shell echo $(CONFIG_CHIP) | tr '[:lower:]' '[:upper:]')
+C_DEF_FLAG += -DHV_CONFIG_ENDIAN_$(shell echo $(CONFIG_ENDIAN) | tr '[:lower:]' '[:upper:]')
+C_DEF_FLAG += -DHV_CONFIG_ARCH_$(shell echo $(CONFIG_ARCH) | tr '[:lower:]' '[:upper:]')
+
+
+USER_CONFIG_FILE := $(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/property.config
+
+CONFIG_USER_DEFINE := $(shell cat $(USER_CONFIG_FILE) | grep "?=" | awk '{print " -DCONFIG_USER_"$$3}')
+C_DEF_FLAG += $(CONFIG_USER_DEFINE)
+
+#ASM_COMPILE_FLAG = -EL -mips32r3 -mabi=32 -mmt -march=mips32r3 -ffunction-sections -fdata-sections -G0
+#ASM_COMPILE_FLAG += -Wall -Werror -Wno-unused-variable -Wno-unused-function -Wno-pointer-sign -Wno-format -Wno-unused-but-set-variable -Wno-strict-aliasing -Wno-misleading-indentation
+
+#ifeq ($(CONFIG_HARD_FLOAT),yes)
+#  ASM_COMPILE_FLAG += -mhard-float
+#else
+#  ASM_COMPILE_FLAG += -msoft-float
+#endif
+
+LINK_SCRIPT_DIR ?= $(ROOT_DIR)/build/scripts/ldscript/$(CONFIG_CHIP)
+FILE_INC_CONFIG += -include $(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/BoardConfig.h
+FILE_INC_CONFIG += -include $(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/ProjectConfig.h
+FILE_INC_CONFIG += -include $(ROOT_DIR)/user/$(CONFIG_VENDOR)/$(CONFIG_PROJECT)/OSD/OsdConfig.h
+
+MAKE=make
+CC=mips-mti-elf-gcc
+LD=mips-mti-elf-ld
+AR=mips-mti-elf-ar
+RANLIB=mips-mti-elf-ranlib
+OBJCOPY=mips-mti-elf-objcopy
+OBJDUMP=mips-mti-elf-objdump
+GDB=mips-mti-elf-gdb
+
+ifeq ($(COMPILE_MODE),release)
+  C_COMPILE_FLAG += -O2
+  #ASM_COMPILE_FLAG += -O0
+  C_DEF_FLAG += -DRELEASE_VERSION
+  HEADER=@
+endif
+
+ifeq ($(COMPILE_MODE),debug)
+  C_COMPILE_FLAG += -g -O2
+  #ASM_COMPILE_FLAG += -g
+  C_DEF_FLAG += -DHV_SCALER_DEBUG_VERSION
+  C_DEF_FLAG += -DCOMPILE_USERNAME=\"$(shell whoami)\"
+  C_DEF_FLAG += -DCOMPILE_HOSTNAME=\"$(shell hostname)\"
+  HEADER=@
+endif
+
+ASM_DEF_FLAG = $(C_DEF_FLAG)
+ASM_COMPILE_FLAG=$(C_COMPILE_FLAG)
+
+#@if [ $(COMPILE_MODE) = "release" ] ; then echo "$1" ; else echo ""; fi;
+define ASM_COMPILE_RULE
+ $(HEADER)$(CC) $(INCLUDES) $(ASM_COMPILE_FLAG) $(ASM_DEF_FLAG)  $(FILE_INC_CONFIG) -o $(BUILD_OUT_OBJ_DIR)/$1 -c $2
+ @if [ $(COMPILE_MODE) = "release" ] ; then echo "$1" ;  fi;
+ @if [ $(COMPILE_MODE) = "debug" ] ; then echo "$1" ;  fi;
+endef
+define C_COMPILE_RULE
+ $(HEADER)$(CC) $(INCLUDES) $(C_COMPILE_FLAG) $(C_DEF_FLAG)   $(FILE_INC_CONFIG) -o $(BUILD_OUT_OBJ_DIR)/$1 -c $2
+ @if [ $(COMPILE_MODE) = "release" ] ; then echo "$1" ;  fi;
+ @if [ $(COMPILE_MODE) = "debug" ] ; then echo "$1" ;  fi;
+endef
+
+%.o : %.S
+	$(call ASM_COMPILE_RULE,$@,$<)
+%.o : %.c
+	$(call C_COMPILE_RULE,$@,$<)
+
+
+

build/compile/ht7315/prebuilds.inc

@@ -0,0 +1,7 @@
+
+ifneq ($(PREBUILDS_TARGETS_HAVE_BEEN_INCLUDED),yes)
+PREBUILDS_TARGETS_HAVE_BEEN_INCLUDED=yes
+
+include $(ROOT_DIR)/prebuilds/Makefile.mk
+
+endif

build/compile/ht7315/sdk_targets.inc

@@ -0,0 +1,7 @@
+
+ifneq ($(SDK_TARGETS_HAVE_BEEN_INCLUDED),yes)
+SDK_TARGETS_HAVE_BEEN_INCLUDED=yes
+
+include $(ROOT_DIR)/sdk/Makefile.mk
+
+endif

build/compile/ht7315/tool_targets.inc

@@ -0,0 +1,7 @@
+
+ifneq ($(TOOL_TARGETS_HAVE_BEEN_INCLUDED),yes)
+TOOL_TARGETS_HAVE_BEEN_INCLUDED=yes
+
+include $(ROOT_DIR)/tools/Makefile.mk
+
+endif

build/compile/ht7315/user_targets.inc

@@ -0,0 +1,7 @@
+
+ifneq ($(USER_TARGETS_HAVE_BEEN_INCLUDED),yes)
+USER_TARGETS_HAVE_BEEN_INCLUDED=yes
+
+include $(ROOT_DIR)/user/Makefile.mk
+
+endif

build/config/ht7315/common.config

@@ -0,0 +1,7 @@
+
+CONFIG_CHIP ?= ht7315
+CONFIG_ENDIAN ?= little
+CONFIG_ARCH ?= risc
+CONFIG_PRINT ?= yes
+CONFIG_HARD_FLOAT ?= yes
+

build/project_config.sh

@@ -0,0 +1,28 @@
+#!/bin/bash
+
+projectPath=$(cd `dirname $0`; pwd)
+dstConfigFile=$projectPath/../out/.config
+srcConfigPath=$projectPath/config
+srcRootPath=$(dirname $(dirname $(readlink -f $0)))
+source $projectPath/common_config.sh
+
+funCheckOutDir()
+{
+	local dstOutDir=$projectPath/../out
+	if [ ! -d $dstOutDir ] 
+	then
+		mkdir -p $dstOutDir
+	fi
+}
+
+funCheckOutDir
+if [ $# == 3 ];then
+	strVendor=$1
+	strProject=$2
+	strChip=$3
+fi
+if [ $# == 0 ];then
+	funSelectPara
+fi
+funGenerateConfigFile $dstConfigFile $srcConfigPath
+

build/scripts/ldscript/ht7315/ht7315-db.ld

@@ -0,0 +1,447 @@
+OUTPUT_ARCH(mips)
+
+/**** Start point ****/
+ENTRY(__reset_vector)
+
+PROVIDE(__boot_stack_size = 0x200);
+PROVIDE(__ebase_size = 0x200);
+PROVIDE(__isr_vec_space = 32);
+PROVIDE(__isr_vec_count = 64);
+PROVIDE(__boot_mem_reserved = 0x1000);
+
+__mergebin_offset       = 0x18000;
+
+/* ROM data and text*/
+__rom_start             = 0xBFC00000 + __mergebin_offset;
+__rom_size              = 0x40000;
+__rom_end               = __rom_start + __rom_size;
+_text_lma               = 0xBFE27000;
+/* 64K IRAM */
+__ram_start             = 0x90000000;
+__ram_size              = 0x10000 - 0x1000;
+__ram_end               = __ram_start + __ram_size;
+
+/* 8M DDR */
+__ddr_size              = 0x00800000;
+__cached_ddr_start      = 0x80000000;
+__cached_ddr_end        = __cached_ddr_start + __ddr_size;
+
+_risc_code_end          = 0x01000000;
+__uncached_ddr_size     = 0x00800000;
+__uncached_ddr_start    = 0x70000000 + _risc_code_end;
+__uncached_ddr_end      = __uncached_ddr_start + __uncached_ddr_size;
+
+__ddr_start             = __cached_ddr_start;
+
+EXTERN(__exception_entry)
+EXTERN(__isr_vec)
+
+MEMORY
+{
+    ROM          : ORIGIN = __rom_start,          LENGTH = __rom_size
+    RAM          : ORIGIN = __ram_start,          LENGTH = __ram_size
+    DDR          : ORIGIN = __ddr_start,          LENGTH = __ddr_size
+    UNCACHED_DDR : ORIGIN = __uncached_ddr_start, LENGTH = __uncached_ddr_size
+}
+
+REGION_ALIAS("REGION_ROM_TEXT",     ROM);
+
+/*
+REGION_ALIAS("REGION_BOOT_TEXT",    ISPRAM);
+REGION_ALIAS("REGION_BOOT_RODATA",  DSPRAM);
+REGION_ALIAS("REGION_BOOT_DATA",    DSPRAM);
+REGION_ALIAS("REGION_BOOT_BSS",     DSPRAM);
+*/
+
+REGION_ALIAS("REGION_BOOT_TEXT",    RAM);
+REGION_ALIAS("REGION_BOOT_RODATA",  RAM);
+REGION_ALIAS("REGION_BOOT_DATA",    RAM);
+REGION_ALIAS("REGION_BOOT_BSS",     RAM);
+
+/*
+PROVIDE(__heap_size = 0x1200);
+REGION_ALIAS("REGION_TEXT",         RAM);
+REGION_ALIAS("REGION_RODATA",       RAM);
+REGION_ALIAS("REGION_DATA",         RAM);
+REGION_ALIAS("REGION_BSS",          RAM);
+*/
+
+PROVIDE(__heap_size = 0x200000);
+REGION_ALIAS("REGION_TEXT",         DDR);
+REGION_ALIAS("REGION_RODATA",       DDR);
+REGION_ALIAS("REGION_DATA",         DDR);
+REGION_ALIAS("REGION_BSS",          DDR);
+
+REGION_ALIAS("REGION_UNCACHED_DATA",  UNCACHED_DDR);
+
+
+SECTIONS
+{
+
+    .boot_rom_text : {
+        __boot_rom_text_start = ABSOLUTE(.) ;   /* Start of init code. */
+        start.*(.text)          /* Reset entry point            */
+        set_gpr_boot_values.*(.text)
+        init_gpr.*(.text)
+        init_cp0.*(.text)
+        init_tlb.*(.text)
+        init_caches.*(.text)
+        copy_c2_ram.*(.text)
+        init_itc.*(.text)
+        init_vpe1.*(.text)
+
+        start.*(.text.*)          /* Reset entry point          */
+        set_gpr_boot_values.*(.text.*)
+        init_gpr.*(.text.*)
+        init_cp0.*(.text.*)
+        init_tlb.*(.text.*)
+        init_caches.*(.text.*)
+        copy_c2_ram.*(.text.*)
+        init_itc.*(.text.*)
+        init_vpe1.*(.text.*)
+        . = ALIGN(8);
+        __boot_rom_text_end = ABSOLUTE(.);  /* End of init code. */
+
+    } > REGION_ROM_TEXT
+
+    _boot_text_lma = __boot_rom_text_end - __boot_rom_text_start + __rom_start;
+    .boot_text : AT(_boot_text_lma)
+    {
+        __boot_text_start = ABSOLUTE(.);
+        /* entry point */
+
+        hv_boot_Main.*(.text)
+        hv_boot_Common.*(.text)
+        hv_boot_DDRInit.*(.text)
+        hv_boot_DDRTest.*(.text)
+        hv_boot_Lzss.*(.text)
+        risc_clean_cache.*(.text)
+        risc_excpt_entry.*(.text)
+        risc_excpt_handler.*(.text)
+        risc_excpt_register.*(.text)
+        risc_flush_cache.*(.text)
+        risc_fp.*(.text)
+        risc_isr_handler.*(.text)
+        risc_l2size.*(.text)
+        risc_lock_cache.*(.text)
+        risc_size_cache.*(.text)
+        risc_sync_cache.*(.text)
+        risc_tlb.*(.text)
+        set_gpr_boot_values.*(.text)
+
+        hv_boot_Main.*(.text.*)
+        copy_c2_ram.*(.text.*)
+        hv_boot_Common.*(.text.*)
+        hv_boot_DDRInit.*(.text.*)
+        hv_boot_DDRTest.*(.text.*)
+        hv_boot_Lzss.*(.text.*)
+        risc_clean_cache.*(.text.*)
+        risc_excpt_entry.*(.text.__exception_save)
+        risc_excpt_entry.*(.text.__exception_restore)
+        risc_excpt_handler.*(.text.*)
+        risc_excpt_register.*(.text.*)
+        risc_flush_cache.*(.text.*)
+        risc_fp.*(.text.*)
+        risc_isr_handler.*(.text.*)
+        risc_l2size.*(.text.*)
+        risc_lock_cache.*(.text.*)
+        risc_size_cache.*(.text.*)
+        risc_sync_cache.*(.text.*)
+        risc_tlb.*(.text.*)
+        set_gpr_boot_values.*(.text.*)
+        . = ALIGN(16);
+        __boot_text_end = ABSOLUTE(.);
+    } > REGION_BOOT_TEXT
+
+    _boot_rodata_lma = __boot_text_end - __boot_text_start + _boot_text_lma ;
+    .boot_rodata : AT(_boot_rodata_lma)
+    {
+        __boot_rodata_start = ABSOLUTE(.);
+        start.*(.rodata)
+        hv_boot_Main.*(.rodata)
+        copy_c2_ram.*(.rodata)
+        hv_boot_Common.*(.rodata)
+        hv_boot_DDRInit.*(.rodata)
+        hv_boot_DDRTest.*(.rodata)
+        hv_boot_Lzss.*(.rodata)
+        excpt_isr.*(.rodata)
+        init_caches.*(.rodata)
+        init_cp0.*(.rodata)
+        init_gpr.*(.rodata)
+        init_itc.*(.rodata)
+        init_tlb.*(.rodata)
+        init_vpe1.*(.rodata)
+        risc_clean_cache.*(.rodata)
+        risc_excpt_entry.*(.rodata)
+        risc_excpt_handler.*(.rodata)
+        risc_excpt_register.*(.rodata)
+        risc_flush_cache.*(.rodata)
+        risc_fp.*(.rodata)
+        risc_isr_handler.*(.rodata)
+        risc_l2size.*(.rodata)
+        risc_lock_cache.*(.rodata)
+        risc_size_cache.*(.rodata)
+        risc_sync_cache.*(.rodata)
+        risc_tlb.*(.rodata)
+        set_gpr_boot_values.*(.rodata)
+
+        start.*(.rodata.*)
+        hv_boot_Main.*(.rodata.*)
+        copy_c2_ram.*(.rodata.*)
+        hv_boot_Common.*(.rodata.*)
+        hv_boot_DDRInit.*(.rodata.*)
+        hv_boot_DDRTest.*(.rodata.*)
+        hv_boot_Lzss.*(.rodata.*)
+        excpt_isr.*(.rodata.*)
+        init_caches.*(.rodata.*)
+        init_cp0.*(.rodata.*)
+        init_gpr.*(.rodata.*)
+        init_itc.*(.rodata.*)
+        init_tlb.*(.rodata.*)
+        init_vpe1.*(.rodata.*)
+        risc_clean_cache.*(.rodata.*)
+        risc_excpt_entry.*(.rodata.*)
+        risc_excpt_handler.*(.rodata.*)
+        risc_excpt_register.*(.rodata.*)
+        risc_flush_cache.*(.rodata.*)
+        risc_fp.*(.rodata.*)
+        risc_isr_handler.*(.rodata.*)
+        risc_l2size.*(.rodata.*)
+        risc_lock_cache.*(.rodata.*)
+        risc_size_cache.*(.rodata.*)
+        risc_sync_cache.*(.rodata.*)
+        risc_tlb.*(.rodata.*)
+        set_gpr_boot_values.*(.rodata.*)
+        . = ALIGN(16);
+        __boot_rodata_end = ABSOLUTE(.);
+    } > REGION_BOOT_RODATA
+
+    _boot_data_lma = __boot_rodata_end - __boot_rodata_start + _boot_rodata_lma ;
+    .boot_data : AT(_boot_data_lma)
+    {
+        __boot_data_start = ABSOLUTE(.);
+        start.*(.data)
+        hv_boot_Main.*(.data)
+        copy_c2_ram.*(.data)
+        hv_boot_Common.*(.data)
+        hv_boot_DDRInit.*(.data)
+        hv_boot_DDRTest.*(.data)
+        hv_boot_Lzss.*(.data)
+        excpt_isr.*(.data)
+        init_caches.*(.data)
+        init_cp0.*(.data)
+        init_gpr.*(.data)
+        init_itc.*(.data)
+        init_tlb.*(.data)
+        init_vpe1.*(.data)
+        risc_clean_cache.*(.data)
+        risc_excpt_entry.*(.data)
+        risc_excpt_handler.*(.data)
+        risc_excpt_register.*(.data)
+        risc_flush_cache.*(.data)
+        risc_fp.*(.data)
+        risc_isr_handler.*(.data)
+        risc_l2size.*(.data)
+        risc_lock_cache.*(.data)
+        risc_size_cache.*(.data)
+        risc_sync_cache.*(.data)
+        risc_tlb.*(.data)
+        set_gpr_boot_values.*(.data)
+
+        start.*(.data.*)
+        hv_boot_Main.*(.data.*)
+        copy_c2_ram.*(.data.*)
+        hv_boot_Common.*(.data.*)
+        hv_boot_DDRInit.*(.data.*)
+        hv_boot_DDRTest.*(.data.*)
+        hv_boot_Lzss.*(.data.*)
+        excpt_isr.*(.data.*)
+        init_caches.*(.data.*)
+        init_cp0.*(.data.*)
+        init_gpr.*(.data.*)
+        init_itc.*(.data.*)
+        init_tlb.*(.data.*)
+        init_vpe1.*(.data.*)
+        risc_clean_cache.*(.data.*)
+        risc_excpt_entry.*(.data.*)
+        risc_excpt_handler.*(.data.*)
+        risc_excpt_register.*(.data.*)
+        risc_flush_cache.*(.data.*)
+        risc_fp.*(.data.*)
+        risc_isr_handler.*(.data.*)
+        risc_l2size.*(.data.*)
+        risc_lock_cache.*(.data.*)
+        risc_size_cache.*(.data.*)
+        risc_sync_cache.*(.data.*)
+        risc_tlb.*(.data.*)
+        set_gpr_boot_values.*(.data.*)
+        . = ALIGN(0x1000);
+        __boot_data_end = ABSOLUTE(.);
+    } > REGION_BOOT_DATA
+
+    _boot_vector_lma = __boot_data_end - __boot_data_start + _boot_data_lma ;
+    .boot_vector : AT(_boot_vector_lma)
+    {
+        boot_vector_start = ABSOLUTE(.);
+        _ebase_ram = ABSOLUTE(.);
+        _base = .;
+        KEEP(*(.text.__exception_entry))
+        . = _base + __ebase_size;
+        KEEP(* (SORT(.text.__isr_vec*)))
+        /* Leave space for all the vector entries */
+        . = _base + __ebase_size + (__isr_vec_space * __isr_vec_count);
+        . = ALIGN(16);
+        boot_vector_end = ABSOLUTE(.);
+    } > REGION_BOOT_DATA
+
+    .boot_bss (NOLOAD): {
+        __boot_bss_start = ABSOLUTE(.);
+        LONG(0x55AA55AD);
+        start.*(.bss)
+        hv_boot_Main.*(.bss)
+        copy_c2_ram.*(.bss)
+        hv_boot_Common.*(.bss)
+        hv_boot_DDRInit.*(.bss)
+        hv_boot_DDRTest.*(.bss)
+        hv_boot_Lzss.*(.bss)
+        excpt_isr.*(.bss)
+        init_caches.*(.bss)
+        init_cp0.*(.bss)
+        init_gpr.*(.bss)
+        init_itc.*(.bss)
+        init_tlb.*(.bss)
+        init_vpe1.*(.bss)
+        ddrmc_tmg_cfg.*(.bss)
+        risc_clean_cache.*(.bss)
+        risc_excpt_entry.*(.bss)
+        risc_excpt_handler.*(.bss)
+        risc_excpt_register.*(.bss)
+        risc_flush_cache.*(.bss)
+        risc_fp.*(.bss)
+        risc_isr_handler.*(.bss)
+        risc_l2size.*(.bss)
+        risc_lock_cache.*(.bss)
+        risc_size_cache.*(.bss)
+        risc_sync_cache.*(.bss)
+        risc_tlb.*(.bss)
+        set_gpr_boot_values.*(.bss)
+
+        start.*(.bss.*)
+        hv_boot_Main.*(.bss.*)
+        copy_c2_ram.*(.bss.*)
+        hv_boot_Common.*(.bss.*)
+        hv_boot_DDRInit.*(.bss.*)
+        hv_boot_DDRTest.*(.bss.*)
+        hv_boot_Lzss.*(.bss.*)
+        excpt_isr.*(.bss.*)
+        init_caches.*(.bss.*)
+        init_cp0.*(.bss.*)
+        init_gpr.*(.bss.*)
+        init_itc.*(.bss.*)
+        init_tlb.*(.bss.*)
+        init_vpe1.*(.bss.*)
+        ddrmc_tmg_cfg.*(.bss.*)
+        risc_clean_cache.*(.bss.*)
+        risc_excpt_entry.*(.bss.*)
+        risc_excpt_handler.*(.bss.*)
+        risc_excpt_register.*(.bss.*)
+        risc_flush_cache.*(.bss.*)
+        risc_fp.*(.bss.*)
+        risc_isr_handler.*(.bss.*)
+        risc_l2size.*(.bss.*)
+        risc_lock_cache.*(.bss.*)
+        risc_size_cache.*(.bss.*)
+        risc_sync_cache.*(.bss.*)
+        risc_tlb.*(.bss.*)
+        set_gpr_boot_values.*(.bss.*)
+        __boot_bss_end = ABSOLUTE(.);
+        . += __boot_stack_size;
+        __boot_stack = ABSOLUTE(.);
+    } > REGION_BOOT_BSS
+
+    .uncached_ddr (NOLOAD) :{
+        *(.uncached_data)
+    } > REGION_UNCACHED_DATA
+
+    /*_text_lma = boot_vector_end - boot_vector_start + _boot_vector_lma ;*/
+    .text : AT(_text_lma)
+    {
+        __text_start = ABSOLUTE(.);
+        *(.text)
+        *(.text.*)
+        . = ALIGN(512);
+        __text_end = ABSOLUTE(.);
+    } > REGION_TEXT
+
+    _rodata_lma = __text_end - __text_start + _text_lma ;
+    .rodata : AT(_rodata_lma)
+    {
+        __rodata_start = ABSOLUTE(.);
+        _shell_command_start = ABSOLUTE(.);
+        KEEP(*(shellCommand))
+        _shell_command_end = ABSOLUTE(.);
+        *(.rodata)
+        *(.rodata.*)
+        . = ALIGN(16);
+        __rodata_end = ABSOLUTE(.);
+    } > REGION_RODATA
+
+    _data_lma = __rodata_end - __rodata_start + _rodata_lma ;
+    .data : AT(_data_lma)
+    {
+        __data_start = ABSOLUTE(.);
+        *(.data)
+        *(.data.*)
+        _gp = ABSOLUTE(. + 0x7ff0); /* Base of small data           */
+        *(.lit8)
+        *(.lit8.*)
+        *(.lit4)
+        *(.lit4.*)
+        *(.sdata)
+        *(.sdata.*)
+        . = ALIGN(16);
+        __data_end = ABSOLUTE(.);
+    } > REGION_DATA
+
+
+    .bss(NOLOAD) : {
+        __bss_start = ABSOLUTE(.);
+        *(.sbss)
+        *(.sbss.*)
+        *(.scommon)
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+        . = ALIGN(16);
+        __bss_end = ABSOLUTE(.);
+    } > REGION_BSS
+
+    .heap (NOLOAD) : {
+        _heap_start = ABSOLUTE(.);
+        . += __heap_size;
+        . = ALIGN(16);
+        _heap_end = ABSOLUTE(.);
+    } > REGION_BSS
+
+    .stack (NOLOAD) :{
+        __stack_top = ABSOLUTE(.);
+        __stack_size = ORIGIN(REGION_BSS) + LENGTH(REGION_BSS) - ABSOLUTE(.) - 4;
+        . += __stack_size;
+        . = ALIGN(16);
+        __stack = ABSOLUTE(.);
+    } > REGION_BSS
+
+
+    .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
+    .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
+
+
+    /DISCARD/ :
+    {
+        *(.reginfo)
+        *(.MIPS.abiflags)
+    }
+    _freemem = .;
+}
+
+

build/scripts/ldscript/ht7315/ht7315.ld

@@ -0,0 +1,447 @@
+OUTPUT_ARCH(mips)
+
+/**** Start point ****/
+ENTRY(__reset_vector)
+
+PROVIDE(__boot_stack_size = 0x200);
+PROVIDE(__ebase_size = 0x200);
+PROVIDE(__isr_vec_space = 32);
+PROVIDE(__isr_vec_count = 64);
+PROVIDE(__boot_mem_reserved = 0x1000);
+
+__mergebin_offset       = 0x9000;
+
+/* ROM data and text*/
+__rom_start             = 0xBFC00000 + __mergebin_offset;
+__rom_size              = 0x40000;
+__rom_end               = __rom_start + __rom_size;
+_text_lma               = 0xBFC27000;
+/* 64K IRAM */
+__ram_start             = 0x90000000;
+__ram_size              = 0x10000 - 0x1000;
+__ram_end               = __ram_start + __ram_size;
+
+/* 8M DDR */
+__ddr_size              = 0x00800000;
+__cached_ddr_start      = 0x80000000;
+__cached_ddr_end        = __cached_ddr_start + __ddr_size;
+
+_risc_code_end          = 0x01000000;
+__uncached_ddr_size     = 0x00800000;
+__uncached_ddr_start    = 0x70000000 + _risc_code_end;
+__uncached_ddr_end      = __uncached_ddr_start + __uncached_ddr_size;
+
+__ddr_start             = __cached_ddr_start;
+
+EXTERN(__exception_entry)
+EXTERN(__isr_vec)
+
+MEMORY
+{
+    ROM          : ORIGIN = __rom_start,          LENGTH = __rom_size
+    RAM          : ORIGIN = __ram_start,          LENGTH = __ram_size
+    DDR          : ORIGIN = __ddr_start,          LENGTH = __ddr_size
+    UNCACHED_DDR : ORIGIN = __uncached_ddr_start, LENGTH = __uncached_ddr_size
+}
+
+REGION_ALIAS("REGION_ROM_TEXT",     ROM);
+
+/*
+REGION_ALIAS("REGION_BOOT_TEXT",    ISPRAM);
+REGION_ALIAS("REGION_BOOT_RODATA",  DSPRAM);
+REGION_ALIAS("REGION_BOOT_DATA",    DSPRAM);
+REGION_ALIAS("REGION_BOOT_BSS",     DSPRAM);
+*/
+
+REGION_ALIAS("REGION_BOOT_TEXT",    RAM);
+REGION_ALIAS("REGION_BOOT_RODATA",  RAM);
+REGION_ALIAS("REGION_BOOT_DATA",    RAM);
+REGION_ALIAS("REGION_BOOT_BSS",     RAM);
+
+/*
+PROVIDE(__heap_size = 0x1200);
+REGION_ALIAS("REGION_TEXT",         RAM);
+REGION_ALIAS("REGION_RODATA",       RAM);
+REGION_ALIAS("REGION_DATA",         RAM);
+REGION_ALIAS("REGION_BSS",          RAM);
+*/
+
+PROVIDE(__heap_size = 0x200000);
+REGION_ALIAS("REGION_TEXT",         DDR);
+REGION_ALIAS("REGION_RODATA",       DDR);
+REGION_ALIAS("REGION_DATA",         DDR);
+REGION_ALIAS("REGION_BSS",          DDR);
+
+REGION_ALIAS("REGION_UNCACHED_DATA",  UNCACHED_DDR);
+
+
+SECTIONS
+{
+
+    .boot_rom_text : {
+        __boot_rom_text_start = ABSOLUTE(.) ;   /* Start of init code. */
+        start.*(.text)          /* Reset entry point            */
+        set_gpr_boot_values.*(.text)
+        init_gpr.*(.text)
+        init_cp0.*(.text)
+        init_tlb.*(.text)
+        init_caches.*(.text)
+        copy_c2_ram.*(.text)
+        init_itc.*(.text)
+        init_vpe1.*(.text)
+
+        start.*(.text.*)          /* Reset entry point          */
+        set_gpr_boot_values.*(.text.*)
+        init_gpr.*(.text.*)
+        init_cp0.*(.text.*)
+        init_tlb.*(.text.*)
+        init_caches.*(.text.*)
+        copy_c2_ram.*(.text.*)
+        init_itc.*(.text.*)
+        init_vpe1.*(.text.*)
+        . = ALIGN(8);
+        __boot_rom_text_end = ABSOLUTE(.);  /* End of init code. */
+
+    } > REGION_ROM_TEXT
+
+    _boot_text_lma = __boot_rom_text_end - __boot_rom_text_start + __rom_start;
+    .boot_text : AT(_boot_text_lma)
+    {
+        __boot_text_start = ABSOLUTE(.);
+        /* entry point */
+
+        hv_boot_Main.*(.text)
+        hv_boot_Common.*(.text)
+        hv_boot_DDRInit.*(.text)
+        hv_boot_DDRTest.*(.text)
+        hv_boot_Lzss.*(.text)
+        risc_clean_cache.*(.text)
+        risc_excpt_entry.*(.text)
+        risc_excpt_handler.*(.text)
+        risc_excpt_register.*(.text)
+        risc_flush_cache.*(.text)
+        risc_fp.*(.text)
+        risc_isr_handler.*(.text)
+        risc_l2size.*(.text)
+        risc_lock_cache.*(.text)
+        risc_size_cache.*(.text)
+        risc_sync_cache.*(.text)
+        risc_tlb.*(.text)
+        set_gpr_boot_values.*(.text)
+
+        hv_boot_Main.*(.text.*)
+        copy_c2_ram.*(.text.*)
+        hv_boot_Common.*(.text.*)
+        hv_boot_DDRInit.*(.text.*)
+        hv_boot_DDRTest.*(.text.*)
+        hv_boot_Lzss.*(.text.*)
+        risc_clean_cache.*(.text.*)
+        risc_excpt_entry.*(.text.__exception_save)
+        risc_excpt_entry.*(.text.__exception_restore)
+        risc_excpt_handler.*(.text.*)
+        risc_excpt_register.*(.text.*)
+        risc_flush_cache.*(.text.*)
+        risc_fp.*(.text.*)
+        risc_isr_handler.*(.text.*)
+        risc_l2size.*(.text.*)
+        risc_lock_cache.*(.text.*)
+        risc_size_cache.*(.text.*)
+        risc_sync_cache.*(.text.*)
+        risc_tlb.*(.text.*)
+        set_gpr_boot_values.*(.text.*)
+        . = ALIGN(16);
+        __boot_text_end = ABSOLUTE(.);
+    } > REGION_BOOT_TEXT
+
+    _boot_rodata_lma = __boot_text_end - __boot_text_start + _boot_text_lma ;
+    .boot_rodata : AT(_boot_rodata_lma)
+    {
+        __boot_rodata_start = ABSOLUTE(.);
+        start.*(.rodata)
+        hv_boot_Main.*(.rodata)
+        copy_c2_ram.*(.rodata)
+        hv_boot_Common.*(.rodata)
+        hv_boot_DDRInit.*(.rodata)
+        hv_boot_DDRTest.*(.rodata)
+        hv_boot_Lzss.*(.rodata)
+        excpt_isr.*(.rodata)
+        init_caches.*(.rodata)
+        init_cp0.*(.rodata)
+        init_gpr.*(.rodata)
+        init_itc.*(.rodata)
+        init_tlb.*(.rodata)
+        init_vpe1.*(.rodata)
+        risc_clean_cache.*(.rodata)
+        risc_excpt_entry.*(.rodata)
+        risc_excpt_handler.*(.rodata)
+        risc_excpt_register.*(.rodata)
+        risc_flush_cache.*(.rodata)
+        risc_fp.*(.rodata)
+        risc_isr_handler.*(.rodata)
+        risc_l2size.*(.rodata)
+        risc_lock_cache.*(.rodata)
+        risc_size_cache.*(.rodata)
+        risc_sync_cache.*(.rodata)
+        risc_tlb.*(.rodata)
+        set_gpr_boot_values.*(.rodata)
+
+        start.*(.rodata.*)
+        hv_boot_Main.*(.rodata.*)
+        copy_c2_ram.*(.rodata.*)
+        hv_boot_Common.*(.rodata.*)
+        hv_boot_DDRInit.*(.rodata.*)
+        hv_boot_DDRTest.*(.rodata.*)
+        hv_boot_Lzss.*(.rodata.*)
+        excpt_isr.*(.rodata.*)
+        init_caches.*(.rodata.*)
+        init_cp0.*(.rodata.*)
+        init_gpr.*(.rodata.*)
+        init_itc.*(.rodata.*)
+        init_tlb.*(.rodata.*)
+        init_vpe1.*(.rodata.*)
+        risc_clean_cache.*(.rodata.*)
+        risc_excpt_entry.*(.rodata.*)
+        risc_excpt_handler.*(.rodata.*)
+        risc_excpt_register.*(.rodata.*)
+        risc_flush_cache.*(.rodata.*)
+        risc_fp.*(.rodata.*)
+        risc_isr_handler.*(.rodata.*)
+        risc_l2size.*(.rodata.*)
+        risc_lock_cache.*(.rodata.*)
+        risc_size_cache.*(.rodata.*)
+        risc_sync_cache.*(.rodata.*)
+        risc_tlb.*(.rodata.*)
+        set_gpr_boot_values.*(.rodata.*)
+        . = ALIGN(16);
+        __boot_rodata_end = ABSOLUTE(.);
+    } > REGION_BOOT_RODATA
+
+    _boot_data_lma = __boot_rodata_end - __boot_rodata_start + _boot_rodata_lma ;
+    .boot_data : AT(_boot_data_lma)
+    {
+        __boot_data_start = ABSOLUTE(.);
+        start.*(.data)
+        hv_boot_Main.*(.data)
+        copy_c2_ram.*(.data)
+        hv_boot_Common.*(.data)
+        hv_boot_DDRInit.*(.data)
+        hv_boot_DDRTest.*(.data)
+        hv_boot_Lzss.*(.data)
+        excpt_isr.*(.data)
+        init_caches.*(.data)
+        init_cp0.*(.data)
+        init_gpr.*(.data)
+        init_itc.*(.data)
+        init_tlb.*(.data)
+        init_vpe1.*(.data)
+        risc_clean_cache.*(.data)
+        risc_excpt_entry.*(.data)
+        risc_excpt_handler.*(.data)
+        risc_excpt_register.*(.data)
+        risc_flush_cache.*(.data)
+        risc_fp.*(.data)
+        risc_isr_handler.*(.data)
+        risc_l2size.*(.data)
+        risc_lock_cache.*(.data)
+        risc_size_cache.*(.data)
+        risc_sync_cache.*(.data)
+        risc_tlb.*(.data)
+        set_gpr_boot_values.*(.data)
+
+        start.*(.data.*)
+        hv_boot_Main.*(.data.*)
+        copy_c2_ram.*(.data.*)
+        hv_boot_Common.*(.data.*)
+        hv_boot_DDRInit.*(.data.*)
+        hv_boot_DDRTest.*(.data.*)
+        hv_boot_Lzss.*(.data.*)
+        excpt_isr.*(.data.*)
+        init_caches.*(.data.*)
+        init_cp0.*(.data.*)
+        init_gpr.*(.data.*)
+        init_itc.*(.data.*)
+        init_tlb.*(.data.*)
+        init_vpe1.*(.data.*)
+        risc_clean_cache.*(.data.*)
+        risc_excpt_entry.*(.data.*)
+        risc_excpt_handler.*(.data.*)
+        risc_excpt_register.*(.data.*)
+        risc_flush_cache.*(.data.*)
+        risc_fp.*(.data.*)
+        risc_isr_handler.*(.data.*)
+        risc_l2size.*(.data.*)
+        risc_lock_cache.*(.data.*)
+        risc_size_cache.*(.data.*)
+        risc_sync_cache.*(.data.*)
+        risc_tlb.*(.data.*)
+        set_gpr_boot_values.*(.data.*)
+        . = ALIGN(0x1000);
+        __boot_data_end = ABSOLUTE(.);
+    } > REGION_BOOT_DATA
+
+    _boot_vector_lma = __boot_data_end - __boot_data_start + _boot_data_lma ;
+    .boot_vector : AT(_boot_vector_lma)
+    {
+        boot_vector_start = ABSOLUTE(.);
+        _ebase_ram = ABSOLUTE(.);
+        _base = .;
+        KEEP(*(.text.__exception_entry))
+        . = _base + __ebase_size;
+        KEEP(* (SORT(.text.__isr_vec*)))
+        /* Leave space for all the vector entries */
+        . = _base + __ebase_size + (__isr_vec_space * __isr_vec_count);
+        . = ALIGN(16);
+        boot_vector_end = ABSOLUTE(.);
+    } > REGION_BOOT_DATA
+
+    .boot_bss (NOLOAD): {
+        __boot_bss_start = ABSOLUTE(.);
+        LONG(0x55AA55AD);
+        start.*(.bss)
+        hv_boot_Main.*(.bss)
+        copy_c2_ram.*(.bss)
+        hv_boot_Common.*(.bss)
+        hv_boot_DDRInit.*(.bss)
+        hv_boot_DDRTest.*(.bss)
+        hv_boot_Lzss.*(.bss)
+        excpt_isr.*(.bss)
+        init_caches.*(.bss)
+        init_cp0.*(.bss)
+        init_gpr.*(.bss)
+        init_itc.*(.bss)
+        init_tlb.*(.bss)
+        init_vpe1.*(.bss)
+        ddrmc_tmg_cfg.*(.bss)
+        risc_clean_cache.*(.bss)
+        risc_excpt_entry.*(.bss)
+        risc_excpt_handler.*(.bss)
+        risc_excpt_register.*(.bss)
+        risc_flush_cache.*(.bss)
+        risc_fp.*(.bss)
+        risc_isr_handler.*(.bss)
+        risc_l2size.*(.bss)
+        risc_lock_cache.*(.bss)
+        risc_size_cache.*(.bss)
+        risc_sync_cache.*(.bss)
+        risc_tlb.*(.bss)
+        set_gpr_boot_values.*(.bss)
+
+        start.*(.bss.*)
+        hv_boot_Main.*(.bss.*)
+        copy_c2_ram.*(.bss.*)
+        hv_boot_Common.*(.bss.*)
+        hv_boot_DDRInit.*(.bss.*)
+        hv_boot_DDRTest.*(.bss.*)
+        hv_boot_Lzss.*(.bss.*)
+        excpt_isr.*(.bss.*)
+        init_caches.*(.bss.*)
+        init_cp0.*(.bss.*)
+        init_gpr.*(.bss.*)
+        init_itc.*(.bss.*)
+        init_tlb.*(.bss.*)
+        init_vpe1.*(.bss.*)
+        ddrmc_tmg_cfg.*(.bss.*)
+        risc_clean_cache.*(.bss.*)
+        risc_excpt_entry.*(.bss.*)
+        risc_excpt_handler.*(.bss.*)
+        risc_excpt_register.*(.bss.*)
+        risc_flush_cache.*(.bss.*)
+        risc_fp.*(.bss.*)
+        risc_isr_handler.*(.bss.*)
+        risc_l2size.*(.bss.*)
+        risc_lock_cache.*(.bss.*)
+        risc_size_cache.*(.bss.*)
+        risc_sync_cache.*(.bss.*)
+        risc_tlb.*(.bss.*)
+        set_gpr_boot_values.*(.bss.*)
+        __boot_bss_end = ABSOLUTE(.);
+        . += __boot_stack_size;
+        __boot_stack = ABSOLUTE(.);
+    } > REGION_BOOT_BSS
+
+    .uncached_ddr (NOLOAD) :{
+        *(.uncached_data)
+    } > REGION_UNCACHED_DATA
+
+    /*_text_lma = boot_vector_end - boot_vector_start + _boot_vector_lma ;*/
+    .text : AT(_text_lma)
+    {
+        __text_start = ABSOLUTE(.);
+        *(.text)
+        *(.text.*)
+        . = ALIGN(512);
+        __text_end = ABSOLUTE(.);
+    } > REGION_TEXT
+
+    _rodata_lma = __text_end - __text_start + _text_lma ;
+    .rodata : AT(_rodata_lma)
+    {
+        __rodata_start = ABSOLUTE(.);
+        _shell_command_start = ABSOLUTE(.);
+        KEEP(*(shellCommand))
+        _shell_command_end = ABSOLUTE(.);
+        *(.rodata)
+        *(.rodata.*)
+        . = ALIGN(16);
+        __rodata_end = ABSOLUTE(.);
+    } > REGION_RODATA
+
+    _data_lma = __rodata_end - __rodata_start + _rodata_lma ;
+    .data : AT(_data_lma)
+    {
+        __data_start = ABSOLUTE(.);
+        *(.data)
+        *(.data.*)
+        _gp = ABSOLUTE(. + 0x7ff0); /* Base of small data           */
+        *(.lit8)
+        *(.lit8.*)
+        *(.lit4)
+        *(.lit4.*)
+        *(.sdata)
+        *(.sdata.*)
+        . = ALIGN(16);
+        __data_end = ABSOLUTE(.);
+    } > REGION_DATA
+
+
+    .bss(NOLOAD) : {
+        __bss_start = ABSOLUTE(.);
+        *(.sbss)
+        *(.sbss.*)
+        *(.scommon)
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+        . = ALIGN(16);
+        __bss_end = ABSOLUTE(.);
+    } > REGION_BSS
+
+    .heap (NOLOAD) : {
+        _heap_start = ABSOLUTE(.);
+        . += __heap_size;
+        . = ALIGN(16);
+        _heap_end = ABSOLUTE(.);
+    } > REGION_BSS
+
+    .stack (NOLOAD) :{
+        __stack_top = ABSOLUTE(.);
+        __stack_size = ORIGIN(REGION_BSS) + LENGTH(REGION_BSS) - ABSOLUTE(.) - 4;
+        . += __stack_size;
+        . = ALIGN(16);
+        __stack = ABSOLUTE(.);
+    } > REGION_BSS
+
+
+    .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
+    .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
+
+
+    /DISCARD/ :
+    {
+        *(.reginfo)
+        *(.MIPS.abiflags)
+    }
+    _freemem = .;
+}
+
+

build/scripts/risc.gdbinit

@@ -0,0 +1,152 @@
+define r
+    monitor mips32 cp0 status 0x00400106
+    monitor reset
+end
+document r
+    "reset MIPS"
+end
+define epc 
+    monitor mips32 cp0 epc
+end
+define cause 
+    monitor mips32 cp0 cause
+end
+define status 
+    monitor mips32 cp0 status
+end
+
+
+
+define pec_b_debug_reg
+    set *0xb0070040=$arg1 << 24
+    set $val=*(unsigned int*)0xb0070044
+    set $val=(($val>>24)&0xFF) | (($val>>8)&0xFF00) | (($val & 0xFF00) << 8) | ((($val) & 0xFF) << 24 )
+    printf $arg0
+    printf ": 0x%08X\n",$val
+end
+
+define read_pec_b
+    # unlock
+    set *0xb0200010=0xffffffff
+    set *0xb0070154=0xE2C9243A
+    set *0xb0070150=0xDECD0245
+    set *0xb0070158=0x0B267835
+    set *0xb007015C=0xD64F76E4
+
+    pec_b_debug_reg "PC  " 0x00 
+    pec_b_debug_reg "DPC " 0x04 
+    pec_b_debug_reg "NPC " 0x08 
+    pec_b_debug_reg "EPC " 0x0C 
+    pec_b_debug_reg "EXC " 0x10 
+    pec_b_debug_reg "PSW " 0x14 
+    pec_b_debug_reg "ID  " 0x18 
+    pec_b_debug_reg "TMP " 0x1C
+    pec_b_debug_reg "VTB " 0x20 
+end
+
+define read_pec_b_all
+    # unlock
+    set *0xb0200010=0xffffffff
+    set *0xb0070154=0xE2C9243A
+    set *0xb0070150=0xDECD0245
+    set *0xb0070158=0x0B267835
+    set *0xb007015C=0xD64F76E4
+
+    pec_b_debug_reg "PC  " 0x00 
+    pec_b_debug_reg "DPC " 0x04 
+    pec_b_debug_reg "NPC " 0x08 
+    pec_b_debug_reg "EPC " 0x0C 
+    pec_b_debug_reg "EXC " 0x10 
+    pec_b_debug_reg "PSW " 0x14 
+    pec_b_debug_reg "ID  " 0x18 
+    pec_b_debug_reg "TMP " 0x1C
+    pec_b_debug_reg "VTB " 0x20 
+    pec_b_debug_reg "IMB " 0x24 
+    pec_b_debug_reg "ICR0" 0x28 
+    pec_b_debug_reg "ICR1" 0x2C 
+    pec_b_debug_reg "ICR2" 0x30 
+    pec_b_debug_reg "ICR3" 0x34 
+    pec_b_debug_reg "DMB " 0x38 
+    pec_b_debug_reg "DCR0" 0x3C 
+    pec_b_debug_reg "DCR1" 0x40 
+    pec_b_debug_reg "DCR2" 0x44 
+    pec_b_debug_reg "DCR3" 0x48 
+    pec_b_debug_reg "ICB " 0x4C 
+    pec_b_debug_reg "CDR0" 0x50 
+    pec_b_debug_reg "CDR1" 0x54
+    pec_b_debug_reg "CDR2" 0x58 
+    pec_b_debug_reg "CDR3" 0x5C 
+    pec_b_debug_reg "CDR4" 0x60 
+    pec_b_debug_reg "CDR5" 0x64 
+    pec_b_debug_reg "CDR6" 0x68 
+    pec_b_debug_reg "CDR7" 0x6C 
+    pec_b_debug_reg "DBG0" 0x70
+    pec_b_debug_reg "DBG1" 0x74
+    pec_b_debug_reg "DBG2" 0x78 
+end
+
+define pec_c_debug_reg
+    set *0xb0070080=$arg1 << 24
+    set $val=*(unsigned int*)0xb0070084
+    set $val=(($val>>24)&0xFF) | (($val>>8)&0xFF00) | (($val & 0xFF00) << 8) | ((($val) & 0xFF) << 24 )
+    printf $arg0
+    printf ": 0x%08X\n",$val
+end
+
+define read_pec_c
+    # unlock
+    set *0xb0200010=0xffffffff
+    set *0xb007016c=0xC77C3712
+    set *0xb0070164=0x72373A81
+    set *0xb0070168=0x60AA2514
+    set *0xb0070160=0x4AEF5DC6
+
+    pec_c_debug_reg "PC  " 0x00 
+    pec_c_debug_reg "DPC " 0x04 
+    pec_c_debug_reg "NPC " 0x08 
+    pec_c_debug_reg "EPC " 0x0C 
+    pec_c_debug_reg "EXC " 0x10 
+    pec_c_debug_reg "PSW " 0x14 
+    pec_c_debug_reg "VTB " 0x20 
+end
+
+define read_pec_c_all
+    # unlock
+    set *0xb0200010=0xffffffff
+    set *0xb007016c=0xC77C3712
+    set *0xb0070164=0x72373A81
+    set *0xb0070168=0x60AA2514
+    set *0xb0070160=0x4AEF5DC6
+
+    pec_c_debug_reg "PC  " 0x00 
+    pec_c_debug_reg "DPC " 0x04 
+    pec_c_debug_reg "NPC " 0x08 
+    pec_c_debug_reg "EPC " 0x0C 
+    pec_c_debug_reg "EXC " 0x10 
+    pec_c_debug_reg "PSW " 0x14 
+    pec_c_debug_reg "ID  " 0x18 
+    pec_c_debug_reg "TMP " 0x1C
+    pec_c_debug_reg "VTB " 0x20 
+    pec_c_debug_reg "IMB " 0x24 
+    pec_c_debug_reg "ICR0" 0x28 
+    pec_c_debug_reg "ICR1" 0x2C 
+    pec_c_debug_reg "ICR2" 0x30 
+    pec_c_debug_reg "ICR3" 0x34 
+    pec_c_debug_reg "DMB " 0x38 
+    pec_c_debug_reg "DCR0" 0x3C 
+    pec_c_debug_reg "DCR1" 0x40 
+    pec_c_debug_reg "DCR2" 0x44 
+    pec_c_debug_reg "DCR3" 0x48 
+    pec_c_debug_reg "ICB " 0x4C 
+    pec_c_debug_reg "CDR0" 0x50 
+    pec_c_debug_reg "CDR1" 0x54
+    pec_c_debug_reg "CDR2" 0x58 
+    pec_c_debug_reg "CDR3" 0x5C 
+    pec_c_debug_reg "CDR4" 0x60 
+    pec_c_debug_reg "CDR5" 0x64 
+    pec_c_debug_reg "CDR6" 0x68 
+    pec_c_debug_reg "CDR7" 0x6C 
+    pec_c_debug_reg "DBG0" 0x70
+    pec_c_debug_reg "DBG1" 0x74
+    pec_c_debug_reg "DBG2" 0x78 
+end

out/.config

@@ -0,0 +1,24 @@
+export CONFIG_CHIP ?= ht7315
+export CONFIG_ENDIAN ?= little
+export CONFIG_ARCH ?= risc
+export CONFIG_PRINT ?= yes
+export CONFIG_HARD_FLOAT ?= yes
+export CONFIG_USER_PANEL_RESOLUTION_TYPE ?= PANEL_RESOLUTION_TYPE_UHD
+export CONFIG_USER_PANEL_TYPE ?= PANEL_TYPE_VBOTX
+export dedededededeCONFIG_USER_PANEL_MODEL ?= INNO_VBO_M280DGJ_L30_UHD60
+export CONFIG_USER_PANEL_SEQUENCE ?= PANEL_SEQUENCE_OFF
+export CONFIG_USER_AMBLIGHT ?= AMBLIGHT_ON
+export CONFIG_USER_USB_OTA ?= USB_OTA_OFF
+export CONFIG_USER_USB_BILLBOARD ?= USB_BILLBOARD_OFF
+export CONFIG_USER_TYPE_C ?= TYPE_C_OFF
+export CONFIG_USER_WATCHDOG ?= WATCHDOG_OFF
+export CONFIG_USER_IR ?= IR_OFF
+export CONFIG_USER_DOUBLE_CHANNEL ?= DOUBLE_CHANNEL_ON
+export CONFIG_USER_DISPCTRL_OD ?= DISPCTRL_OD_ON
+export CONFIG_USER_DISPCTRL_GAMMA ?= DISPCTRL_GAMMA_ON
+export CONFIG_USER_DISPCTRL_DITHER ?= DISPCTRL_DITHER_12_10_OFF
+export CONFIG_USER_DISPCTRL_DITHER ?= DISPCTRL_DITHER_12_8_ON
+export CONFIG_USER_LED_DRIVER ?= LED_ON
+export CONFIG_VENDOR ?= hiview
+export CONFIG_PROJECT ?= ht7315_product_uhd
+export CONFIG_CODE_PATH ?= /root/MonitorSOC

out/.config.tmp

@@ -0,0 +1,16 @@
+CONFIG_USER_PANEL_RESOLUTION_TYPE ?= PANEL_RESOLUTION_TYPE_UHD
+CONFIG_USER_PANEL_TYPE ?= PANEL_TYPE_VBOTX
+dedededededeCONFIG_USER_PANEL_MODEL ?= INNO_VBO_M280DGJ_L30_UHD60
+CONFIG_USER_PANEL_SEQUENCE ?= PANEL_SEQUENCE_OFF
+CONFIG_USER_AMBLIGHT ?= AMBLIGHT_ON
+CONFIG_USER_USB_OTA ?= USB_OTA_OFF
+CONFIG_USER_USB_BILLBOARD ?= USB_BILLBOARD_OFF
+CONFIG_USER_TYPE_C ?= TYPE_C_OFF
+CONFIG_USER_WATCHDOG ?= WATCHDOG_OFF
+CONFIG_USER_IR ?= IR_OFF
+CONFIG_USER_DOUBLE_CHANNEL ?= DOUBLE_CHANNEL_ON
+CONFIG_USER_DISPCTRL_OD ?= DISPCTRL_OD_ON
+CONFIG_USER_DISPCTRL_GAMMA ?= DISPCTRL_GAMMA_ON
+CONFIG_USER_DISPCTRL_DITHER ?= DISPCTRL_DITHER_12_10_OFF
+CONFIG_USER_DISPCTRL_DITHER ?= DISPCTRL_DITHER_12_8_ON
+CONFIG_USER_LED_DRIVER ?= LED_ON

out/compressed/out/ddr-Monitor_SOC_compressed.bin-DB_size

@@ -0,0 +1,2 @@
+HIVIEW!
+882957

out/compressed/out/ddr-Monitor_SOC_compressed.bin_size

@@ -0,0 +1,2 @@
+HIVIEW!
+882957

out/compressed/out/hiview.bin

@@ -0,0 +1 @@
+HIVIEW!

out/compressed/out/pmsb.bin

@@ -0,0 +1 @@
+d

out/compressed/out/pmsb.bin_temp

@@ -0,0 +1 @@
+d

out/compressed/out/size.bin

@@ -0,0 +1 @@
+148015

out/compressed/out/temp_data_compressed.bin_size

@@ -0,0 +1,2 @@
+HIVIEW!
+148015