$NOMOD51
;------------------------------------------------------------------------------
;  This file is part of the C51 Compiler package
;  Copyright (c) 1988-2005 Keil Elektronik GmbH and Keil Software, Inc.
;  Version 8.01
;
;  *** <<< Use Configuration Wizard in Context Menu >>> ***
;------------------------------------------------------------------------------
;  STARTUP.A51:  This code is executed after processor reset.
;
;  To translate this file use A51 with the following invocation:
;
;     A51 STARTUP.A51
;
;  To link the modified STARTUP.OBJ file to your application use the following
;  Lx51 invocation:
;
;     Lx51 your object file list, STARTUP.OBJ  controls
;
;------------------------------------------------------------------------------
;
;  User-defined <h> Power-On Initialization of Memory
;
;  With the following EQU statements the initialization of memory
;  at processor reset can be defined:
;
; <o> IDATALEN: IDATA memory size <0x0-0x100>
;     <i> Note: The absolute start-address of IDATA memory is always 0
;     <i>       The IDATA space overlaps physically the DATA and BIT areas.
;IDATALEN        EQU     0H
IDATALEN        EQU     80H
;
; <o> XDATASTART: XDATA memory start address <0x0-0xFFFF> 
;     <i> The absolute start address of XDATA memory
XDATASTART      EQU     0     
;
; <o> XDATALEN: XDATA memory size <0x0-0xFFFF> 
;     <i> The length of XDATA memory in bytes.
XDATALEN        EQU     0      
;
; <o> PDATASTART: PDATA memory start address <0x0-0xFFFF> 
;     <i> The absolute start address of PDATA memory
PDATASTART      EQU     0H
;
; <o> PDATALEN: PDATA memory size <0x0-0xFF> 
;     <i> The length of PDATA memory in bytes.
PDATALEN        EQU     0H
;
;</h>
;------------------------------------------------------------------------------
;
;<h> Reentrant Stack Initialization
;
;  The following EQU statements define the stack pointer for reentrant
;  functions and initialized it:
;
; <h> Stack Space for reentrant functions in the SMALL model.
;  <q> IBPSTACK: Enable SMALL model reentrant stack
;     <i> Stack space for reentrant functions in the SMALL model.
IBPSTACK        EQU     0       ; set to 1 if small reentrant is used.
;  <o> IBPSTACKTOP: End address of SMALL model stack <0x0-0xFF>
;     <i> Set the top of the stack to the highest location.
IBPSTACKTOP     EQU     0xFF +1     ; default 0FFH+1  
; </h>
;
; <h> Stack Space for reentrant functions in the LARGE model.      
;  <q> XBPSTACK: Enable LARGE model reentrant stack
;     <i> Stack space for reentrant functions in the LARGE model.
XBPSTACK        EQU     0       ; set to 1 if large reentrant is used.
;  <o> XBPSTACKTOP: End address of LARGE model stack <0x0-0xFFFF>
;     <i> Set the top of the stack to the highest location.
XBPSTACKTOP     EQU     0xFFFF +1   ; default 0FFFFH+1 
; </h>
;
; <h> Stack Space for reentrant functions in the COMPACT model.    
;  <q> PBPSTACK: Enable COMPACT model reentrant stack
;     <i> Stack space for reentrant functions in the COMPACT model.
PBPSTACK        EQU     0       ; set to 1 if compact reentrant is used.
;
;   <o> PBPSTACKTOP: End address of COMPACT model stack <0x0-0xFFFF>
;     <i> Set the top of the stack to the highest location.
PBPSTACKTOP     EQU     0xFF +1     ; default 0FFH+1  
; </h>
;</h>
;------------------------------------------------------------------------------
;
;  Memory Page for Using the Compact Model with 64 KByte xdata RAM
;  <e>Compact Model Page Definition
;
;  <i>Define the XDATA page used for PDATA variables. 
;  <i>PPAGE must conform with the PPAGE set in the linker invocation.
;
; Enable pdata memory page initalization
PPAGEENABLE     EQU     0       ; set to 1 if pdata object are used.
;
; <o> PPAGE number <0x0-0xFF> 
; <i> uppermost 256-byte address of the page used for PDATA variables.
PPAGE           EQU     0
;
; <o> SFR address which supplies uppermost address byte <0x0-0xFF> 
; <i> most 8051 variants use P2 as uppermost address byte
PPAGE_SFR       DATA    0A0H
;
; </e>
;------------------------------------------------------------------------------

; Standard SFR Symbols 
ACC     DATA    0E0H
B       DATA    0F0H
SP      DATA    81H
DPL     DATA    82H
DPH     DATA    83H
SCON	DATA	98H
TMOD	DATA	89H
TCON	DATA	88H
TH1		DATA	8DH
SBUF	DATA	99H
MEX1	DATA	94H
MEX2	DATA	95H

;sfr MIIC = 0xCF		; 8051 Mater IIC

DMARSTART	XDATA	8000H	;DMA ram start address
DMAESTART	XDATA	8005H	;DMA EEPROM start address
DMADLEN		XDATA	8002H	;DMA mov length
DMATRIG		XDATA	8004H	;0x8004[7] set to 1 start DMA, hardware clear to 0 after dma done

sbit TI	= 0x98^1
sbit EA = 0xAF
sbit PS	= 0xBC
sbit ES = 0xAC
sbit ET1 = 0xAB

                NAME    ?C_STARTUP

?C_C51STARTUP	SEGMENT	  CODE
?STACK          SEGMENT   IDATA
				
				RSEG    ?STACK
                DS      1

				EXTRN CODE (?C_START)
				PUBLIC ?C_STARTUP

                CSEG    AT      0
?C_STARTUP:		LJMP	STARTUP1

;EEPROM_OFF:		DB		00H, 00h
;APP_LEN:		DB		20h, 00h
				RSEG    ?C_C51STARTUP


READ_APPINFO:					
				CLR		A
				MOVC	A, @A+DPTR
				MOV		R0, A
				MOV		A, #0x01
				MOVC	A, @A+DPTR
				MOV		R1, A
				RET
    
EEPROM_OFF:		DB		00H, 00h
APP_LEN:		DB		40h, 00h
    
STARTUP1:		
IF IDATALEN <> 0
                MOV     R0,#IDATALEN - 1
                CLR     A
IDATALOOP:      MOV     @R0,A
                DJNZ    R0,IDATALOOP
ENDIF

;IF XDATALEN <> 0
;                MOV     DPTR,#XDATASTART
;                MOV     R7,#LOW (XDATALEN)
;  IF (LOW (XDATALEN)) <> 0
;                MOV     R6,#(HIGH (XDATALEN)) +1
;  ELSE
;                MOV     R6,#HIGH (XDATALEN)
;  ENDIF
;                CLR     A
;XDATALOOP:      MOVX    @DPTR,A
;                INC     DPTR
;                DJNZ    R7,XDATALOOP
;                DJNZ    R6,XDATALOOP
;ENDIF

IF PPAGEENABLE <> 0
                MOV     PPAGE_SFR,#PPAGE
ENDIF

IF PDATALEN <> 0
                MOV     R0,#LOW (PDATASTART)
                MOV     R7,#LOW (PDATALEN)
                CLR     A
PDATALOOP:      MOVX    @R0,A
                INC     R0
                DJNZ    R7,PDATALOOP
ENDIF

IF IBPSTACK <> 0
EXTRN DATA (?C_IBP)

                MOV     ?C_IBP,#LOW IBPSTACKTOP
ENDIF

IF XBPSTACK <> 0
EXTRN DATA (?C_XBP)

                MOV     ?C_XBP,#HIGH XBPSTACKTOP
                MOV     ?C_XBP+1,#LOW XBPSTACKTOP
ENDIF

IF PBPSTACK <> 0
EXTRN DATA (?C_PBP)
                MOV     ?C_PBP,#LOW PBPSTACKTOP
ENDIF

                MOV     SP,#?STACK-1
				
				;if realchip ,go down ,if no flash,go ?c_start
				LJMP    ?C_START
				
				; set dma xram start addr
				CLR		A
				MOV		DPTR, #0x8000			; 0x8000 is xdata register addr, defines sram start addr low byte, 0x8000 [7:0]
				MOVX	@DPTR, A
				INC		DPTR					; 0x8001 is xdata register addr, defines sram start addr high byte, 0x8001[15:8]
				MOVX	@DPTR, A
				
				; set dma eeprom read length, this value is APP_LEN, APP_LEN low address stores high byte
				; set read length low byte
				MOV		DPTR, #APP_LEN
				LCALL	READ_APPINFO
				
				MOV		A, R1
				MOV		DPTR, #0x8002			
				MOVX	@DPTR, A				; save to low byte
				MOV		A, R0
				INC		DPTR			
				MOVX	@DPTR, A				; save to low byte
				
				; set eeprom offset
				; set eeprom offset low byte
				MOV		DPTR, #EEPROM_OFF
				LCALL	READ_APPINFO
                
				MOV		A, R1
				MOV		DPTR, #0x8005			
				MOVX	@DPTR, A				; save to low byte
				MOV		A, R0
				INC		DPTR			
				MOVX	@DPTR, A				; save to low byte
                
				; set eeprom third high byte
				INC		DPTR
				CLR		A
				MOVX	@DPTR, A				; most high byte is 0
				
				; trigger dma
				MOV		DPTR, #0x8004			; select 0x8004 register bit[7]
				MOV		A, #0x80
				MOVX	@DPTR, A					; trigger
				
				; loop to check dma down
DMA_LOOP:		
				MOVX	A, @DPTR
				JNZ		DMA_LOOP
				
				
				; switch to bank 14
				MOV		MEX1, #0x0E
				MOV		MEX2, #0x0E
                
				MOV		DPTR, #0x0000
				CLR		A

                LJMP    ?C_START

                END