hv_chip_DebugUart.h 11 KB

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  1. /**
  2. * @file hv_chip_debuguart.h
  3. * @brief define uart debug interface
  4. * @details anyware
  5. * @author HiView SoC Software Team
  6. * @version 1.0.0
  7. * @date 2022-09-05
  8. * @copyright Copyright(c),2022-9, Hiview Software. All rights reserved.
  9. */
  10. #ifndef _HV_CHIP_DEBUG_UART_H
  11. #define _HV_CHIP_DEBUG_UART_H
  12. /**
  13. * @brief interface for write register.
  14. * @param[in] address to write.
  15. * @param[in] value to write.
  16. * @return none.
  17. */
  18. static void Hv_Chip_WriteReg(unsigned int uAddr, unsigned int uValue)
  19. {
  20. uAddr= ((uAddr) | 0xA0000000);
  21. *(volatile unsigned int*)uAddr = uValue;
  22. }
  23. /**
  24. * @brief interface for read register.
  25. * @param[in] address to read.
  26. * @return value from register.
  27. */
  28. static unsigned int Hv_Chip_ReadReg(unsigned int uAddr)
  29. {
  30. uAddr= ((uAddr) | 0xA0000000);
  31. return *(volatile unsigned int*)uAddr;
  32. }
  33. #define BOARD_DEBUG_UART_STOP_BITS 0 /* for 1bit */
  34. #define BOARD_DEBUG_UART_DATA_BITS 8
  35. #define BOARD_W32 Hv_Chip_WriteReg
  36. #define BOARD_R32 Hv_Chip_ReadReg
  37. #define BOARD_REG_VAL(reg) (*(unsigned int*)&(reg))
  38. #define BOARD_W32_REG(addr, reg) BOARD_W32(addr, BOARD_REG_VAL(reg))
  39. /**
  40. * @brief interface to switch qsti to rsic.
  41. * @param[in] none.
  42. * @return none.
  43. */
  44. static void Hv_Chip_SwitchQspiRsic(void)
  45. {
  46. unsigned int uiRegVal = 0;
  47. uiRegVal = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_0);
  48. rs_standby_sh08_top_stby_ctrl_0 stProgSpi = (*(standby_sh08_top_stby_ctrl_0(uiRegVal)));
  49. stProgSpi.reg_prog_spi_clk_func_sel = 0;
  50. stProgSpi.reg_prog_spi_csn_func_sel = 0;
  51. stProgSpi.reg_prog_spi_hold_func_sel = 0;
  52. stProgSpi.reg_prog_spi_miso_func_sel = 0;
  53. stProgSpi.reg_prog_spi_mosi_func_sel = 0;
  54. stProgSpi.reg_prog_spi_wp_func_sel = 0;
  55. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_0, stProgSpi);
  56. }
  57. static void Hv_Chip_DebugUartConfig(void)
  58. {
  59. unsigned int uiUart = 0;
  60. #if 0 // TODO please open this if using HDMI0/1 DDC as uart0
  61. /* use hdmi0 uart0 to debug */
  62. /* set SYS_BLK3_TOP_REG_38 reg_uart0_sin_sel 1 */
  63. uiUart = BOARD_R32(SYS_BLK3_TOP_REG_38);
  64. rs_sys_blk3_top_reg_38 uart0_blk = (*(sys_blk3_top_reg_38(uiUart)));
  65. uart0_blk.reg_uart0_sin_sel = 1;
  66. BOARD_W32_REG(SYS_BLK3_TOP_REG_38, uart0_blk);
  67. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_24);
  68. rs_standby_sh08_top_stby_ctrl_24 uart0_tx__func = (*(standby_sh08_top_stby_ctrl_24(uiUart)));
  69. uart0_tx__func.reg_hdmi_rx0_ddc1_func_sel = 3;
  70. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_24, uart0_tx__func);
  71. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_0);
  72. rs_standby_sh08_top_stby_ctrl_0 uart0_rx__func = (*(standby_sh08_top_stby_ctrl_0(uiUart)));
  73. uart0_rx__func.reg_hdmi_rx0_ddc0_func_sel = 0;
  74. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_0, uart0_rx__func);
  75. //io_ctrl
  76. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_10);
  77. rs_standby_sh08_top_stby_ctrl_10 uart0_tx_ctrl= (*(standby_sh08_top_stby_ctrl_10(uiUart)));
  78. uart0_tx_ctrl.reg_hdmi_rx0_ddc1_io_ctrl = 0x1;
  79. uart0_tx_ctrl.reg_hdmi_rx0_ddc0_io_ctrl = 0x10;
  80. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_10, uart0_tx_ctrl);
  81. //sin_in_sel
  82. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_24);
  83. rs_standby_sh08_top_stby_ctrl_24 uart0_in_sel = (*(standby_sh08_top_stby_ctrl_24(uiUart)));
  84. uart0_in_sel.reg_uart0_sin_use_sel = 0;
  85. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_24, uart0_in_sel);
  86. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_4);
  87. rs_standby_sh08_top_stby_ctrl_4 stby_uart0_in_sel = (*(standby_sh08_top_stby_ctrl_4(uiUart)));
  88. stby_uart0_in_sel.reg_uart0_sin_in_sel = 0;
  89. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_4, stby_uart0_in_sel);
  90. /* use hdmi1 uart0 to debug */
  91. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_24);
  92. rs_standby_sh08_top_stby_ctrl_24 hdmi1_uart0_tx__func = (*(standby_sh08_top_stby_ctrl_24(uiUart)));
  93. hdmi1_uart0_tx__func.reg_hdmi_rx1_ddc1_func_sel = 3;
  94. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_24, hdmi1_uart0_tx__func);
  95. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_0);
  96. rs_standby_sh08_top_stby_ctrl_0 hdmi1_uart0_rx__func = (*(standby_sh08_top_stby_ctrl_0(uiUart)));
  97. hdmi1_uart0_rx__func.reg_hdmi_rx1_ddc0_func_sel = 0;
  98. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_0, hdmi1_uart0_rx__func);
  99. //io_ctrl
  100. uiUart = BOARD_R32(rs_standby_sh08_top_stby_ctrl_14);
  101. rs_standby_sh08_top_stby_ctrl_14 hdmi1_uart0_tx_ctrl= (*(standby_sh08_top_stby_ctrl_14(uiUart)));
  102. hdmi1_uart0_tx_ctrl.reg_hdmi_rx1_ddc1_io_ctrl = 0x1;
  103. hdmi1_uart0_tx_ctrl.reg_hdmi_rx1_ddc0_io_ctrl = 0x10;
  104. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_10, hdmi1_uart0_tx_ctrl);
  105. //sin_in_sel
  106. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_24);
  107. rs_standby_sh08_top_stby_ctrl_24 hdmi1_uart0_in_sel = (*(standby_sh08_top_stby_ctrl_24(uiUart)));
  108. hdmi1_uart0_in_sel.reg_uart0_sin_use_sel = 0;
  109. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_24, hdmi1_uart0_in_sel);
  110. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_4);
  111. rs_standby_sh08_top_stby_ctrl_4 hdmi1_stby_uart0_in_sel = (*(standby_sh08_top_stby_ctrl_4(uiUart)));
  112. hdmi1_stby_uart0_in_sel.reg_uart0_sin_in_sel = 0;
  113. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_4, hdmi1_stby_uart0_in_sel);
  114. #else
  115. /* use uart0 to debug */
  116. uiUart = BOARD_R32(RX_SH08_TOP_RX_CTRL_4);
  117. rs_rx_sh08_top_rx_ctrl_4 uart0_func = (*(rx_sh08_top_rx_ctrl_4(uiUart)));
  118. uart0_func.reg_uart0_rx_func_sel = 1;
  119. uart0_func.reg_uart0_tx_func_sel = 1;
  120. BOARD_W32_REG(RX_SH08_TOP_RX_CTRL_4, uart0_func);
  121. //pin_sel
  122. uiUart = BOARD_R32(RX_SH08_TOP_RX_CTRL_10);
  123. rs_rx_sh08_top_rx_ctrl_10 uart0_pin= (*(rx_sh08_top_rx_ctrl_10(uiUart)));
  124. uart0_pin.reg_uart0_rx_pin_sel = 0;
  125. uart0_pin.reg_uart0_tx_pin_sel = 0;
  126. BOARD_W32_REG(RX_SH08_TOP_RX_CTRL_10, uart0_pin);
  127. //io_ctrl
  128. uiUart = BOARD_R32(RX_SH08_TOP_RX_CTRL_38);
  129. rs_rx_sh08_top_rx_ctrl_38 uart0_tx_ctrl= (*(rx_sh08_top_rx_ctrl_38(uiUart)));
  130. uart0_tx_ctrl.reg_uart0_tx_io_ctrl = 0x1;
  131. uart0_tx_ctrl.reg_uart0_rx_io_ctrl = 0x40;
  132. BOARD_W32_REG(RX_SH08_TOP_RX_CTRL_38, uart0_tx_ctrl);
  133. //sin_in_sel
  134. uiUart = BOARD_R32(RX_SH08_TOP_RX_CTRL_8);
  135. rs_rx_sh08_top_rx_ctrl_8 uart0_in_sel = (*(rx_sh08_top_rx_ctrl_8(uiUart)));
  136. uart0_in_sel.reg_uart0_sin_in_sel = 0;
  137. BOARD_W32_REG(RX_SH08_TOP_RX_CTRL_8, uart0_in_sel);
  138. uiUart = BOARD_R32(STANDBY_SH08_TOP_STBY_CTRL_4);
  139. rs_standby_sh08_top_stby_ctrl_4 stby_uart0_in_sel = (*(standby_sh08_top_stby_ctrl_4(uiUart)));
  140. stby_uart0_in_sel.reg_uart0_sin_in_sel = 0;
  141. BOARD_W32_REG(STANDBY_SH08_TOP_STBY_CTRL_4, stby_uart0_in_sel);
  142. #endif
  143. return;
  144. }
  145. #define HS_DEBUG_UART_BASE_ADDR (0)
  146. /**
  147. * @brief interface to int debug uart.
  148. * @param[in] baudrate to set.
  149. * @return none.
  150. */
  151. static void Hv_Chip_DebugUartInit(unsigned int uBaudrate)
  152. {
  153. unsigned int uDdiv = 0;
  154. unsigned int uData = 0;
  155. unsigned int uVal = 0;
  156. unsigned int uUart = 0;
  157. Hv_Chip_SwitchQspiRsic();
  158. Hv_Chip_SetIOUserMode();
  159. {
  160. if(!HS_DEBUG_UART_BASE_ADDR)
  161. {
  162. Hv_Chip_DebugUartConfig();
  163. }
  164. // else
  165. // {
  166. // /* use uart1 to debug */
  167. // rs_sys_sh08_top_tx_ctrl_0 uart1_func={0};
  168. // uart1_func.reg_uart1_rx_func_sel =0;
  169. // uart1_func.reg_uart1_tx_func_sel =0;
  170. // BOARD_W32_REG(SYS_SH08_TOP_TX_CTRL_0, uart1_func);
  171. // rs_sys_sh08_top_tx_ctrl_8 uart1_pin={0};
  172. // uart1_pin.reg_uart1_rx_pin_sel = 0;
  173. // uart1_pin.reg_uart1_tx_pin_sel = 0;
  174. // BOARD_W32_REG(SYS_SH08_TOP_TX_CTRL_8, uart1_pin);
  175. // rs_sys_sh08_top_tx_ctrl_20 uart1_tx_ctrl={0};
  176. // uart1_tx_ctrl.reg_uart1_tx_io_ctrl = 0x1;
  177. // uart1_tx_ctrl.reg_uart1_rx_io_ctrl = 0x40;
  178. // BOARD_W32_REG(SYS_SH08_TOP_TX_CTRL_20, uart1_tx_ctrl);
  179. // }
  180. }
  181. /* set fcr */
  182. {
  183. rs_cpu_sys_uart0_fcr fcr = {0};
  184. fcr.reg_FIFOE = 1;
  185. fcr.reg_RFIFOR = 1;
  186. fcr.reg_XFIFOR = 1;
  187. BOARD_W32_REG(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_FCR, fcr);
  188. }
  189. /* set baudrate */
  190. {
  191. uDdiv = ((HV_CHIP_CLK_AHB >> 4) + (uBaudrate >> 2)) / uBaudrate;
  192. uVal = BOARD_R32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_LCR);
  193. /* Enable setup baudrate */
  194. BOARD_W32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_LCR, uVal | 0x80);
  195. BOARD_W32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_THR_DLL, uDdiv & 0xff);
  196. BOARD_W32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_DLH_IER, (uDdiv >> 8) & 0xff);
  197. /* Disable setup baudrate */
  198. BOARD_W32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_LCR, uVal & 0x7f);
  199. }
  200. /* set lcr: stop bit, data bit, 奇偶 */
  201. {
  202. uData = (((BOARD_DEBUG_UART_STOP_BITS << 2) & 0x04) | ((BOARD_DEBUG_UART_DATA_BITS - 5) & 0x3));
  203. uVal = BOARD_R32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_LCR);
  204. /* NO ODD/EVEN */
  205. uVal = (uVal & 0xE0) | uData;
  206. BOARD_W32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_LCR, uVal);
  207. }
  208. }
  209. /**
  210. * @brief interface to put uart a char.
  211. * @param[in] the char to put.
  212. * @return always 1.
  213. */
  214. static int Hv_Chip_DebugUartPutc(int iChar)
  215. {
  216. unsigned int uVal = 0;
  217. if (iChar == '\n')
  218. {
  219. Hv_Chip_DebugUartPutc('\r');
  220. }
  221. uVal = BOARD_R32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_LSR);
  222. while (cpu_sys_uart0_lsr(uVal)->reg_THRE == 0){
  223. uVal = BOARD_R32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_LSR);
  224. }
  225. BOARD_W32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_THR_DLL, iChar);
  226. return 1;
  227. }
  228. /**
  229. * @brief whether to get a kb hit.
  230. * @param[in] none.
  231. * @return the value to hit or 0 for none.
  232. */
  233. static int Hv_Chip_DebugUartKbhit(void)
  234. {
  235. unsigned int uVal = BOARD_R32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_LSR);
  236. if (cpu_sys_uart0_lsr(uVal)->reg_DR)
  237. {
  238. return BOARD_R32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_THR_DLL);
  239. } else {
  240. return 0;
  241. }
  242. }
  243. /**
  244. * @brief interface to get a input char.
  245. * @param[in] the char value to get.
  246. * @return 0-success 1-fail.
  247. */
  248. static int Hv_Chip_DebugUartGetc(char *ch)
  249. {
  250. unsigned int uVal = BOARD_R32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_LSR);
  251. if (cpu_sys_uart0_lsr(uVal)->reg_DR == 0)
  252. {
  253. return 1;/*1代表fail*/
  254. }
  255. else
  256. {
  257. *ch = BOARD_R32(HS_DEBUG_UART_BASE_ADDR + CPU_SYS_UART0_THR_DLL);
  258. }
  259. return 0;
  260. }
  261. #undef BOARD_W32
  262. #undef BOARD_R32
  263. #undef BOARD_REG_VAL
  264. #undef BOARD_W32_REG
  265. #undef BOARD_DEBUG_UART_STOP_BITS
  266. #undef BOARD_DEBUG_UART_DATA_BITS
  267. /**
  268. * @brief interface to put chars.
  269. * @param[in] the strings to put.
  270. * @return none.
  271. */
  272. static void Hv_Chip_DebugUartPuts(const char *pcChar)
  273. {
  274. if (!pcChar)
  275. {
  276. return;
  277. }
  278. while (*pcChar)
  279. {
  280. Hv_Chip_DebugUartPutc(*pcChar);
  281. ++pcChar;
  282. }
  283. }
  284. /**
  285. * @brief interface to put chars with length to separate fd.
  286. * @param[in] debug fd. not usr now.
  287. * @param[in] the strings to put.
  288. * @param[in] the length.
  289. * @return none.
  290. */
  291. static void Hv_Chip_DebugUartWrite(int iFd, const char *pcBuf, int iLen)
  292. {
  293. int iLoop = 0;
  294. if (!pcBuf)
  295. {
  296. return;
  297. }
  298. if (iFd != 1 && iFd != 2)
  299. {
  300. Hv_Chip_DebugUartPuts("Unknown fd for write\n");
  301. } else {
  302. for (iLoop = 0; iLoop < iLen; iLoop++)
  303. {
  304. Hv_Chip_DebugUartPutc(pcBuf[iLoop]);
  305. }
  306. }
  307. }
  308. #endif