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- /**
- * @file hv_drv_PLL.h
- * @brief PHY driver layer interface.
- * @verbatim
- * ==============================================================================
- * ##### How to use this driver #####
- * ==============================================================================
- * (+) Use Hv_Drv_PLL_SetAudioLaneClock(...) to Select the Audio Rx Reference Lane Clock.
- * (+) Use Hv_Drv_PLL_ConfigRxDpllSel(...) to Select the RX Dpll path.
- * (+) Use Hv_Drv_PLL_SetDisplayClock(...) to Configure the DPU Clock.
- *
- * @endverbatim
- *
- * @author HiView SoC Software Team
- * @version 0.0.1
- * @date 2022-08-22
- */
- #ifndef __SDK_DRIVER_PLL_H__
- #define __SDK_DRIVER_PLL_H__
- #include "hv_comm_DataType.h"
- #include "hv_comm_Define.h"
- #include "hv_drv_DpuCommon.h"
- #include "hv_drv_Ktx.h"
- #include "hv_cal_KtxCommon.h"
- Status Hv_Drv_PLL_SetAudioLaneClock(LinkPortIndex enAudioRefPortIndex);
- Status Hv_Drv_PLL_ConfigRxDpllSel(UINT32 uiRxPllIndex, LinkPortIndex enReleasePortIndex, LinkPortIndex enBindPortIndex);
- Status Hv_Drv_PLL_ConfigRxDpllMuteSel(BOOL bSamePll);
- Status Hv_Drv_PLL_SetRxdpllPixelClock(ChannelType enChannelCfg, UINT32* puiRxDclockOut, UINT32 uiRxClockDst);
- /**
- * @brief 计算并生成 Display clock.
- * @param[in] uiDisplayDestClock RX D clock.
- * @param[out] *puiDClkCfg最终算出来的Display Clock unit Khz
- * @return 0: Success or other: Fail.
- */
- Status Hv_Drv_PLL_SetDisplayClock(UINT32* puiDClkCfg, UINT32 uiDisplayDestClock,VideoConfigParams* pstVideoConfigParams);
- /**
- * @brief 计算并生成 EDP的F0 - COMBOTX_PHY_0 所使用的参数.
- * @param[in] pstKtxInParam KTX输入参数.
- * @param[out] pstTxPllCfg 输出COMBOTX_PHY_0需要写入的参数
- * @return 0: Success or other: Fail.
- */
- Status Hv_Drv_EdpTx_PllCalculator(const HvDrvKtxInParam *pstKtxInParam, HvKtxPllCfgParam *pstKtxPllCfgParam);
- /**
- * @brief 计算并生成 VBO的F0 - COMBOTX_PHY_0 所使用的参数.
- * @param[in] pstKtxInParam KTX输入参数.
- * @param[out] pstTxPllCfg 输出COMBOTX_PHY_0需要写入的参数
- * @return 0: Success or other: Fail.
- */
- Status Hv_Drv_VboTx_PllCalculator(const HvDrvKtxInParam *pstKtxInParam, HvDrvKtxDesign *pstKtxDesign, HvKtxPllCfgParam *pstKtxPllCfgParam);
- Status Hv_Drv_VboTx_TaibaiPllCalculator(const HvDrvKtxInParam *pstKtxInParam, UINT32 uiPixClkFreq, HvKtxPllCfgParam *pstKtxPllCfgParam);
- /**
- * @brief initialize sscg.
- */
- VOID Hv_Drv_Sscg_Init(VOID);
- /**
- * @brief set sscg enable.
- * @param[in] enType: vbo/edp/ddr. bEnble: on/off
- */
- VOID Hv_Drv_Sscg_Enalbe(SscgType enType, BOOL bEnble);
- /**
- * @brief set sscg freq.
- * @param[in] enType: vbo/edp/ddr. uiFreq: modulation frequency: 0-100(k)
- */
- VOID Hv_Drv_Sscg_SetSscgFreq(SscgType enType, UCHAR8 ucFreq);
- /**
- * @brief set sscg step.
- * @param[in] enType: vbo/edp/ddr. uiFreq: modulation step: 0-30(0%-3%)
- */
- VOID Hv_Drv_Sscg_SetSscgStep(SscgType enType, UCHAR8 ucStep);
- /**
- * @brief set sscg spread.
- * @param[in] enType: vbo/edp/ddr.
- * @param[in] ucFreq: vbo/edp/ddr. uiFreq: modulation frequency: 0-100(k)
- * @param[in] ucStep: vbo/edp/ddr. uiFreq: modulation step: 0-20(0%-2%)
- */
- VOID Hv_Drv_Sscg_SetSscg(SscgType enType, UCHAR8 ucStep, UCHAR8 ucFreq);
- /**
- * @brief set sscg mode.
- * @param[in] enType: vbo/edp/ddr. uiFreq: modulation ucMode: up/down/center
- */
- VOID Hv_Drv_Sscg_SetSscgMode(SscgType enType, UCHAR8 ucMode);
- /**
- * @brief initialize pll.
- */
- VOID Hv_Drv_PLL_Init(VOID);
- Status Hv_Drv_PLL_CheckRxDpllLock(UCHAR8 ucPortIndex);
- Status Hv_Drv_PLL_CheckPtcdPllLock(VOID);
- Status Hv_Drv_PLL_CheckSysPllLock(VOID);
- Status Hv_Drv_PLL_CheckTxdPllLock(VOID);
- Status Hv_Drv_PLL_CheckAudioPllLock(VOID);
- Status Hv_Drv_PLL_CheckFNPllLock(VOID);
- VOID Hv_Drv_PLL_ResetRxDpll(UCHAR8 ucPortIndex);
- VOID Hv_Drv_PLL_ResetPtcdPll(VOID);
- VOID Hv_Drv_PLL_ResetSysPll(VOID);
- VOID Hv_Drv_PLL_ResetTxdPll(VOID);
- VOID Hv_Drv_PLL_ResetFNPll(VOID);
- VOID Hv_Drv_PLL_ResetAudioPll(VOID);
- VOID Hv_Drv_PLL_SetPtcdpllSscgPlln(UINT32 uiPtcdFBDivInt, UINT32 uiPtcdFBDivFrac, UINT32 uiPtcdPostDiv);
- #endif
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