hv_drv_UsbMusbDma.h 6.0 KB

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  1. /*
  2. * @file hv_drv_UsbMusbDma.h
  3. * @brief MUSB OTG driver DMA controller abstraction.
  4. *
  5. * @author HiView SoC Software Team
  6. * @version 1.0.0
  7. * @date 2022-06-15
  8. */
  9. #ifndef __HV_DRV_USB_MUSB_DMA_H_
  10. #define __HV_DRV_USB_MUSB_DMA_H_
  11. struct musb_hw_ep;
  12. /*
  13. * DMA Controller Abstraction
  14. *
  15. * DMA Controllers are abstracted to allow use of a variety of different
  16. * implementations of DMA, as allowed by the Inventra USB cores. On the
  17. * host side, usbcore sets up the DMA mappings and flushes caches; on the
  18. * peripheral side, the gadget controller driver does. Responsibilities
  19. * of a DMA controller driver include:
  20. *
  21. * - Handling the details of moving multiple USB packets
  22. * in cooperation with the Inventra USB core, including especially
  23. * the correct RX side treatment of short packets and buffer-full
  24. * states (both of which terminate transfers).
  25. *
  26. * - Knowing the correlation between dma channels and the
  27. * Inventra core's local endpoint resources and data direction.
  28. *
  29. * - Maintaining a list of allocated/available channels.
  30. *
  31. * - Updating channel status on interrupts,
  32. * whether shared with the Inventra core or separate.
  33. */
  34. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  35. #ifndef CONFIG_USB_MUSB_PIO_ONLY
  36. #define is_dma_capable() (1)
  37. #else
  38. #define is_dma_capable() (0)
  39. #endif
  40. #ifdef CONFIG_USB_TI_CPPI_DMA
  41. #define is_cppi_enabled() 1
  42. #else
  43. #define is_cppi_enabled() 0
  44. #endif
  45. /*
  46. * DMA channel status ... updated by the dma controller driver whenever that
  47. * status changes, and protected by the overall controller spinlock.
  48. */
  49. enum dma_channel_status {
  50. /* unallocated */
  51. MUSB_DMA_STATUS_UNKNOWN,
  52. /* allocated ... but not busy, no errors */
  53. MUSB_DMA_STATUS_FREE,
  54. /* busy ... transactions are active */
  55. MUSB_DMA_STATUS_BUSY,
  56. /* transaction(s) aborted due to ... dma or memory bus error */
  57. MUSB_DMA_STATUS_BUS_ABORT,
  58. /* transaction(s) aborted due to ... core error or USB fault */
  59. MUSB_DMA_STATUS_CORE_ABORT
  60. };
  61. struct dma_controller;
  62. /**
  63. * struct dma_channel - A DMA channel.
  64. * @private_data: channel-private data
  65. * @max_len: the maximum number of bytes the channel can move in one
  66. * transaction (typically representing many USB maximum-sized packets)
  67. * @actual_len: how many bytes have been transferred
  68. * @status: current channel status (updated e.g. on interrupt)
  69. * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
  70. *
  71. * channels are associated with an endpoint for the duration of at least
  72. * one usb transfer.
  73. */
  74. struct dma_channel {
  75. void *private_data;
  76. /* FIXME not void* private_data, but a dma_controller * */
  77. size_t max_len;
  78. size_t actual_len;
  79. enum dma_channel_status status;
  80. bool desired_mode;
  81. };
  82. /*
  83. * dma_channel_status - return status of dma channel
  84. * @c: the channel
  85. *
  86. * Returns the software's view of the channel status. If that status is BUSY
  87. * then it's possible that the hardware has completed (or aborted) a transfer,
  88. * so the driver needs to update that status.
  89. */
  90. static inline enum dma_channel_status
  91. dma_channel_status(struct dma_channel *c)
  92. {
  93. return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
  94. }
  95. /**
  96. * struct dma_controller - A DMA Controller.
  97. * @start: call this to start a DMA controller;
  98. * return 0 on success, else negative errno
  99. * @stop: call this to stop a DMA controller
  100. * return 0 on success, else negative errno
  101. * @channel_alloc: call this to allocate a DMA channel
  102. * @channel_release: call this to release a DMA channel
  103. * @channel_abort: call this to abort a pending DMA transaction,
  104. * returning it to FREE (but allocated) state
  105. *
  106. * Controllers manage dma channels.
  107. */
  108. struct dma_controller {
  109. int (*start)(struct dma_controller *);
  110. int (*stop)(struct dma_controller *);
  111. struct dma_channel *(*channel_alloc)(struct dma_controller *,
  112. struct musb_hw_ep *, u8 is_tx);
  113. void (*channel_release)(struct dma_channel *);
  114. int (*channel_program)(struct dma_channel *channel,
  115. u16 maxpacket, u8 mode,
  116. dma_addr_t dma_addr,
  117. u32 length);
  118. int (*channel_abort)(struct dma_channel *);
  119. int (*is_compatible)(struct dma_channel *channel,
  120. u16 maxpacket,
  121. void *buf, u32 length);
  122. };
  123. /* called after channel_program(), may indicate a fault */
  124. extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
  125. extern struct dma_controller *__init
  126. dma_controller_create(struct musb *, void *);
  127. extern void dma_controller_destroy(struct dma_controller *);
  128. #ifdef CONFIG_USB_MUSB_PIO_ONLY
  129. static inline struct dma_controller *
  130. musb_dma_controller_create(struct musb *m, void *io)
  131. {
  132. return NULL;
  133. }
  134. static inline void musb_dma_controller_destroy(struct dma_controller *d) { }
  135. #else
  136. extern struct dma_controller *musbhs_dma_controller_create(struct musb *musb,
  137. void *base);
  138. extern void musbhs_dma_controller_destroy(struct dma_controller *c);
  139. #endif
  140. /*
  141. * These definitions mirror those in pci.h, so they can be used
  142. * interchangeably with their PCI_ counterparts.
  143. */
  144. enum dma_data_direction {
  145. DMA_BIDIRECTIONAL = 0,
  146. DMA_TO_DEVICE = 1,
  147. DMA_FROM_DEVICE = 2,
  148. DMA_NONE = 3,
  149. };
  150. static inline unsigned long dma_map_single(void *dev, void *vaddr, size_t size,
  151. enum dma_data_direction dir)
  152. {
  153. return (unsigned long)vaddr;
  154. }
  155. static inline void dma_unmap_single(void *dev, void *vaddr, size_t size,
  156. enum dma_data_direction dir)
  157. {
  158. }
  159. static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
  160. size_t size,
  161. enum dma_data_direction dir)
  162. {
  163. }
  164. static inline void dma_sync_single_for_device(struct device *dev,
  165. dma_addr_t addr, size_t size,
  166. enum dma_data_direction dir)
  167. {
  168. }
  169. #endif