STARTUP_xram.A51 7.7 KB

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  1. $NOMOD51
  2. ;------------------------------------------------------------------------------
  3. ; This file is part of the C51 Compiler package
  4. ; Copyright (c) 1988-2005 Keil Elektronik GmbH and Keil Software, Inc.
  5. ; Version 8.01
  6. ;
  7. ; *** <<< Use Configuration Wizard in Context Menu >>> ***
  8. ;------------------------------------------------------------------------------
  9. ; STARTUP.A51: This code is executed after processor reset.
  10. ;
  11. ; To translate this file use A51 with the following invocation:
  12. ;
  13. ; A51 STARTUP.A51
  14. ;
  15. ; To link the modified STARTUP.OBJ file to your application use the following
  16. ; Lx51 invocation:
  17. ;
  18. ; Lx51 your object file list, STARTUP.OBJ controls
  19. ;
  20. ;------------------------------------------------------------------------------
  21. ;
  22. ; User-defined <h> Power-On Initialization of Memory
  23. ;
  24. ; With the following EQU statements the initialization of memory
  25. ; at processor reset can be defined:
  26. ;
  27. ; <o> IDATALEN: IDATA memory size <0x0-0x100>
  28. ; <i> Note: The absolute start-address of IDATA memory is always 0
  29. ; <i> The IDATA space overlaps physically the DATA and BIT areas.
  30. ;IDATALEN EQU 0H
  31. IDATALEN EQU 80H
  32. ;
  33. ; <o> XDATASTART: XDATA memory start address <0x0-0xFFFF>
  34. ; <i> The absolute start address of XDATA memory
  35. XDATASTART EQU 0
  36. ;
  37. ; <o> XDATALEN: XDATA memory size <0x0-0xFFFF>
  38. ; <i> The length of XDATA memory in bytes.
  39. XDATALEN EQU 0
  40. ;
  41. ; <o> PDATASTART: PDATA memory start address <0x0-0xFFFF>
  42. ; <i> The absolute start address of PDATA memory
  43. PDATASTART EQU 0H
  44. ;
  45. ; <o> PDATALEN: PDATA memory size <0x0-0xFF>
  46. ; <i> The length of PDATA memory in bytes.
  47. PDATALEN EQU 0H
  48. ;
  49. ;</h>
  50. ;------------------------------------------------------------------------------
  51. ;
  52. ;<h> Reentrant Stack Initialization
  53. ;
  54. ; The following EQU statements define the stack pointer for reentrant
  55. ; functions and initialized it:
  56. ;
  57. ; <h> Stack Space for reentrant functions in the SMALL model.
  58. ; <q> IBPSTACK: Enable SMALL model reentrant stack
  59. ; <i> Stack space for reentrant functions in the SMALL model.
  60. IBPSTACK EQU 0 ; set to 1 if small reentrant is used.
  61. ; <o> IBPSTACKTOP: End address of SMALL model stack <0x0-0xFF>
  62. ; <i> Set the top of the stack to the highest location.
  63. IBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1
  64. ; </h>
  65. ;
  66. ; <h> Stack Space for reentrant functions in the LARGE model.
  67. ; <q> XBPSTACK: Enable LARGE model reentrant stack
  68. ; <i> Stack space for reentrant functions in the LARGE model.
  69. XBPSTACK EQU 0 ; set to 1 if large reentrant is used.
  70. ; <o> XBPSTACKTOP: End address of LARGE model stack <0x0-0xFFFF>
  71. ; <i> Set the top of the stack to the highest location.
  72. XBPSTACKTOP EQU 0xFFFF +1 ; default 0FFFFH+1
  73. ; </h>
  74. ;
  75. ; <h> Stack Space for reentrant functions in the COMPACT model.
  76. ; <q> PBPSTACK: Enable COMPACT model reentrant stack
  77. ; <i> Stack space for reentrant functions in the COMPACT model.
  78. PBPSTACK EQU 0 ; set to 1 if compact reentrant is used.
  79. ;
  80. ; <o> PBPSTACKTOP: End address of COMPACT model stack <0x0-0xFFFF>
  81. ; <i> Set the top of the stack to the highest location.
  82. PBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1
  83. ; </h>
  84. ;</h>
  85. ;------------------------------------------------------------------------------
  86. ;
  87. ; Memory Page for Using the Compact Model with 64 KByte xdata RAM
  88. ; <e>Compact Model Page Definition
  89. ;
  90. ; <i>Define the XDATA page used for PDATA variables.
  91. ; <i>PPAGE must conform with the PPAGE set in the linker invocation.
  92. ;
  93. ; Enable pdata memory page initalization
  94. PPAGEENABLE EQU 0 ; set to 1 if pdata object are used.
  95. ;
  96. ; <o> PPAGE number <0x0-0xFF>
  97. ; <i> uppermost 256-byte address of the page used for PDATA variables.
  98. PPAGE EQU 0
  99. ;
  100. ; <o> SFR address which supplies uppermost address byte <0x0-0xFF>
  101. ; <i> most 8051 variants use P2 as uppermost address byte
  102. PPAGE_SFR DATA 0A0H
  103. ;
  104. ; </e>
  105. ;------------------------------------------------------------------------------
  106. ; Standard SFR Symbols
  107. ACC DATA 0E0H
  108. B DATA 0F0H
  109. SP DATA 81H
  110. DPL DATA 82H
  111. DPH DATA 83H
  112. SCON DATA 98H
  113. TMOD DATA 89H
  114. TCON DATA 88H
  115. TH1 DATA 8DH
  116. SBUF DATA 99H
  117. MEX1 DATA 94H
  118. MEX2 DATA 95H
  119. ;sfr MIIC = 0xCF ; 8051 Mater IIC
  120. DMARSTART XDATA 8000H ;DMA ram start address
  121. DMAESTART XDATA 8005H ;DMA EEPROM start address
  122. DMADLEN XDATA 8002H ;DMA mov length
  123. DMATRIG XDATA 8004H ;0x8004[7] set to 1 start DMA, hardware clear to 0 after dma done
  124. sbit TI = 0x98^1
  125. sbit EA = 0xAF
  126. sbit PS = 0xBC
  127. sbit ES = 0xAC
  128. sbit ET1 = 0xAB
  129. NAME ?C_STARTUP
  130. ?C_C51STARTUP SEGMENT CODE
  131. ?STACK SEGMENT IDATA
  132. RSEG ?STACK
  133. DS 1
  134. EXTRN CODE (?C_START)
  135. PUBLIC ?C_STARTUP
  136. CSEG AT 0
  137. ?C_STARTUP: LJMP STARTUP1
  138. ;EEPROM_OFF: DB 00H, 00h
  139. ;APP_LEN: DB 20h, 00h
  140. RSEG ?C_C51STARTUP
  141. READ_APPINFO:
  142. CLR A
  143. MOVC A, @A+DPTR
  144. MOV R0, A
  145. MOV A, #0x01
  146. MOVC A, @A+DPTR
  147. MOV R1, A
  148. RET
  149. EEPROM_OFF: DB 00H, 00h
  150. APP_LEN: DB 40h, 00h
  151. STARTUP1:
  152. IF IDATALEN <> 0
  153. MOV R0,#IDATALEN - 1
  154. CLR A
  155. IDATALOOP: MOV @R0,A
  156. DJNZ R0,IDATALOOP
  157. ENDIF
  158. ;IF XDATALEN <> 0
  159. ; MOV DPTR,#XDATASTART
  160. ; MOV R7,#LOW (XDATALEN)
  161. ; IF (LOW (XDATALEN)) <> 0
  162. ; MOV R6,#(HIGH (XDATALEN)) +1
  163. ; ELSE
  164. ; MOV R6,#HIGH (XDATALEN)
  165. ; ENDIF
  166. ; CLR A
  167. ;XDATALOOP: MOVX @DPTR,A
  168. ; INC DPTR
  169. ; DJNZ R7,XDATALOOP
  170. ; DJNZ R6,XDATALOOP
  171. ;ENDIF
  172. IF PPAGEENABLE <> 0
  173. MOV PPAGE_SFR,#PPAGE
  174. ENDIF
  175. IF PDATALEN <> 0
  176. MOV R0,#LOW (PDATASTART)
  177. MOV R7,#LOW (PDATALEN)
  178. CLR A
  179. PDATALOOP: MOVX @R0,A
  180. INC R0
  181. DJNZ R7,PDATALOOP
  182. ENDIF
  183. IF IBPSTACK <> 0
  184. EXTRN DATA (?C_IBP)
  185. MOV ?C_IBP,#LOW IBPSTACKTOP
  186. ENDIF
  187. IF XBPSTACK <> 0
  188. EXTRN DATA (?C_XBP)
  189. MOV ?C_XBP,#HIGH XBPSTACKTOP
  190. MOV ?C_XBP+1,#LOW XBPSTACKTOP
  191. ENDIF
  192. IF PBPSTACK <> 0
  193. EXTRN DATA (?C_PBP)
  194. MOV ?C_PBP,#LOW PBPSTACKTOP
  195. ENDIF
  196. MOV SP,#?STACK-1
  197. ;if realchip ,go down ,if no flash,go ?c_start
  198. LJMP ?C_START
  199. ; set dma xram start addr
  200. CLR A
  201. MOV DPTR, #0x8000 ; 0x8000 is xdata register addr, defines sram start addr low byte, 0x8000 [7:0]
  202. MOVX @DPTR, A
  203. INC DPTR ; 0x8001 is xdata register addr, defines sram start addr high byte, 0x8001[15:8]
  204. MOVX @DPTR, A
  205. ; set dma eeprom read length, this value is APP_LEN, APP_LEN low address stores high byte
  206. ; set read length low byte
  207. MOV DPTR, #APP_LEN
  208. LCALL READ_APPINFO
  209. MOV A, R1
  210. MOV DPTR, #0x8002
  211. MOVX @DPTR, A ; save to low byte
  212. MOV A, R0
  213. INC DPTR
  214. MOVX @DPTR, A ; save to low byte
  215. ; set eeprom offset
  216. ; set eeprom offset low byte
  217. MOV DPTR, #EEPROM_OFF
  218. LCALL READ_APPINFO
  219. MOV A, R1
  220. MOV DPTR, #0x8005
  221. MOVX @DPTR, A ; save to low byte
  222. MOV A, R0
  223. INC DPTR
  224. MOVX @DPTR, A ; save to low byte
  225. ; set eeprom third high byte
  226. INC DPTR
  227. CLR A
  228. MOVX @DPTR, A ; most high byte is 0
  229. ; trigger dma
  230. MOV DPTR, #0x8004 ; select 0x8004 register bit[7]
  231. MOV A, #0x80
  232. MOVX @DPTR, A ; trigger
  233. ; loop to check dma down
  234. DMA_LOOP:
  235. MOVX A, @DPTR
  236. JNZ DMA_LOOP
  237. ; switch to bank 14
  238. MOV MEX1, #0x0E
  239. MOV MEX2, #0x0E
  240. MOV DPTR, #0x0000
  241. CLR A
  242. LJMP ?C_START
  243. END