#ifndef __CEC_H__
#define __CEC_H__

#include "hdmi_mapping.h"
#include "hdmi_cfg.h"
#include "drv_hdmi_external.h"

typedef enum
{
	DRV_5V_LEVEL_LOW = 0x00,	
	DRV_5V_LEVEL_HIGH,
} DRV_5V_LEVEL_e;

typedef struct
{
	HDMI_PORT_T ePort;
	DRV_5V_LEVEL_e eLevel;
} DRV_5V_DET_t;

#pragma pack(push,1)
//for CEC interrupt
typedef struct{
	union{
		UINT32 dCECReg0000_0003;
		struct{
			UINT8 rxData:8;
			
			UINT8 rxData_EOM:1;
			UINT8 rxData_ACK:1;
			UINT8 rxData_sbit:1;
			UINT8 R_INTR_Status_rx_ddc5v_2_rise:1;
			UINT8 Rx_FIFO_POP_done:1;
			UINT8 R_INTR_Status_rx_ddc5v_2_fall:1;
			UINT8 R_INTR_Status_rx_ddc5v_3_rise:1;
			UINT8 R_INTR_Status_rx_ddc5v_3_fall:1;
			
			UINT8 ists_tx_noarbit:1;
			UINT8 ists_tx_noack:1;
			UINT8 ists_tx_eom_done:1;
			UINT8 ists_rfifo_overflow:1;
			UINT8 ists_rfifo_ready:1;
			UINT8 ists_rx_pop_done:1;
			UINT8 ists_rx_discon:1;
			UINT8 ists_rx_eom:1;

			UINT8 ists_ddc5v_0_rise:1;
			UINT8 ists_ddc5v_0_fall:1;
			UINT8 ists_ddc5v_1_rise:1;
			UINT8 ists_ddc5v_1_fall:1;
			UINT8 Rx_FIFO_count:3;
			UINT8 Rx_FIFO_overflow:1;
		};

	};
}CEC_REG0000_t;



#pragma pack(pop)

INT32 DRV_CEC_Init(void);

void DRV_CEC_Exit(void);

#ifdef HDMI_DDC5V_WORKAROUND
DRV_5V_LEVEL_e CEC_Get_SW5V(HDMI_PORT_T ePort);
#endif

void DRV_Set_GPIO5V_ARCPort(GPIOPin_t eGpio5V_Pin, HDMI_PORT_T eARCPort);

HDMI_PORT_T DRV_Get_GPIO5V_ARCPort(void);

#endif