#ifndef _DRV_CVD2_INTERNAL_H_ #define _DRV_CVD2_INTERNAL_H_ #include #include #include #ifndef BIT0 #define BIT0 0x01 #endif #ifndef BIT1 #define BIT1 0x02 #endif #ifndef BIT2 #define BIT2 0x04 #endif #ifndef BIT3 #define BIT3 0x08 #endif #ifndef BIT4 #define BIT4 0x10 #endif #ifndef BIT5 #define BIT5 0x20 #endif #ifndef BIT6 #define BIT6 0x40 #endif #ifndef BIT7 #define BIT7 0x80 #endif #define CCTT_ON 1 #define CCTT_OFF 0 /* Use oscillator frequency */ #define Fs_OSC 24 //27,24 MHz #if( Fs_OSC == 27 ) #define NTSC_CDTO_DATA 0x21f07c1f #define NTSC443_CDTO_DATA 0x2a098acb #define PALM_CDTO_DATA 0x21e6efa4 #define PALCN_CDTO_DATA 0x21f69446 #define PALI_CDTO_DATA 0x2a098acb #define SECAM_CDTO_DATA 0x28a33bb2 #define PAL60_CDTO_DATA 0x2a098acb #define ALL_HDTO 0x20000000 #else #define NTSC_CDTO_DATA 0x2549745d //0x254cf394 #define NTSC443_CDTO_DATA 0x2e2efbbc //0x2e33508b #define PALM_CDTO_DATA 0x253ef6c7 //0x25427501 #define PALCN_CDTO_DATA 0x25502666 //0x2553a63d #define PALI_CDTO_DATA 0x2e2efbbc //0x2e33508b #define SECAM_CDTO_DATA 0x2ca4b855 //0x2ca55555 //0x2ca98539 #define PAL60_CDTO_DATA 0x2e2efbbc //0x2e33508b #define ALL_HDTO 0x23280000 //0x232b4c0f #endif #define GET_HCDTO_BYTE1(SET_CDTO) ( SET_CDTO & 0xff ) #define GET_HCDTO_BYTE2(SET_CDTO) ( (SET_CDTO >> 8 ) & 0xff ) #define GET_HCDTO_BYTE3(SET_CDTO) ( (SET_CDTO >> 16 ) & 0xff ) #define GET_HCDTO_BYTE4(SET_CDTO) ( (SET_CDTO >> 24 ) & 0xff ) #define CVD2_BASIC_ADDRESS 0xbe170000 //================================================================================================= // CVD2 register address. //================================================================================================= //================================================================================================= // CVD2 bits define. //================================================================================================= /* Reg=0x3a */ enum { no_signal = BIT0, hlock = BIT1, vlock = BIT2, chroma_lock = BIT3, chroma_hv_Locked = 0x0e, }; /* Reg=0x3c */ typedef enum { ntsc_detected = 0x00, pal_detected = BIT0, secam_detected = BIT1, _625lines_detected = BIT2, COLOR_SYSTEM_DETECTED = 0x07, }cvd2_TypeDetectStatus; /* VBI data Type */ typedef enum { US_CC, EURO_CC, VPS, TT_625A, TT_625B, TT_625C, TT_625D, TT_525B, TT_525C, TT_525D, WST625, WST525, WSS625, WSSJ, CC_TT_END }cvd2_TypeVbiMode; /* Define FC status flags. */ typedef enum{ FC_SAME, FC_LESS, FC_MORE, }cvd2_TypeFcStatus; /*Select input source */ enum { CVBS=0, SVIDEO, CVD2ATV, RGB_SOURCE, NONE_SOURCE }; /* Enable or Disable timer. */ typedef enum { CVD2_DISABLE, CVD2_ENABLE, }cvd2_TypeTimerStatus; typedef enum { TV_INPUT, AV_INPUT, SV_INPUT, NONE_INPUT, CVD2_END_INPUT = NONE_INPUT }cvd2_TypeInputSrc; typedef enum { CVD2_EXE_OK = 0, // Execution successful CVD2_CLK_ERROR, // Execution Fail due to clock is disabled CVD2_UNKNOWN_ERROR // Reserved extending Error conditions }cvd2_TypeExeResult; typedef enum { TTSLICER_MODE_0, TTSLICER_MODE_1, TTSLICER_MODE_2, TTSLICER_MODE_3, }cvd2_TypeTTSlicerMode; typedef struct _Cvd2HVactive_t { UINT8 CbCrSwap; UINT8 VactiveStart; UINT8 VactiveHeight; UINT8 OddEvenSwap; UINT8 HactiveDelay; UINT16 HactiveStart; // 10 bits since p330 UINT16 HactiveEnd; // Add since p330 }Cvd2HVactive_t; typedef struct _CVBSOutRequest_t { cvd2_TypeInputSrc SrcType; BOOL Enable; cvd2_TypeCVBSOMode OutMode; }cvd2_TypeCVBSOut, *cvd2_pTypeCVBSOut; typedef struct _Cvd2OSDAdjValue_t { UINT8 path; UINT8 cmd; INT32 value; INT32 min; INT32 max; }cvd2_TypeOSDAdjValue, *cvd2_pTypeOSDAdjValue; typedef struct _Cvd2SigSTD_t { BOOL vertical_nSTD; // vnon_standard BOOL horizontal_nSTD; // hnon_standard BOOL nSTD_det_en; // non_standard_det_en }cvd2_TypeSigSTD, *cvd2_pTypeSigSTD; /*! * @brief input signal status */ typedef enum { CVD2_SIGNAL_STABLE, CVD2_SIGNAL_UNSTABLE, CVD2_NO_SIGNAL_IN } cvd2_SignalStatus_t; /*! * @brief DRV_CVD2_Detect_AudioM() use for report Audio M or NTSC443 colorburst */ typedef enum { DRV_AudioM = 0, DRV_Colorburst, DRV_None } cvd2_BurstType_t; typedef enum { DRV_TvDec_AUTO_DETECT_PALM = 0x01,//0x01<<0x00, DRV_TvDec_AUTO_DETECT_PALCN = 0x02,//0x01<<0x01, DRV_TvDec_AUTO_DETECT_SECAM = 0x04,//0x01<<0x02, DRV_TvDec_AUTO_DETECT_NTSC443 = 0x08,//0x01<<0x03, DRV_TvDec_AUTO_DETECT_PAL60 = 0x10,//0x01<<0x04, DRV_TvDec_AUTO_DETECT_NTSC = 0x20,//0x01<<0x05, DRV_TvDec_AUTO_DETECT_PALI = 0x40,//0x01<<0x06, DRV_TvDec_AUTO_DETECT_SECAML = 0x80,//0x01<<0x07 } cvd2_AutoDetect_t; typedef enum { DRV_DetectSECAML_None = 0, DRV_DetectSECAML_Detect, DRV_DetectSECAML_Feedback, }cvd2_DetectSECAML_t; typedef enum { DRV_BWnwt_Detect_None = 0, DRV_BWnwt_Detect_Detect }cvd2_DetectBWnwt_t; /* STD Flag */ typedef enum { PAL_Detected = BIT0, Is_SECAM = BIT1, Freq_358 = BIT2, Line_625 = BIT3, Burst_detected = BIT4, }cvd2_TypeStdFlag; ////================================================================================================= // Exporting define function area. //================================================================================================= extern void ADC175_InputSelect( INT32 iInputSource ); extern void DRV_CVD2_EnableTimer( UINT8 ucType ); extern void DRV_CVD2_Change_Channel(UINT8 bUMFChangeChannel,INT32 channel); extern void DRV_CVD2_ChannelScan( BOOL b_scan ); extern INT32 DRV_CVD2_Power(INT32 bPowerOn); extern void DRV_CVD2_InputSelect( UINT8 ucInputSource ); extern BOOL DRV_CVD2_Setup_CVBSOut(cvd2_pTypeCVBSOut pCVBSOut ); extern void DRV_CVD2_Enable_CVBSO_Gain ( BOOL bEnable ); extern UINT8 DRV_CVD2_TV_Get_DetectedStandard(void); extern void DRV_CVD2_TV_Setting(UINT8 ColorSystem); //Sync and color detected. extern UINT8 DRV_CVD2_GetDetectedStandard( void ); extern UINT8 DRV_CVD2_Get_Reg3A ( void ); extern void DRV_CVD2_Ademod_Input_Reset(void *unused); //CC or TT select. extern void DRV_CVD2_Enable_Ypp_CC(void); extern void DRV_CVD2_Disable_Ypp_CC(void); extern INT32 DRV_CVD2_Power_Setting(INT32 bPowerOn); extern void DRV_CVD2_CCTT_Select( UINT8 ucMode, cvd2_TypeVbiMode ucVBI_Type ); //OSD menu in factor mode. extern INT32 DRV_CVD2_Adjust(cvd2_TypeOSDAdjValue osdadj); extern void DRV_CVD2_Sync_OSDFactory(CVD2VideoDecoderSetting_t* osdFactory); extern BOOL DRV_CVD2_GetColorSystem( UINT8 *ucColorMode ); extern void DRV_CVD2_Disable_3DCombMemory(void); extern void DRV_CVD2_Set_AAFFilter(INT32 bUMFSetFilter); extern cvd2_TypeExeResult DRV_CVD2_Set_TTSlicerEccMode(DRV_TvDecTTEcc_t ucValue); extern cvd2_TypeExeResult DRV_CVD2_Get_WssData(CVD2_WSSDATA_t *Wssdata); extern cvd2_TypeExeResult DRV_CVD2_Get_LockStatus(UINT8 *ucValue); extern cvd2_TypeExeResult DRV_CVD2_Get_StandardFeature(UINT8 *ucValue); extern cvd2_TypeExeResult CVD2_GetNoiseStatus(UINT8 *ucValue); extern cvd2_TypeExeResult DRV_CVD2_Get_SyncHeight(UINT8 *ucValue); extern cvd2_TypeExeResult DRV_CVD2_CheckNonSTDStatus(cvd2_pTypeSigSTD sigSTD_status); extern cvd2_TypeExeResult DRV_CVD2_Enable_DC_Restore(BOOL ucValue); extern cvd2_TypeExeResult DRV_CVD2_Get_MemoryAddress(UINT32 *Address); extern cvd2_TypeExeResult DRV_CVD2_Enable_DumpMemoryData(BOOL Enable); extern cvd2_TypeExeResult DRV_CVD2_GetCgainStatus(UINT16 *ucValue); extern cvd2_TypeExeResult DRV_CVD2_GetVsyncEqualPulseStatus(UINT8 *ucValue); extern cvd2_TypeExeResult DRV_CVD2_GetSyncDelta(UINT8 *ucValue); extern cvd2_TypeExeResult DRV_CVD2_Enable_PAL_HighFrameDiff(BOOL Enable); extern cvd2_TypeExeResult DRV_CVD2_AV_PAL_FinetuneHFDiff(BOOL Enable); extern cvd2_TypeExeResult DRV_CVD2_Specific2D3D(BOOL Enable); extern UINT8 DRV_CVD2_GetColbarCnt(void); extern cvd2_TypeExeResult DRV_CVD2_GetLumaHist(UINT8 *luma); extern cvd2_TypeExeResult DRV_CVD2_GetCbHist(UINT8 *cb); extern cvd2_TypeExeResult DRV_CVD2_GetCrHist(UINT8 *cr); extern cvd2_TypeExeResult DRV_CVD2_GetSatHist(UINT8 *saturation); extern cvd2_TypeExeResult DRV_CVD2_Set_CVBSO_Mode(DRV_TvDecOutputSrcType_t outMode); extern cvd2_TypeExeResult DRV_CVD2_Get_CVBSO_Mode(DRV_TvDecOutputSrcType_t *outMode); extern DRV_Status_t DRV_CVD2_Atv_Set_AutoDetectFormat(cvd2_AutoDetect_t eFormat); extern DRV_Status_t DRV_CVD2_Detect_AudioM (cvd2_BurstType_t *peRetBurstType); extern DRV_Status_t DRV_CVD2_Detect_Signal_InScanning (cvd2_SignalStatus_t *peRetStatus); #ifdef CONFIG_SCART_SUPPORT extern void DRV_CVD2_Scart_Sorc_Setting(INT32 num, DRV_ScartSrcType_t ucInputSource); extern void DRV_CVD2_Scart_Enable(INT32 num); extern void DRV_CVD2_Set_Scart_InputType(UINT8 bDisable); extern void DRV_CVD2_Scart_Exit(void); #endif #endif