/******************************************************************************/
/**
*
* @file    drv_mir.h
*
* @brief    This file specifies the APIs provided to control MIR(TV Out)
*
* @note    Copyright (c) 2013 S2 Technology Co., Ltd. \n
*            All rights reserved.
*
* @author
*
******************************************************************************/
#ifndef __DRV_MIR_H__
#define __DRV_MIR_H__
/*******************************************************************************
* Header include
******************************************************************************/
#include "drv_types.h"
#ifdef CONFIG_ENABLE_MIR
typedef struct _MIR_OUTPUT_TIMING
{
	UINT32 	ulHTotal;
	UINT32 	ulVTotal;
	UINT32	ulHSyncStart;
	UINT32	ulHSyncEnd;
	UINT32	ulVSyncStart;
	UINT32	ulVSyncEnd;
	UINT32	ulHStart;
	UINT32	ulHEnd;
	UINT32	ulVStart;
	UINT32	ulVEnd;
	UINT32	ulVSyncStart_i;
	UINT32	ulVSyncEnd_i;
	UINT32	ulVStart_i;
	UINT32	ulVEnd_i;
}_MIR_OUTPUT_TIMING,*p_MIR_OUTPUT_TIMING;

void DRV_MIR_Reset(BOOL fEnable);
void DRV_MIR_DisplayEn(BOOL fEnable);
void DRV_MIR_MemoryRead_CbCr_YC_Swap(BOOL fCbCrEnable,BOOL fYCEnable);
void DRV_MIR_MemoryWrite_CbCr_YC_Swap(BOOL fCbCrEnable,BOOL fYCEnable);
void DRV_MIR_DPY_HSyncStartShift(UINT16 HSyncStartShift);
void DRV_MIR_SetDisplayWindow(_MIR_OUTPUT_TIMING *pWindow);
void DRV_MIR_Panel_Enable(BOOL fEnable);
void DRV_MIR_SetPanelWindow(_MIR_OUTPUT_TIMING *pWindow);
void DRV_MIR_SetDisplayWindow_Interlace(_MIR_OUTPUT_TIMING *pWindow);
void DRV_MIR_Panel_NO_HVSync(BOOL fHSyncEnable,BOOL fVSyncEnable);
void DRV_MIR_Clock(UINT8 *eMode);
void DRV_MIR_SingleToDual_Enable(BOOL fEnable);
void DRV_MIR_Function_Enable(BOOL fEnable);
void DRV_MIR_SetSlrHVFactor(UINT32 HFactor, UINT32 VFactor);
void DRV_MIR_SlrInHVSize(UINT32 HSize, UINT32 VSize);
void DRV_MIR_SlrOutHVSize(UINT32 HSize, UINT32 VSize);
void DRV_MIR_PostScalarInterlaceEn(BOOL fEnable);
void DRV_MIR_PreScalarInterlaceEn(BOOL fEnable);
void DRV_MIR_SetSlrConfig(UINT16 Config);
void DRV_MIR_SetMemoryWidth(UINT32 Width);
void DRV_MIR_Tearing_TH(UINT32 Value);
void DRV_MIR_LCK_Shift(UINT16 Value);
void DRV_MIR_Delay_Shift(BOOL fEnable);
UINT16 DRV_MIR_GetHFactor(void);
void DRV_MIR_SetMemoryReadWriteEn(BOOL fEnable);
UINT16 DRV_MIR_GetSlrConfig(void);
void DRV_MIR_SetMemoryPitch(UINT32 Value);
void DRV_MIR_SetMemoryBurst(UINT8 Value);
void DRV_MIR_SetMemoryAddrControlEn(BOOL fEnable, UINT32 RMemAddr, UINT32 WMemAddr);
void DRV_MIR_YCCToRGB_Enable(BOOL fEnable);
void DRV_MIR_444To422_Enable(BOOL fEnable);
void DRV_MIR_422To444_Enable(BOOL fEnable);
void DRV_MIR_422To444_INT(BOOL fEnable);
void DRV_MIR_444To422_INT(BOOL fEnable);
void DRV_MIR_SetMemoryBufferNumber(UINT8 Value);
void DRV_MIR_SetMemoryBufferTopAddress(UINT32 MemAddr0,UINT32 MemAddr1,UINT32 MemAddr2,UINT32 MemAddr3);
void DRV_MIR_SetMemoryBufferBottomAddress(UINT32 MemAddr0,UINT32 MemAddr1,UINT32 MemAddr2,UINT32 MemAddr3);
void DRV_MIR_RGBToYCC_Enable(BOOL fEnable);
void DRV_MIR_OSDOutput_Enable(BOOL fEnable);
#endif
#endif