#ifndef _ADC_HW_H_ #define _ADC_HW_H_ /** * @brief Clear ADC interrupt bits. * * This function clears specific interrupt vector bits (0xbe150026[15:0]) according to request. * * @param usValue Request bits for clear. * */ void ADC_Clear_Interrupt(UINT16 usValue); /** * @brief Setup interrupt mask bits. * * This function sets mask bits(0xbe150028[15:0]) for masking interrupt vector bits. * * @param bStatus Whether current status can be set request value or not. * @param usValue Mask value for setting. * */ void ADC_Interrupt(BOOL bStatus, UINT16 usValue); #ifdef CONFIG_DDC_CI_SUPPORT /** * @brief Get phase value for DCC/CI tool. * * This function reads user phase setting from previous OSD setup, and restore for DCC/CI usage. * * @param Phase Record OSD phase value. * */ void DRV_ADC_Get_DDCCI_OSDPhase(UINT8 *Phase); /** * @brief Get clock value for DCC/CI tool. * * This function reads user clock setting from previous OSD setup, and restore for DCC/CI usage. * * @param Clock Record OSD clock value. * */ void DRV_ADC_Get_DDCCI_OSDClock(UINT8 *Clock); #endif /** * @brief Set phase values directly. * * This function sets RGB PLL phase values directly. * */ void ADC_SetPhaseDirdect (UINT8 ucPhaseValue); /** * @brief Set phase value without interrupt interference. * * This function stops interrupt before setting phase value, and then recovers interrupt * after phase setting is finished. * * @param scPhaseValue Requested phase value. * */ void DRV_ADC_SetPhase(INT8 scPhaseValue); /** * @brief Get phase value. * * This function reads current phase setting value. * * @param bPhase Save current phase setting value. * */ void DRV_ADC_GetPhase(UINT8 *bPhase); /** * @brief Set gain setting into HW registers. * * This function writes referenced channel gain control registers according to requested color type. * For R channel gain control, [7:6] = 0x60[1:0] , [5:0] = 0x61[5:0]; * For G channel gain control, [7:6] = 0x63[1:0] , [5:0] = 0x64[5:0]; * For B channel gain control, [7:6] = 0x66[1:0] , [5:0] = 0x67[5:0]; * * @param ucColor Requested color type. * @param uwValue Channel gain control value for setting. * */ void ADC_SetGainDirdect(UINT8 ucColor, UINT32 uwValue); /** * @brief Set gain setting on referenced channel. * * This function sets referenced channel gain according to requested color type. * * @param ucColor Requested color type. * @param scColorGain Channel gain control value for setting. * */ void DRV_ADC_SetGain(UINT8 ucColor, UINT32 scColorGain); /** * @brief Get current gain setting on referenced channel. * * This function reads referenced channel gain control registers according to requested color type. * For R channel gain control, [7:6] = 0x60[1:0] , [5:0] = 0x61[5:0]; * For G channel gain control, [7:6] = 0x63[1:0] , [5:0] = 0x64[5:0]; * For B channel gain control, [7:6] = 0x66[1:0] , [5:0] = 0x67[5:0]; * * @param ucColor Requested color type. * @return Reference channel gain control value of R, G or B channel. * */ UINT16 ADC_GetGain(UINT8 ucColor); /** * @brief Set digital offset setting into HW registers. * * This function writes referenced channel digital offset registers according to requested color type. * * @param ucColor Requested color type. * @param uwValue Reference channel gain offset value of R, G or B channel. * */ void ADC_SetOffsetDirdect(UINT8 ucColor, UINT32 uwValue); /** * @brief Set digital offset on referenced channel. * * This function sets referenced channel digital offset according to requested color type. * * @param ucColor Requested color type. * @param scColorOffset Reference channel gain offset value of R, G or B channel. * */ void DRV_ADC_SetOffset(UINT8 ucColor, INT16 scColorOffset); /** * @brief Get current digital offset on referenced channel. * * This function reads referenced channel digital offset registers according to requested color type. * For R channel digital offset, [7:0] = 0x14b[1:0]; * For G channel digital offset, [7:6] = 0x14d[1:0] , [5:0] = 0x14c[7:2]; * For B channel digital offset, [7:4] = 0x14e[3:0] , [3:0] = 0x14d[5:2]; * * @param ucColor Requested color type. * @return Reference channel gain offset value of R, G or B channel. * */ UINT16 ADC_GetOffset(UINT8 ucColor); /** * @brief Set horizontal total. * * This function sets PLL clock divider for horizontal total calcultaion. * * @param usHTotal Requested horizontal total value. * */ void DRV_ADC_SetHTotal(UINT16 usHTotal); /** * @brief Set PLL related settings. * * This function sets PLL related registers using timing information after detection. * * @param ucPixelClock Input pixel clock value according to pixel_clk of timing table multiply smapling rate. * @param usHTotal Input Horizontal total value according to h_total of timing table multiply smapling rate. * */ void ADC_PllSetting(UINT8 ucPixelClock, UINT16 usHTotal); /** * @brief Reset PLL in specific sequence. * * This function resets PLL by setting block registers in specific sequence. * * @param ucPixelClock Input pixel clock value according to pixel_clk of timing table multiply smapling rate. * @param usHTotal Input Horizontal total value according to h_total of timing table multiply smapling rate. * */ void ADC_CheckPllResetSequence(UINT8 ucPixelClock, UINT16 usHTotal); /** * @brief Reset all digital blocks. * * This function toggles reset for reseting all digital blocks(0x00[0]). * */ void ADC_Coast_Gen_Backup(void); /** * @brief Software reset SOG. * * This function toggles software reset for SOG digital circuit (0x1a[2]). * */ void ADC_SOG_Slicer_Backup(void); /** * @brief Transform the option of input pin into its reference value of Y or G channel selection. * * This function transfers the Y option of input source into referenced channel value. * The channel value would be adopted to setup Y channel select(0x122[2:0]) or G channel select(0x51[2:0]). * * @param iPin Requested input pin option. * @return Reference value of Y or G channel selection. * */ UINT32 ADC_InputSrcPinYvalue(UINT32 iPin); /** * @brief Setup requested YC channel depending on the pin assignment of the board. * * This function sets input channel Y/C pins according to board. It also turns off * non-related power and function. * * @param iInputSource Requested input channel for YC initial setting. * */ void DRV_ADC_YCInitSetting(INT32 iInputSource); /** * @brief Provide 100MHz PLL clock to CVD2. * * This function divides its PLL clock to 100MHZ approximately according to setting * PLL clock divider. The output clock would be used by CVD2. * */ void DRV_ADC_PLL100MHzToCVD2(void); /** * @brief Provide PLL divider power control to CVD2. * * This function provides an interface to reset pll divider when there is abnormal clock * status found on CVD2. It turn on/off the pll divider for reseting this block, including * dual loop divider(0xbe150147[5]) and ADC_PLL reference divider reset(0xbe00012f[1]). * * @param Enable Whether to turn on PLL divider power or not. * */ void DRV_ADC_Pll_Divider_Power(BOOL Enable); /** * @brief Sets sharing video bandgap of Ypp. * * This function provides an interface for setting Ypp sharing bandgap(0xbe15003d[0]). This bandgap would * be adopted in YPP, PC, AV, and HDMI input sources, so the other modules could control this sharing bandgap * according to this interface. * * @param Enable Whether to turn on the Ypp sharing bandgap. * */ void DRV_ADC_YppShareBandGap_Power(BOOL Enable); #endif