#ifndef _EDID_H #define _EDID_H //#include #include #define ONE_BYTE_INTERRUPT 1 #define HANNSTART 0 /******************************************************************************* *******************************************************************************/ #ifndef INIT_BY_KMF #define DBG_MSG1(id, fmt,args...) printk(KERN_EMERG " " fmt, ## args) #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35) #include #else #include //Change the location of sisdev.h to sis516 #endif #define tv_SetEDIDstate(a) #define notice_EdidUpdateOk() #else #include #endif #if 0 #ifndef CONFIG_SUPPORT_DEBUG_MESSAGE #define DebugPrint(fmt,args...) //printk(KERN_NOTICE "[EDID]" fmt "\n",## args) #elif defined(INIT_BY_KMF) #define DebugPrint(fmt,args...) do{if(*pdbgconf1&DBGCFG_EDID) printk(KERN_DEBUG "[EDID]" fmt "\n",## args);}while(0) #else #define DebugPrint(fmt,args...) printk(KERN_NOTICE "[EDID]" fmt "\n",## args) #endif #endif #define MmioWriteFun(Address,Data) writel(Data,(void *)(Address)) #define MmioReadFun(Address) readl((void *)(Address)) #define MmioWriteWordFun(Address,Data) writew(Data,(void *)(Address)) #define MmioReadWordFun(Address) readw((void *)(Address)) #define MmioWriteByteFun(Address,Data) writeb(Data,(void *)(Address)) #define WB(Address,Data) writeb(Data,(void *)(Address)) #define MmioReadByteFun(Address) readb((void *)(Address)) #define RB(Address) readb((void *)(Address)) #define HDMIA_SHADOWADDR SPI_EDID_ShadowAddress//0xBF002000 #define HDMIB_SHADOWADDR (SPI_EDID_ShadowAddress+0x100)//0xBF002100 #define VGA_SHADOWADDR (SPI_EDID_ShadowAddress+0x200)//0xBF002200//0xB9002200//0x99002200 #define SLAVE_IRQ_FINAL 60 #define EDID_HostINTmask (1<<(SLAVE_IRQ_FINAL%32)) #define SLAVE0_SEGMENT_POINT_ID 0x60 #define SLAVE0_DEVICE_ID 0xA0 #define REG_BASE 0xbe060000 #define Slave0_CTRL (REG_BASE+0x24) #define r_i2c_wr_ena (1<<8) //use only in 338 A1 #define Slave_ModeSel (REG_BASE+0x28) #define SlaveW_Protect (1<<1) #define Slave_MMIO_Push (REG_BASE+0x2c) #define Slave1_CTRL (REG_BASE+0x30) #define Slave_MMIO_Waddr (REG_BASE+0x34) #define Slave_MMIO_Wdata (REG_BASE+0x38) #define Slave2_CTRL (REG_BASE+0x3c) #define Slave_MMIO_Raddr (REG_BASE+0x40) #define Slave_MMIO_Rdata (REG_BASE+0x44) #define IntClearReg (REG_BASE+0x60) #define Slave_IntStatus (REG_BASE+0x78) #if 0 #define SX_CONTROL_SLAVE_EN 0x00000080 // Slave Enable #define SX_CONTROL_INT_EN 0x00000100 // Interrup enable #define SX_CONTROL_BYTE_INT 0x00000200 #define SX_CONTROL_RESET 0x00000400 // Asynchronous reset #define SX_CONTROL_INT 0x00000800 // Interrup bit #define SLAVE_CONTROL_S0_READY 0x00000001 #define SLAVE_CONTROL_S0_READ 0x00000004 #define SLAVE_CONTROL_S1_READY 0x00000100 #define SLAVE_CONTROL_S1_READ 0x00000400 #define SLAVE_CONTROL_S2_READY 0x00010000 #define SLAVE_CONTROL_S2_READ 0x00040000 #define INT_CLEAR_REG_SLAVE0 0x00000001 #define INT_CLEAR_REG_SLAVE1 0x00000100 #define INT_CLEAR_REG_SLAVE2 0x00010000 #define MODIFY_CHECKED 0x01 #define MODIFY_HDMI1 0x02 #define MODIFY_HDMI2 0x04 #define MODIFY_VGA 0x08 #endif #define SIS_IOC_MAGIC 0x95 #define TIMEOUT (jiffies+HZ/2) // 500 ms typedef struct _EDID_DEV_ { struct cdev cdev; struct delayed_work EdidWork; }EDID_DEV,*PEDID_DEV; #endif // end of #ifndef _EDID_H