adc_333.c 147 KB

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  1. //=================================================================================================
  2. // Header files area.
  3. //=================================================================================================
  4. #include "adc_global.h"
  5. #include "adc_inittbl.h"
  6. #include "adc_333.h"
  7. //=================================================================================================
  8. // Internal variables area.
  9. //=================================================================================================
  10. #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,8)
  11. struct semaphore adc_ioctl_semaphore;
  12. #endif
  13. struct cdev *cdev_adc;
  14. struct timer_list ADCtimer;
  15. ADC_CONTEXT ADCContext;
  16. AdcInfo sAdcInfo;
  17. VIP_InterfaceKIC sSendInfo,*psSendInfo;
  18. VesaTiming ADC_InputVesaTiming, ADC_DetectTiming;
  19. ADCCalibrate_OSDGainOffset_t ADCCalibrate_OSDGainOffset;
  20. #ifdef DRV_ENABLE_CVD2
  21. UINT8 ucCVD2PowerEnable=FALSE;
  22. #endif
  23. adc_ap_data gAdcAp;
  24. BOOL bDisablePCAutoAdjust = FALSE;
  25. UINT8 uc_reset_ADI_Lock[1] = {0};
  26. wait_queue_head_t reset_ADI_wait[1];
  27. INT32 iEnlargeWidthRate=1;
  28. UINT8 ucBestLocation=0, ucCompareTimes, ucComparethd;
  29. LONG lPhase2[32];
  30. UINT8 static ucBestPhase[32];
  31. UINT8 static ucBestPhaseIndex=0;
  32. BOOL bAutoAdjust = FALSE, bCheckVIPHttl = FALSE, bAutoColorCalibrationDone =FALSE;
  33. UINT8 ucLastInputMode=0xf;
  34. static stADCTimingTable g_stADCTimingTbl;
  35. InputVideoConf_st adc_InputSrcPin;
  36. UINT16 usVIPHttlMax = 0, usVIPHttlMin = 0;
  37. FirstTimeSearchGain Source[5];
  38. BOOL bAutoWB = FALSE;
  39. BOOL FactoryModeAWB = FALSE;
  40. UINT8 SMT_mergin = 0;
  41. //workqueue
  42. static void ADC_SyncDetection(void *);
  43. static struct workqueue_struct *pADC_WQSyncDetection;
  44. static DECLARE_DELAYED_WORK(ADCSyncDetectionThread, (void*)&ADC_SyncDetection);
  45. static void ADC_InterruptProcess(void *);
  46. static struct workqueue_struct *pADC_WQInterruptProcess;
  47. static DECLARE_DELAYED_WORK(ADCInterruptProcessThread, (void*)&ADC_InterruptProcess);
  48. static void ADC_TunerStrength(void *);
  49. static struct workqueue_struct *pADC_WQTunerStrength;
  50. static DECLARE_DELAYED_WORK(ADCTunerStrengthThread, (void*)&ADC_TunerStrength);
  51. extern void VIP_ADIReset(void);
  52. extern void VIP_ResetADIEnable(void);
  53. extern INT32 GetCustomerData(INT8 *pcTableName, INT8 **tablestart, UINT32 *tablesize);
  54. #ifndef INIT_BY_KMF
  55. INT32 __init DRV_ADC_Linuxinit(void);
  56. void __exit DRV_ADC_Linuxexit(void);
  57. #endif
  58. UINT32 ADCTimerInfo[][2]=
  59. {
  60. {TimerVsyncloss, 0},
  61. {TimerSignaloff, 0},
  62. {TimerModeChange, 0},
  63. {TimerTunerStrength, 0},
  64. };
  65. //=================================================================================================
  66. // Internal function definition area
  67. //=================================================================================================
  68. static inline void ADC_StartTimerFun(PADC_CONTEXT pADCContext, void *func)
  69. {
  70. init_timer(&ADCtimer);
  71. ADCtimer.expires = jiffies + HZ/512;
  72. ADCtimer.data = (ULONG)pADCContext;
  73. ADCtimer.function = (void (*)(ULONG))func;
  74. add_timer(&ADCtimer);
  75. sAdcInfo.bTimerHandlerBusy = FALSE;
  76. }
  77. static inline void ADC_RestartTimerFun(PADC_CONTEXT pADCContext)
  78. {
  79. mod_timer(&ADCtimer, jiffies + HZ/512);
  80. }
  81. static __inline__ void ADC_StopTimerFun(PADC_CONTEXT pADCContext)
  82. {
  83. del_timer_sync(&ADCtimer);
  84. }
  85. void ADC_DelayMS(UINT32 ulDelayMS )
  86. {
  87. if( in_interrupt() || in_irq() )
  88. mdelay(ulDelayMS);
  89. else
  90. msleep(ulDelayMS);
  91. }
  92. static void ADC_TunerStrength(void *unuse)
  93. {
  94. #ifdef DRV_ENABLE_TUNER
  95. UINT8 ucStrength = 0;
  96. ADC_DelayMS(1000);
  97. DRV_FrontendCtrl(FRONTEND_CMD_GET_SIGNAL_STRENGTH,&ucStrength);
  98. if( ucStrength == 0)
  99. {
  100. DRV_CVD2_Enable_CVBSO_Gain( FALSE );
  101. }
  102. else
  103. {
  104. DRV_CVD2_Enable_CVBSO_Gain( TRUE );
  105. }
  106. #endif
  107. }
  108. static void ADC_TimerFun(PADC_CONTEXT pADCContext)
  109. {
  110. static UINT8 ucPollingHcntVcnt = 0;
  111. static BOOL bScreenMode = FALSE;
  112. volatile UINT16 usVIPHttl=0, usVIPVcnt=0;
  113. if( ADC_Read(ADC_REG_dbg_temp)& BIT0 )
  114. {
  115. // ADC_DebugMsg("Skip TimerFun\n");
  116. ADC_RestartTimerFun(pADCContext);
  117. return;
  118. }
  119. if(ADCTimerInfo[TimerVsyncloss][1] == 1)
  120. {
  121. if(ADC_Read(ADC_STA_vs_active) == 0)
  122. {
  123. if( !(sAdcInfo.bInterruptHappen || sAdcInfo.bInterruptHappenAgain || sAdcInfo.bModeDetection || sAdcInfo.bModeChange ))
  124. {
  125. ADC_SyncDetectCreate();
  126. ADCTimerInfo[TimerVsyncloss][1] = 0;
  127. }
  128. }
  129. }
  130. if(ADCTimerInfo[TimerSignaloff][1] == 1)
  131. {
  132. ADC_Write(ADC_REG_cs2_sog_rst, 0x3);
  133. ADC_Write(ADC_REG_cs2_sog_rst, 0x0);
  134. ADCTimerInfo[TimerSignaloff][1] = 0;
  135. }
  136. if( sAdcInfo.bAutoGain &&
  137. ( (abs(sAdcInfo.ucRegLowWidth - ADC_Read(ADC_STA_low_wdth) ) < 10) &&
  138. (abs(sAdcInfo.ucRegLineWidth - ADC_Read(ADC_STA_line_wdth) ) < 20) ) )
  139. {
  140. // ADC_DebugMsg("[pass] Mode change <low/line width OK>\n");
  141. // ADC_DebugMsg(" Low = 0x%x, mLow = 0x%x, Line = 0x%x, mLine = 0x%x \n\n",
  142. // ADC_Read(ADC_STA_low_wdth), ADC_Read(ADC_STA_mlow_wdth),
  143. // ADC_Read(ADC_STA_line_wdth), ADC_Read(ADC_STA_mline_wdth) );
  144. }
  145. else if(ADCTimerInfo[TimerModeChange][1] == 1)
  146. {
  147. usVIPHttl = *((volatile UINT16*)(0xbe1cf010));
  148. usVIPVcnt = *((volatile UINT16*)(0xbe1cf014));
  149. if( sAdcInfo.ucSource != Adc_kSourceVGA )
  150. {
  151. if(abs(sAdcInfo.usHcount - usVIPHttl) > (sAdcInfo.usHcountModeChange+10)||
  152. abs(sAdcInfo.usVcount - usVIPVcnt) > sAdcInfo.usVcountModeChange)
  153. {
  154. if( (SMT_mergin == 0) &&
  155. ( (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_480I60)||(sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_576I50) ||
  156. (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_480P60)||(sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_576P50) ) )
  157. {
  158. sAdcInfo.ucInputMode = UNSTABLE_MODE;
  159. sAdcInfo.bModeChange = TRUE;
  160. ADC_SyncDetectCreate();
  161. ADCTimerInfo[TimerModeChange][1] = 0;
  162. ucPollingHcntVcnt = 0;
  163. bScreenMode = FALSE;
  164. SMT_mergin = sAdcInfo.ucTimingModeIndex & 0xff;
  165. printk(KERN_EMERG " #### <0x%x> Ignore [0] Mode change <H_count> & Set SMT = 0x%x\n", SMT_mergin, ADC_Read(ADC_REG_sog_smthr12v));
  166. }
  167. else
  168. {
  169. if(abs(sAdcInfo.usHcount - usVIPHttl) > (sAdcInfo.usHcountModeChange+20))
  170. {
  171. printk(KERN_EMERG "[0] Mode change <H_count>\n");
  172. printk(KERN_EMERG "AdcInfo: Hcount=%d, Vcount=%d\n", sAdcInfo.usHcount, sAdcInfo.usVcount);
  173. printk(KERN_EMERG "VIPHttl=%d, VIPVcnt=%d\n", usVIPHttl, usVIPVcnt);
  174. sAdcInfo.ucInputMode = UNSTABLE_MODE;
  175. sAdcInfo.bModeChange = TRUE;
  176. ADC_SyncDetectCreate();
  177. ADCTimerInfo[TimerModeChange][1] = 0;
  178. ucPollingHcntVcnt = 0;
  179. bScreenMode = FALSE;
  180. }
  181. else if((sAdcInfo.ucScreenMode == NormalScreen) && (bScreenMode == FALSE))
  182. {
  183. printk(KERN_EMERG "AdcInfo: Hcount=%d, Vcount=%d\n", sAdcInfo.usHcount, sAdcInfo.usVcount);
  184. printk(KERN_EMERG "VIPHttl=%d, VIPVcnt=%d\n", usVIPHttl, usVIPVcnt);
  185. ADC_ScreenMode(BlackScreen);
  186. bScreenMode = TRUE;
  187. }
  188. SMT_mergin = 0;
  189. }
  190. ucPollingHcntVcnt++;
  191. if(ucPollingHcntVcnt == 3)
  192. {
  193. printk(KERN_EMERG "[1] Mode change <Polling_count>\n");
  194. printk(KERN_EMERG "AdcInfo: Hcount=%d, Vcount=%d\n", sAdcInfo.usHcount, sAdcInfo.usVcount);
  195. printk(KERN_EMERG "VIPHttl=%d, VIPVcnt=%d\n", usVIPHttl, usVIPVcnt);
  196. sAdcInfo.ucInputMode = UNSTABLE_MODE;
  197. sAdcInfo.bModeChange = TRUE;
  198. ADC_SyncDetectCreate();
  199. ADCTimerInfo[TimerModeChange][1] = 0;
  200. ucPollingHcntVcnt = 0;
  201. bScreenMode = FALSE;
  202. }
  203. }
  204. else
  205. {
  206. if(ucPollingHcntVcnt > 0)
  207. {
  208. if((sAdcInfo.ucScreenMode == BlackScreen) && (bScreenMode == TRUE)&&(bAutoColorCalibrationDone== TRUE))
  209. {
  210. ADC_ScreenMode(NormalScreen);
  211. bScreenMode = FALSE;
  212. }
  213. ucPollingHcntVcnt--;
  214. }
  215. }
  216. }
  217. }
  218. if(ADCTimerInfo[TimerTunerStrength][1] == 1)
  219. queue_delayed_work(pADC_WQTunerStrength, &ADCTunerStrengthThread, 0);
  220. if (bCheckVIPHttl == TRUE)
  221. {
  222. usVIPHttl = *((volatile UINT16*)(0xbe1cf008));
  223. if (usVIPHttl > usVIPHttlMax)
  224. usVIPHttlMax = usVIPHttl;
  225. else if (usVIPHttl < usVIPHttlMin)
  226. usVIPHttlMin = usVIPHttl;
  227. if ((usVIPHttlMax - usVIPHttlMin) > 0)
  228. {
  229. if(ucBestPhaseIndex<5)
  230. { // Find the phase with high ranking from the list, and the neighboring of current phase would be excluded.
  231. for(ucBestPhaseIndex = 0; ucBestPhaseIndex < 5; ucBestPhaseIndex++)
  232. {
  233. if( abs(sAdcInfo.ucUserPhase - ucBestPhase[ucBestPhaseIndex]) > 1 &&
  234. abs(sAdcInfo.ucUserPhase - ucBestPhase[ucBestPhaseIndex]) < 31 )
  235. {
  236. sAdcInfo.ucUserPhase = ucBestPhase[ucBestPhaseIndex];
  237. break;
  238. }
  239. }
  240. }
  241. else
  242. {
  243. sAdcInfo.ucUserPhase = ucBestPhase[0];
  244. }
  245. ADC_SetPhaseDirdect(sAdcInfo.ucUserPhase);
  246. ADC_ResetADI_Unlock();
  247. printk(KERN_EMERG" ===== VIPHttl issue, No. %d phase value would be adopted ===== \n", ucBestPhaseIndex + 1 );
  248. printk(KERN_EMERG" ===== VIPHttlMin = %d, VIPHttlMax = %d, Best phase = %d ===== \n", usVIPHttlMin, usVIPHttlMax, sAdcInfo.ucUserPhase);
  249. bCheckVIPHttl = FALSE;
  250. }
  251. }
  252. ADC_RestartTimerFun(pADCContext);
  253. }
  254. UINT32 ADC_Read(UINT32 uiAdr)
  255. {
  256. UINT32 uiStartBit=31,uiEndBit=0,uiLeftSpaceBits,uiMask=0xffffffff;
  257. UINT32 uiADCAdr, uiADCDat=0;
  258. UINT8 ucByteMask=0xff;
  259. if( (*(UINT8*)(0xbe000180)&BIT2) )
  260. {
  261. printk(KERN_EMERG "MMIO_R_Err\n");
  262. return 0;
  263. }
  264. uiADCAdr = uiAdr & 0xffff;
  265. switch( uiAdr >> 28 )
  266. {
  267. case 0:
  268. uiADCAdr |= MMIOAddrADC;
  269. break;
  270. case 1:
  271. uiADCAdr |= 0xbe000000;
  272. break;
  273. default:
  274. printk(KERN_EMERG "MMIO_W_Err\n");
  275. return 0;
  276. }
  277. if( (uiAdr&0x03ff0000)==0x03e00000 ) // one dword write
  278. {
  279. uiADCDat=readl((UINT32*)uiADCAdr);
  280. }
  281. else // bits write
  282. {
  283. uiStartBit = (uiAdr&0x001f0000)>>16;
  284. uiEndBit = (uiAdr&0x03e00000)>>21;
  285. if( (uiEndBit-uiStartBit)<8 )
  286. {
  287. uiLeftSpaceBits = 7-uiEndBit;
  288. ucByteMask <<= uiLeftSpaceBits;
  289. ucByteMask >>= (uiLeftSpaceBits+uiStartBit);
  290. ucByteMask <<= uiStartBit;
  291. uiADCDat=readb((UINT8*)uiADCAdr) & ucByteMask;
  292. uiADCDat >>= uiStartBit;
  293. }
  294. else
  295. {
  296. uiADCAdr &= 0xfffffffc;
  297. uiStartBit += 8*(uiAdr&0x3);
  298. uiEndBit += 8*(uiAdr&0x3);
  299. uiLeftSpaceBits = 31-uiEndBit;
  300. uiMask <<= uiLeftSpaceBits;
  301. uiMask >>= (uiLeftSpaceBits+uiStartBit);
  302. uiMask <<= uiStartBit;
  303. uiADCDat=readl((UINT32*)uiADCAdr) & uiMask;
  304. uiADCDat >>= uiStartBit;
  305. }
  306. }
  307. return uiADCDat;
  308. }
  309. void ADC_Write(UINT32 uiAdr, UINT32 uiDat)
  310. {
  311. UINT32 uiStartBit=31,uiEndBit=0,uiLeftSpaceBits,uiMask=0xffffffff;
  312. UINT32 uiADCAdr, uiADCDat=0;
  313. UINT8 ucByteMask=0xff;
  314. if( (*(UINT8*)(0xbe000180)&BIT2) )
  315. {
  316. printk(KERN_EMERG "MMIO_W_Err\n");
  317. return;
  318. }
  319. uiADCAdr = uiAdr & 0xffff;
  320. switch( uiAdr >> 28 )
  321. {
  322. case 0:
  323. uiADCAdr |= MMIOAddrADC;
  324. break;
  325. case 1:
  326. uiADCAdr |= 0xbe000000;
  327. break;
  328. default:
  329. printk(KERN_EMERG "MMIO_W_Err\n");
  330. return;
  331. }
  332. if( (uiAdr&0x03ff0000)==0x03e00000 ) // one dword write
  333. {
  334. uiADCDat=uiDat;
  335. writel(uiADCDat, (UINT32*)uiADCAdr);
  336. }
  337. else // bits write
  338. {
  339. uiStartBit = (uiAdr & 0x001f0000)>>16;
  340. uiEndBit = (uiAdr & 0x03e00000)>>21;
  341. if( (uiEndBit-uiStartBit)<8 )
  342. {
  343. uiLeftSpaceBits = 7-uiEndBit;
  344. ucByteMask <<= uiLeftSpaceBits;
  345. ucByteMask >>= (uiLeftSpaceBits+uiStartBit);
  346. ucByteMask <<= uiStartBit;
  347. uiDat <<= uiStartBit;
  348. uiADCDat=readb((UINT8*)uiADCAdr);
  349. uiADCDat &= (~ucByteMask);
  350. uiADCDat |= (uiDat&ucByteMask);
  351. writeb((uiADCDat&0xff), (UINT8*)uiADCAdr);
  352. }
  353. else
  354. {
  355. uiADCAdr &= 0xfffffffc;
  356. uiStartBit += 8*(uiAdr&0x3);
  357. uiEndBit += 8*(uiAdr&0x3);
  358. uiLeftSpaceBits = 31-uiEndBit;
  359. uiMask <<= uiLeftSpaceBits;
  360. uiMask >>= (uiLeftSpaceBits+uiStartBit);
  361. uiMask <<= uiStartBit;
  362. uiDat <<= uiStartBit;
  363. uiADCDat=readl((UINT32*)uiADCAdr);
  364. uiADCDat &= (~uiMask);
  365. uiADCDat |= (uiDat&uiMask);
  366. writel(uiADCDat, (UINT32*)uiADCAdr);
  367. }
  368. }
  369. }
  370. void print_meminfo(INT8 *msg)
  371. {
  372. #ifdef MemTest
  373. struct sysinfo i;
  374. #define K(x) ((x) << (PAGE_SHIFT - 10))
  375. si_meminfo(&i);
  376. printk( KERN_INFO
  377. "MemTotal: %8lu kB\n"
  378. "MemFree: %8lu kB at point %s\n\n",
  379. K(i.totalram),
  380. K(i.freeram),msg
  381. );
  382. #endif
  383. }
  384. UINT32 ADC_MClk(void)
  385. {
  386. UINT32 ulADC_MClk = 0; // ADC device clock
  387. ulADC_MClk= drv_get_device_clock(YPP200MCLK);
  388. ulADC_MClk = ulADC_MClk/1000 ;
  389. printk(KERN_EMERG" Clock YPP200M(%d) \n ", ulADC_MClk);
  390. return ulADC_MClk;
  391. }
  392. void ADC_NoticeKmf(INT32 msgType, BOOL bActive, BOOL bNotSupport)
  393. {
  394. InputPathStatus_t sInputPathStatus_t1={0};
  395. switch(msgType)
  396. {
  397. case ADCMSG_INPUTPATHSTATUS:
  398. sInputPathStatus_t1.bActive=bActive;
  399. sInputPathStatus_t1.bNotSupport=bNotSupport;
  400. sInputPathStatus_t1.bSub=NULLOP;
  401. sInputPathStatus_t1.msgfromVIP = FALSE;
  402. sInputPathStatus_t1.path = (sAdcInfo.ucSource == Adc_kSourceVGA) ? INPUTPATH_PC : INPUTPATH_COMPONENT;
  403. noticekmf(KMF2UMF_EVID_DRV, KMF2UMF_EVTYPE_DRV_INFORM_SIGNALSTATUS, (UINT8*)&sInputPathStatus_t1, sizeof(InputPathStatus_t));
  404. break;
  405. case NOTICEMSG_ADC_TURNOFFSOUND:
  406. noticekmf(KMF2UMF_EVID_ADC, KMF2UMF_EVTYPE_ADC_TURNOFFSOUND, &bActive, sizeof(BOOL));
  407. break;
  408. }
  409. }
  410. void ADC_ResetAdcInfoSetting(void)
  411. {
  412. ADCTimerInfo[TimerVsyncloss][1] = 0;
  413. ADCTimerInfo[TimerSignaloff][1] = 0;
  414. ADCTimerInfo[TimerModeChange][1] = 0;
  415. ADCTimerInfo[TimerTunerStrength][1] = 0;
  416. sAdcInfo.bAutoGain = FALSE;
  417. sAdcInfo.bAutoOffset= FALSE;
  418. sAdcInfo.bReSearchGain= FALSE;
  419. sAdcInfo.bReSearchOffset= FALSE;
  420. sAdcInfo.usHcount = 0;
  421. sAdcInfo.usVcount = 0;
  422. sAdcInfo.ucSogThdHigh = 60;
  423. sAdcInfo.ucSogThdLow = 40;
  424. }
  425. void ADC_ResetApSetting(void)
  426. {
  427. gAdcAp.bAutoFlow = TRUE;
  428. gAdcAp.bApUse = FALSE;
  429. gAdcAp.bDisableInterrupt = FALSE;
  430. gAdcAp.ucMatchTable = 0;
  431. gAdcAp.ucColor = 0;
  432. gAdcAp.ulApPosition = 0;
  433. }
  434. void ADC_ScreenMode(UINT8 ucScreenMode)
  435. {
  436. if ( (ucLastInputMode == sAdcInfo.ucInputMode) && (ucScreenMode == sAdcInfo.ucScreenMode) )
  437. return;
  438. switch(ucScreenMode)
  439. {
  440. case NormalScreen:
  441. if (sAdcInfo.ucInputMode == NOSIGNAL_MODE || sAdcInfo.ucInputMode == UNSUPPORT_MODE)
  442. return;
  443. ADC_DebugMsg("N_Screen\n");
  444. VIP_UnmuteScreen();
  445. break;
  446. case BlackScreen:
  447. ADC_DebugMsg("B_Screen\n");
  448. VIP_MuteScreenDirectly(); //VIP_MuteScreen_ISR();
  449. ADC_NoticeKmf(NOTICEMSG_ADC_TURNOFFSOUND, FALSE, FALSE);
  450. ADC_DebugMsg("TURN OFF SOUND...\n");
  451. break;
  452. default:
  453. ucScreenMode = BlueScreen;
  454. ADC_NoticeKmf(ADCMSG_INPUTPATHSTATUS, FALSE, TRUE);
  455. ADC_DebugMsg("U_Screen\n");
  456. break;
  457. }
  458. ucLastInputMode = sAdcInfo.ucInputMode;
  459. sAdcInfo.ucScreenMode = ucScreenMode;
  460. }
  461. INT32 DRV_ADC_power(INT32 bPowerOn)
  462. {
  463. static BOOL bADCPowerEnable = FALSE;
  464. if (bPowerOn == TRUE && bADCPowerEnable == FALSE)
  465. {
  466. drv_gated_clk_ctrl(GATED_F24MCLK_YPPADC, GATED_PASS_CLK);
  467. drv_gated_clk_ctrl(GATED_MMIOCLK_YPP, GATED_PASS_CLK);
  468. drv_gated_clk_ctrl(GATED_DVCLK_YPPADC, GATED_PASS_CLK);
  469. drv_gated_clk_ctrl(GATED_F24MCLK_ATV, GATED_PASS_CLK);
  470. DRV_ADC_YppShareBandGap_Power(TRUE); // 3d[0]=0
  471. ADC_Write(ADC_REG_sch_pwdn_r,0); //59[2:0]=0x0
  472. ADC_Write(ADC_REG_sch_pwdn_g,0); //
  473. ADC_Write(ADC_REG_sch_pwdn_b,0); //
  474. ADC_Write(ADC_REG_pll_rstn,1); //32[0]=1
  475. ADC_Write(ADC_REG_pll_pwdn,1); //32[1]=1
  476. ADC_Write(ADC_REG_lcg_pwdn,0); //50[0]=0
  477. ADC_Write(ADC_REG_sog_pwdn,0); //6e[4]=0
  478. //-----------------------------------------
  479. bADCPowerEnable = TRUE;
  480. }
  481. else if (bPowerOn == FALSE && bADCPowerEnable == TRUE)
  482. {
  483. //bandgap powerdown can't generate for LVDS&PLL current
  484. DRV_ADC_YppShareBandGap_Power(FALSE); // 3d[0]=1
  485. ADC_Write(ADC_REG_sch_pwdn_r,1); //59[2:0]=0x7
  486. ADC_Write(ADC_REG_sch_pwdn_g,1); //
  487. ADC_Write(ADC_REG_sch_pwdn_b,1); //
  488. ADC_Write(ADC_REG_pll_rstn,0); //32[0]=0
  489. ADC_Write(ADC_REG_pll_pwdn,0); //32[1]=0
  490. ADC_Write(ADC_REG_lcg_pwdn,1); //50[0]=1
  491. ADC_Write(ADC_REG_sog_pwdn,1); //6e[4]=1
  492. //-----------------------------------------
  493. //2011-04-19 add when CVD2 power off.
  494. ADC_Write(ADC_REG_CVBSO_PWD12 , 1);
  495. ADC_Write(ADC_REG_pwdny, 1);
  496. DRV_ADC_Pll_Divider_Power(FALSE); // 147[5] = 0 Power down dual loop divider
  497. drv_gated_clk_ctrl(GATED_F24MCLK_ATV, GATED_STOP_CLK);
  498. drv_gated_clk_ctrl(GATED_DVCLK_YPPADC, GATED_STOP_CLK);
  499. drv_gated_clk_ctrl(GATED_MMIOCLK_YPP, GATED_STOP_CLK);
  500. drv_gated_clk_ctrl(GATED_F24MCLK_YPPADC, GATED_STOP_CLK);
  501. bADCPowerEnable = FALSE;
  502. }
  503. else
  504. {
  505. ADC_DebugMsg("Recall ADC_Pwr\n");
  506. }
  507. return TRUE;
  508. }
  509. EXPORT_SYMBOL(DRV_ADC_power);
  510. void ADC_SyncDetectCreate(void)
  511. {
  512. if(sAdcInfo.ucScreenMode == NormalScreen)
  513. ADC_ScreenMode(BlackScreen);
  514. if( sAdcInfo.bSyncDetection == FALSE)
  515. {
  516. sAdcInfo.bSyncDetection=TRUE;
  517. sAdcInfo.bModeDetection=TRUE;
  518. queue_delayed_work(pADC_WQSyncDetection, &ADCSyncDetectionThread, 0);
  519. }
  520. else if( sAdcInfo.bModeDetection==FALSE )
  521. sAdcInfo.bModeChange = TRUE;
  522. }
  523. void ADC_StatusUpdate(void)
  524. {
  525. if(ADC_DetectTiming.usHFrequency != 0)
  526. sAdcInfo.usHcount= ( (CRYSTAL_CLK*1000/10)/ADC_DetectTiming.usHFrequency ) * SYS_CRYS_CLK_RATIO_PRECISE_3 /1000;
  527. else
  528. sAdcInfo.usHcount=0;
  529. sAdcInfo.usVcount=ADC_DetectTiming.usVcount;
  530. ADC_DebugMsg("AdcInfo: Hcount = %d, Vcount = %d\n",sAdcInfo.usHcount, sAdcInfo.usVcount);
  531. }
  532. void ADC_UpdateFlag(UINT8 ucFlag)
  533. {
  534. sAdcInfo.bVpol = (ucFlag & BIT1)? 1:0;
  535. sAdcInfo.bHpol = (ucFlag & BIT2)? 1:0;
  536. sAdcInfo.bInterlace = (ucFlag & BIT0)? 1:0;
  537. if( sAdcInfo.ucSource==Adc_kSourceVGA )
  538. ADC_DetectTiming.ucFlag |= (0x10 << (ucFlag >> 1));
  539. ADC_DebugMsg("AdcInfo: Hpol=%d Vpol=%d Interlace=%d\n",sAdcInfo.bHpol, sAdcInfo.bVpol, sAdcInfo.bInterlace);
  540. ADC_DebugMsg("DetTiming_Flag=0x%x\n", ADC_DetectTiming.ucFlag);
  541. }
  542. BOOL ADC_Frequency_Filter(void)
  543. {
  544. BOOL fRetValue = TRUE;
  545. if (sAdcInfo.ucSource == Adc_kSourceVGA)
  546. {
  547. if ((ADC_DetectTiming.ucVFrequency < 45) || (ADC_DetectTiming.ucVFrequency > 88))
  548. {
  549. sAdcInfo.ucInputMode = UNSUPPORT_MODE;
  550. fRetValue = FALSE;
  551. }
  552. }
  553. else
  554. {
  555. if ((ADC_DetectTiming.ucVFrequency < 20) || (ADC_DetectTiming.ucVFrequency > 88))
  556. {
  557. sAdcInfo.ucInputMode = UNSUPPORT_MODE;
  558. fRetValue = FALSE;
  559. }
  560. }
  561. if (fRetValue == FALSE)
  562. {
  563. ADC_DebugMsg("VsFreq unsupport\n"); // torlance 3
  564. }
  565. return fRetValue;
  566. }
  567. BOOL ADC_NeedToCheckPolarity(void)
  568. {
  569. BOOL bMustCheckPolarity=FALSE;
  570. VesaTiming* VgaModeTable = g_stADCTimingTbl.pVgaVideoTimingTable;
  571. //640x350@70 conflict with 720x400@70
  572. if ((VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVcount == 449) &&
  573. ((VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency+5)/10 == 315 ) &&
  574. (VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency == 70))
  575. bMustCheckPolarity=TRUE;
  576. //640x350@85 conflict with 720x400@85 or 640x400@85
  577. if ((abs(VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVcount-445)<2) &&
  578. ((VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency+5)/10 == 379 ) &&
  579. (VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency == 85))
  580. bMustCheckPolarity=TRUE;
  581. //1024x768_80M conflict with 1280x768_102M or 1360x768_109M
  582. if ((abs(VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVcount-805) < 2) &&
  583. (abs((VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency+5)/10-603) < 2) &&
  584. (VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency == 75))
  585. bMustCheckPolarity=TRUE;
  586. //1920X1080@60 in chroma 22293 timing 261 conflict with timing 2001
  587. if ( ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVcount == 1125 ) &&
  588. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1920 ) &&
  589. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive==1080 ))
  590. bMustCheckPolarity=TRUE;
  591. //640x480@75 conflict
  592. if ( ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==640 ) &&
  593. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive==480 ) &&
  594. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency==75) )
  595. bMustCheckPolarity=TRUE;
  596. return bMustCheckPolarity;
  597. }
  598. BOOL ADC_NeedCheckVsyncWidth(void)
  599. {
  600. BOOL bMustCheckVsyncWidth=FALSE;
  601. VesaTiming* VgaModeTable = g_stADCTimingTbl.pVgaVideoTimingTable;
  602. //720x400@85 conflict with 640x400@85
  603. if (( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive==400 ) &&
  604. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency==85 ))
  605. bMustCheckVsyncWidth=TRUE;
  606. //1280x768 conflict with 1360x768 or 1366x768
  607. if (( ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1280 ) ||
  608. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1360 ) ||
  609. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1366 ) ) &&
  610. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive==768 ))
  611. bMustCheckVsyncWidth=TRUE;
  612. //1400X1050 conflict with 1680X1050
  613. if (( ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1400 ) ||
  614. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1680 ) ) &&
  615. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive==1050 ))
  616. bMustCheckVsyncWidth=TRUE;
  617. //1024x768@60 conflict with 1280x768@60 or 1360x768@60
  618. if ((abs(VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVcount-790) < 2) &&
  619. (abs((VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency+5)/10-473) < 2) &&
  620. (VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency == 60))
  621. bMustCheckVsyncWidth=TRUE;
  622. //1024x768@85 conflict with 1280x768@85 or 1360x768@85
  623. if ((abs(VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVcount-808) < 2) &&
  624. (abs((VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency+5)/10-686) < 2) &&
  625. (VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency == 85))
  626. bMustCheckVsyncWidth=TRUE;
  627. //1440X900@60 conflict with 1600X900@60
  628. if (( ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1600 ) &&
  629. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive==900 ) &&
  630. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency==60) )||
  631. ( ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1440 ) &&
  632. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive==900 ) &&
  633. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency==60) ))
  634. bMustCheckVsyncWidth=TRUE;
  635. //1280x768@75 conflict with 1024X768@75
  636. if (( ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1024 ) &&
  637. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive==768 ) &&
  638. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency==75) )||
  639. ( ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive==1280 ) &&
  640. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive==768 ) &&
  641. ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency==75) ))
  642. bMustCheckVsyncWidth=TRUE;
  643. return bMustCheckVsyncWidth;
  644. }
  645. BOOL ADC_NeedCheckHsyncWidth(void)
  646. {
  647. BOOL bCheckHsyncWidth=TRUE;
  648. VesaTiming* VgaModeTable = g_stADCTimingTbl.pVgaVideoTimingTable;
  649. if ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucADCTableIndex == PLF_VIDEO_TIMING_ID_1280x960x60)
  650. {
  651. //1280X960@60 conflict with 1600X900@60, check HsyncWidth
  652. if (sAdcInfo.usHsyncWidth < 165)
  653. bCheckHsyncWidth=FALSE;
  654. }
  655. else if ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucADCTableIndex == PLF_VIDEO_TIMING_ID_1600x900x60)
  656. {
  657. //1600X900@60 conflict with 1280X960@60, check HsyncWidth
  658. if (sAdcInfo.usHsyncWidth >166)
  659. bCheckHsyncWidth=FALSE;
  660. }
  661. else if ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucADCTableIndex == PLF_VIDEO_TIMING_ID_1280x1024x60)
  662. {
  663. //1280x1024@60 has different Htotal, check HsyncWidth
  664. if (sAdcInfo.usHsyncWidth >222)
  665. bCheckHsyncWidth=FALSE;
  666. }
  667. else if ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucADCTableIndex == PLF_VIDEO_TIMING_ID_1280x1024x60B)
  668. {
  669. //1280x1024@60 has different Htotal, check HsyncWidth
  670. if (sAdcInfo.usHsyncWidth < 223)
  671. bCheckHsyncWidth=FALSE;
  672. }
  673. else if ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucADCTableIndex == PLF_VIDEO_TIMING_ID_1680x1050x60)
  674. {
  675. //1680x1050@60 has different Htotal, check HsyncWidth
  676. if ((sAdcInfo.usHsyncWidth >243) && (sAdcInfo.ulVsyncWidth > 17500) )
  677. bCheckHsyncWidth=FALSE;
  678. }
  679. else if ( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucADCTableIndex == PLF_VIDEO_TIMING_ID_1680x1050x60B)
  680. {
  681. //1680x1050@60 has different Htotal, check HsyncWidth
  682. if ((sAdcInfo.usHsyncWidth < 244) && (sAdcInfo.ulVsyncWidth > 17501) )
  683. bCheckHsyncWidth=FALSE;
  684. }
  685. if (bCheckHsyncWidth == FALSE)
  686. {
  687. ADC_DebugMsg("Different HsyncWidth, check the other timing \n");
  688. }
  689. return bCheckHsyncWidth;
  690. }
  691. BOOL ADC_NeedCheckSwitchRef24M(void)
  692. {
  693. BOOL bSwitchToOSC = FALSE;
  694. VesaTiming* VgaModeTable = g_stADCTimingTbl.pVgaVideoTimingTable;
  695. switch( VgaModeTable[sAdcInfo.ucMatchTablePtr].ucADCTableIndex)
  696. {
  697. case PLF_VIDEO_TIMING_ID_640x350x70:
  698. case PLF_VIDEO_TIMING_ID_640x480x60:
  699. case PLF_VIDEO_TIMING_ID_800x600x75:
  700. case PLF_VIDEO_TIMING_ID_800x600x85:
  701. case PLF_VIDEO_TIMING_ID_848x480x60:
  702. case PLF_VIDEO_TIMING_ID_1680x1050x60_RB:
  703. // Switch CLK source to OSC directly for preventing water ripple interference
  704. bSwitchToOSC = TRUE;
  705. break;
  706. default:
  707. // Keep CLK source from CCPLL
  708. bSwitchToOSC = FALSE;
  709. break;
  710. }
  711. return bSwitchToOSC;
  712. }
  713. void ADC_CheckVGATable(void)
  714. {
  715. UINT16 usDeltaVcount, usDeltaHFreq;
  716. UINT8 ucDeltaVFreq,ucDeltaPol;
  717. UINT32 ulDeltaValue;
  718. INT32 iCheckVsyncWidthDelta;
  719. VesaTiming* VgaModeTable = g_stADCTimingTbl.pVgaVideoTimingTable;
  720. usDeltaHFreq=abs(VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency -ADC_DetectTiming.usHFrequency);
  721. ucDeltaVFreq=abs(VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency -ADC_DetectTiming.ucVFrequency);
  722. usDeltaVcount=abs(VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVcount - ADC_DetectTiming.usVcount);
  723. ucDeltaPol=abs((VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucFlag>>4) & (ADC_DetectTiming.ucFlag>>4));
  724. ulDeltaValue = usDeltaHFreq + ucDeltaVFreq + usDeltaVcount;
  725. // Boundary for Delta Vf smaller than 2
  726. // Delta Hf < 1.5% of Hf on table for boundary
  727. if ( ucDeltaVFreq < 2 && usDeltaHFreq <= (VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency+66)/67 && usDeltaVcount<3 )
  728. {
  729. ADC_DebugMsg("--- TblEntry = %d --- %d x %d @ %d \n", sAdcInfo.ucVesaModeTableEntry,
  730. VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHactive,
  731. VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVactive,
  732. VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency);
  733. if( ADC_NeedCheckHsyncWidth()== FALSE)
  734. return;
  735. if (ADC_NeedToCheckPolarity() == TRUE)
  736. {
  737. ADC_DebugMsg("ChkPol = %d, Table_Flag = 0x%x, DetTiming_Flag = 0x%x\n", ucDeltaPol,
  738. VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucFlag,
  739. ADC_DetectTiming.ucFlag);
  740. if (ucDeltaPol == 0)
  741. return;
  742. }
  743. if( ADC_NeedCheckVsyncWidth()==TRUE)
  744. {
  745. iCheckVsyncWidthDelta = abs(VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency*10/VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVs_Width
  746. - sAdcInfo.ulMClk*SYS_CRYS_CLK_RATIO_PRECISE_3/(sAdcInfo.ulVsyncWidth));
  747. ADC_DebugMsg("ChkVsWidth diff = %d\n", iCheckVsyncWidthDelta);
  748. //1680x1050x60C conflict with 1400x1050x60B
  749. if ((( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucADCTableIndex == PLF_VIDEO_TIMING_ID_1680x1050x60C ) && (sAdcInfo.ulVsyncWidth < 9033)) ||
  750. (( VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucADCTableIndex == PLF_VIDEO_TIMING_ID_1400x1050x60B ) && (sAdcInfo.ulVsyncWidth > 9033)))
  751. return;
  752. if( sAdcInfo.iCheckVsyncWidthDelta > iCheckVsyncWidthDelta )
  753. {
  754. sAdcInfo.ulDeltaValue = ulDeltaValue;
  755. sAdcInfo.iCheckVsyncWidthDelta = iCheckVsyncWidthDelta;
  756. sAdcInfo.ucMatchTablePtr = sAdcInfo.ucVesaModeTableEntry;
  757. }
  758. else
  759. return;
  760. }
  761. else
  762. {
  763. ADC_DebugMsg("ChkTblDeltaVal = %d\n", ulDeltaValue);
  764. if(sAdcInfo.ulDeltaValue > ulDeltaValue)
  765. {
  766. sAdcInfo.ulDeltaValue = ulDeltaValue;
  767. sAdcInfo.ucMatchTablePtr = sAdcInfo.ucVesaModeTableEntry;
  768. }
  769. else
  770. return;
  771. }
  772. ADC_DebugMsg("HFdiff = %d, VFdiff = %d, VCdiff = %d, TotalDelta = %d\n",
  773. usDeltaHFreq, ucDeltaVFreq, usDeltaVcount, ulDeltaValue);
  774. ADC_DebugMsg("HFreq = %d, VFreq = %d, VCount = %d, HS_Width = %d\n",
  775. VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency,
  776. VgaModeTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency,
  777. VgaModeTable[sAdcInfo.ucVesaModeTableEntry].usVcount,
  778. sAdcInfo.usHsyncWidth);
  779. if(sAdcInfo.ulDeltaValue == 0 && ADC_NeedCheckVsyncWidth()==FALSE)
  780. sAdcInfo.ucVesaModeTableEntry = g_stADCTimingTbl.VgaVideoTimingTblSize;
  781. }
  782. }
  783. void ADC_CheckYPPTable(void)
  784. {
  785. UINT16 usDeltaHFreq;
  786. UINT8 ucDeltaVFreq;
  787. usDeltaHFreq=abs(g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency -ADC_DetectTiming.usHFrequency/10);
  788. ucDeltaVFreq=abs(g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency -ADC_DetectTiming.ucVFrequency);
  789. // Boundary for Delta Vf smaller than 2
  790. // Delta Hf < 1.5% of Hf on table for boundary
  791. if (sAdcInfo.ulDeltaValue > usDeltaHFreq && ucDeltaVFreq < 2 &&
  792. usDeltaHFreq <= (g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency+66)/67 &&
  793. sAdcInfo.bInterlace == (g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].ucFlag&0x1))
  794. {
  795. ADC_DebugMsg("--- TblEntry = %d --- %d x %d @ %d\n", sAdcInfo.ucVesaModeTableEntry,
  796. g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].usHactive,
  797. g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].usVactive,
  798. g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency);
  799. if ( (abs(ADC_DetectTiming.usVcount - 625) < 5) && (sAdcInfo.ucRegLowWidth < 250 ) )
  800. {
  801. ADC_DebugMsg( "Unsupported 1080i@50Hz 295 RegLowWidth = %d \n", sAdcInfo.ucRegLowWidth);
  802. return;
  803. }
  804. ADC_DebugMsg("HFdiff = %d, VFdiff = %d\n", usDeltaHFreq, ucDeltaVFreq);
  805. ADC_DebugMsg("HFreq = %d, VFreq = %d, VCount = %d\n",
  806. g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].usHFrequency,
  807. g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].ucVFrequency,
  808. g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucVesaModeTableEntry].usVcount);
  809. sAdcInfo.ulDeltaValue=usDeltaHFreq;
  810. sAdcInfo.ucMatchTablePtr=sAdcInfo.ucVesaModeTableEntry;
  811. if(sAdcInfo.ulDeltaValue == 0)
  812. sAdcInfo.ucVesaModeTableEntry = g_stADCTimingTbl.YppVideoTimingTblSize;
  813. }
  814. }
  815. void ADC_CheckInputMatch(UINT8 ucTable)
  816. {
  817. switch (ucTable)
  818. {
  819. case VESA_MODE:
  820. ADC_CheckVGATable();
  821. break;
  822. case YPP_MODE:
  823. ADC_CheckYPPTable();
  824. break;
  825. }
  826. }
  827. UINT8 ADC_FindTimingModeTable(void)
  828. {
  829. BOOL bFound=FALSE;
  830. UINT32 ulMaxPixelClock;
  831. ulMaxPixelClock=175;
  832. sAdcInfo.ucVesaModeTableEntry = 0;
  833. sAdcInfo.ulDeltaValue = 100;
  834. sAdcInfo.iCheckVsyncWidthDelta = 100000;
  835. if( sAdcInfo.ucSource==Adc_kSourceVGA )
  836. {
  837. // The following are for PC mode
  838. ADC_DebugMsg("Find PC_Tbl\n");
  839. while (sAdcInfo.ucVesaModeTableEntry < g_stADCTimingTbl.VgaVideoTimingTblSize )
  840. {
  841. ADC_CheckInputMatch(VESA_MODE);
  842. sAdcInfo.ucVesaModeTableEntry++;
  843. }
  844. if (g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucPixelClock > ulMaxPixelClock)
  845. {
  846. printk(KERN_EMERG"Table PixClk %d M(> %d)\n",
  847. g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucPixelClock, ulMaxPixelClock);
  848. return UNSUPPORT_MODE;
  849. }
  850. bFound = (sAdcInfo.ulDeltaValue != 100) ? TRUE:FALSE;
  851. if (bFound == TRUE && g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].bSupport == 1)
  852. {
  853. if(ADC_NeedCheckSwitchRef24M())
  854. {
  855. ADC_Write(GLB_REG_VADC_REF_SEL_24M, 1); // 0xbe000149[6] 24 MHz reference selector. 0: CPLL, 1: Crystal 24M
  856. ADC_DebugMsg(" Switch 24 MHz reference selector (0xbe000149[6]) as Crystal\n");
  857. }
  858. ADC_DebugMsg("--- PC_MODE Match in %d --- %d x %d @ %d \n", sAdcInfo.ucMatchTablePtr,
  859. g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHactive,
  860. g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usVactive,
  861. g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucVFrequency);
  862. return VESA_MODE;
  863. }
  864. else
  865. return UNSUPPORT_MODE;
  866. }
  867. else
  868. {
  869. ADC_DebugMsg("Find YPP_Tbl\n");
  870. while (sAdcInfo.ucVesaModeTableEntry < g_stADCTimingTbl.YppVideoTimingTblSize)
  871. {
  872. ADC_CheckInputMatch(YPP_MODE);
  873. sAdcInfo.ucVesaModeTableEntry++;
  874. }
  875. bFound = (sAdcInfo.ulDeltaValue != 100) ? TRUE:FALSE;
  876. if(bFound == TRUE)
  877. {
  878. #ifdef DRV_ENABLE_CVD2
  879. if(ucCVD2PowerEnable==FALSE)
  880. {
  881. DRV_CVD2_Power_Setting(TRUE);
  882. DRV_CVD2_Enable_Ypp_CC();
  883. ucCVD2PowerEnable=TRUE;
  884. }
  885. #endif
  886. ADC_DebugMsg("--- YPP_MODE Match in %d --- %d x %d @ %d\n", sAdcInfo.ucMatchTablePtr,
  887. g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHactive,
  888. g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].usVactive,
  889. g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucVFrequency);
  890. return YPP_MODE;
  891. }
  892. else
  893. return UNSUPPORT_MODE;
  894. }
  895. return UNSUPPORT_MODE;
  896. }
  897. BOOL ADC_Detect_Mode(void)
  898. {
  899. if(ADC_Frequency_Filter()==FALSE)
  900. {
  901. ADC_StatusUpdate();
  902. return FALSE;
  903. }
  904. sAdcInfo.ucInputMode = ADC_FindTimingModeTable();
  905. if(sAdcInfo.ucInputMode == UNSUPPORT_MODE)
  906. {
  907. ADC_StatusUpdate();
  908. return FALSE;
  909. }
  910. else
  911. return TRUE;
  912. }
  913. void ADC_LoadVesaTable(UINT8 ucTablePtr)
  914. {
  915. VesaTiming* VgaModeTable = g_stADCTimingTbl.pVgaVideoTimingTable;
  916. ADC_InputVesaTiming.usHtotal = VgaModeTable[ucTablePtr].usHtotal*iEnlargeWidthRate;
  917. ADC_InputVesaTiming.usVcount = VgaModeTable[ucTablePtr].usVcount;
  918. ADC_InputVesaTiming.usHFrequency = VgaModeTable[ucTablePtr].usHFrequency;
  919. ADC_InputVesaTiming.ucVFrequency = VgaModeTable[ucTablePtr].ucVFrequency;
  920. ADC_InputVesaTiming.ucPixelClock = VgaModeTable[ucTablePtr].ucPixelClock*iEnlargeWidthRate;
  921. ADC_InputVesaTiming.usHactive = VgaModeTable[ucTablePtr].usHactive*iEnlargeWidthRate;
  922. ADC_InputVesaTiming.usVactive = VgaModeTable[ucTablePtr].usVactive;
  923. ADC_InputVesaTiming.usHstart= VgaModeTable[ucTablePtr].usHstart*iEnlargeWidthRate;
  924. ADC_InputVesaTiming.usVstart= VgaModeTable[ucTablePtr].usVstart;
  925. ADC_InputVesaTiming.usHs_Width = VgaModeTable[ucTablePtr].usHs_Width*iEnlargeWidthRate;
  926. ADC_InputVesaTiming.ucFlag=ADC_DetectTiming.ucFlag;
  927. if( sAdcInfo.bHpol==0 )
  928. ADC_InputVesaTiming.usHstart -= ADC_InputVesaTiming.usHs_Width;
  929. ADC_DetectTiming.usHstart=ADC_InputVesaTiming.usHstart + ADI_CENTERING_HOR_DELAY;
  930. ADC_DetectTiming.usVstart=ADC_InputVesaTiming.usVstart;
  931. ADC_DetectTiming.usHactive=ADC_InputVesaTiming.usHactive;
  932. ADC_DetectTiming.usVactive=ADC_InputVesaTiming.usVactive;
  933. }
  934. void ADC_LoadYPPTable(UINT8 ucTablePtr)
  935. {
  936. ADC_InputVesaTiming.ucPixelClock=g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].ucPixelClock*iEnlargeWidthRate;
  937. ADC_InputVesaTiming.usVcount=g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].usVcount;
  938. ADC_InputVesaTiming.usHFrequency=g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].usHFrequency*10;
  939. ADC_InputVesaTiming.ucVFrequency=g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].ucVFrequency;
  940. ADC_InputVesaTiming.usHtotal=g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].usHtotal*iEnlargeWidthRate;
  941. ADC_InputVesaTiming.usHstart=(g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].usHstart*iEnlargeWidthRate);
  942. ADC_InputVesaTiming.usVstart=g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].usVstart;
  943. ADC_InputVesaTiming.usHactive=g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].usHactive*iEnlargeWidthRate;
  944. ADC_InputVesaTiming.usVactive=g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].usVactive;
  945. ADC_InputVesaTiming.usHs_Width = g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].usHs_Width*iEnlargeWidthRate;
  946. ADC_InputVesaTiming.ucFlag=ADC_DetectTiming.ucFlag;
  947. if (sAdcInfo.bInterlace)
  948. ADC_InputVesaTiming.usVactive/=2;
  949. ADC_DetectTiming.usHstart=ADC_InputVesaTiming.usHstart;
  950. ADC_DetectTiming.usVstart=ADC_InputVesaTiming.usVstart;
  951. ADC_DetectTiming.usHactive=ADC_InputVesaTiming.usHactive;
  952. ADC_DetectTiming.usVactive=ADC_InputVesaTiming.usVactive;
  953. if( (g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].ucADCTableIndex == PLF_VIDEO_TIMING_ID_DTV_480I60) || (g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].ucADCTableIndex == PLF_VIDEO_TIMING_ID_DTV_480P60) || (g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].ucADCTableIndex == PLF_VIDEO_TIMING_ID_DTV_576I50) || (g_stADCTimingTbl.pYppVideoTimingTable[ucTablePtr].ucADCTableIndex == PLF_VIDEO_TIMING_ID_DTV_576P50))
  954. ADC_DetectTiming.usHs_Width = sAdcInfo.ucRegLowWidth*1000000/sAdcInfo.ulMClk*ADC_InputVesaTiming.ucPixelClock/1000;
  955. else
  956. ADC_DetectTiming.usHs_Width = sAdcInfo.ucRegLowWidth*1000000/sAdcInfo.ulMClk*ADC_InputVesaTiming.ucPixelClock/1000*2;
  957. }
  958. BOOL ADC_CheckLoadTableValueRange(void)
  959. {
  960. BOOL bLoadDataOK=FALSE;
  961. ADC_DebugMsg("========= [%s MatchIdx = %3d] ==========", ( sAdcInfo.ucSource==Adc_kSourceVGA )?" VGA ":" YPP ",
  962. sAdcInfo.ucMatchTablePtr);
  963. ADC_DebugMsg("| Htotal = %4d Vcount = %3d |", ADC_InputVesaTiming.usHtotal, ADC_InputVesaTiming.usVcount);
  964. ADC_DebugMsg("| Hactive = %4d Vactive = %4d |", ADC_DetectTiming.usHactive, ADC_DetectTiming.usVactive);
  965. ADC_DebugMsg("| Hstart = %3d Vstart = %3d |", ADC_DetectTiming.usHstart, ADC_DetectTiming.usVstart);
  966. ADC_DebugMsg("| HFrequency = %4d VFrequency = %3d |", ADC_InputVesaTiming.usHFrequency, ADC_InputVesaTiming.ucVFrequency);
  967. ADC_DebugMsg("| PixelClock = %3d ucFlag = 0x%02x |", ADC_InputVesaTiming.ucPixelClock, ADC_InputVesaTiming.ucFlag);
  968. ADC_DebugMsg("| Hs_Width = %3d EnlargeRate = %d |\n", ADC_DetectTiming.usHs_Width, iEnlargeWidthRate);
  969. ADC_DebugMsg("=============================================");
  970. return bLoadDataOK;
  971. }
  972. BOOL ADC_CheckSyncStable(UINT8 ucTimeOut)
  973. {
  974. UINT8 ucLoop=0;
  975. BOOL bStable=FALSE;
  976. UINT8 ucTimeOut2=4;
  977. while( ucLoop++ <= ucTimeOut )
  978. {
  979. if( VIP_InputActiveDetect(EXTS)==0x0f )
  980. {
  981. bStable = TRUE;
  982. break;
  983. }
  984. ADC_DelayMS(20); // 25ms
  985. }
  986. while( ucTimeOut2 > 0 && bStable == TRUE)
  987. {
  988. if( VIP_InputActiveDetect(EXTS)!=0x0f )
  989. {
  990. ADC_DebugMsg("Round 2: VIP_Sync Unstable! Time is %d\n", (4 - ucTimeOut2));
  991. bStable = FALSE;
  992. break;
  993. }
  994. udelay(1000); // 1ms
  995. ucTimeOut2--;
  996. }
  997. if (bStable == FALSE)
  998. ADC_DebugMsg("VIP_Sync Unstable! Status=0x%x\n", VIP_InputActiveDetect(EXTS));
  999. else
  1000. {
  1001. ADC_DebugMsg("VIP_Sync Stable\n");
  1002. }
  1003. return bStable;
  1004. }
  1005. BOOL ADC_GetExtsInfo(UINT8 ucStableCnt, UINT8 ucTimeOut, UINT8 ucMdelay)
  1006. {
  1007. VesaTiming InputBaseTiming;
  1008. UINT8 ChkCnt,OkCnt,ucFlag;
  1009. volatile UINT16 ucMLineWidth;
  1010. BOOL RetVal,bPolarityInverse, bSignalStable=FALSE;
  1011. SYNC_DETECT sSyncInfo={0};
  1012. InputBaseTiming.ucFlag=InputBaseTiming.usVcount=0;
  1013. InputBaseTiming.ucVFrequency=InputBaseTiming.usHFrequency=0;
  1014. ADC_DetectTiming.usVcount=ADC_DetectTiming.ucFlag=0;
  1015. ADC_DetectTiming.ucVFrequency=ADC_DetectTiming.usHFrequency=0;
  1016. sAdcInfo.ulVsyncWidth=0;
  1017. RetVal = ADC_CheckSyncStable(8);
  1018. if(!sAdcInfo.bADCEnable)
  1019. return FALSE;
  1020. if(RetVal == TRUE)
  1021. {
  1022. ChkCnt=OkCnt=0;
  1023. bPolarityInverse = ADC_Read(ADC_REG_e_hsync_pol);
  1024. while (OkCnt < ucStableCnt && ChkCnt++ < ucTimeOut)
  1025. {
  1026. //ADC_DelayMS(ucMdelay);
  1027. if(VIP_InputSyncDetect(NULLOP, SOURCE_EXTS, &sSyncInfo) == SYNC_OK)
  1028. {
  1029. RetVal=TRUE;
  1030. // 2010/12/30 modify by patrick
  1031. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  1032. ucFlag = ((ADC_Read(ADC_STA_hs_plrty)^bPolarityInverse)<<2) | (ADC_Read(ADC_STA_vs_plrty)<<1);
  1033. else
  1034. ucFlag = sSyncInfo.ucADCInterlaceMode;
  1035. if((abs(InputBaseTiming.usVcount-(sSyncInfo.usVSyncCnt&0x07ff)) < 5) &&
  1036. (abs(InputBaseTiming.ucVFrequency-(sSyncInfo.usVFreq+5)/10) < 3) &&
  1037. (abs(InputBaseTiming.usHFrequency-sSyncInfo.usHFreq) < (sSyncInfo.usHFreq+66)/67) &&
  1038. (abs(InputBaseTiming.ucFlag-ucFlag) == 0) )
  1039. {
  1040. ADC_DetectTiming.usVcount=(ADC_DetectTiming.usVcount+(sSyncInfo.usVSyncCnt&0x07ff))/2;
  1041. ADC_DetectTiming.ucVFrequency=(ADC_DetectTiming.ucVFrequency+(sSyncInfo.usVFreq+5)/10)/2;
  1042. ADC_DetectTiming.usHFrequency=(ADC_DetectTiming.usHFrequency+sSyncInfo.usHFreq)/2;
  1043. }
  1044. else
  1045. {
  1046. ADC_DetectTiming.usVcount=InputBaseTiming.usVcount=sSyncInfo.usVSyncCnt&0x07ff;
  1047. ADC_DetectTiming.ucFlag=InputBaseTiming.ucFlag=ucFlag;
  1048. ADC_DetectTiming.ucVFrequency=InputBaseTiming.ucVFrequency=(sSyncInfo.usVFreq+5)/10;
  1049. ADC_DetectTiming.usHFrequency=InputBaseTiming.usHFrequency=sSyncInfo.usHFreq;
  1050. OkCnt = 0;
  1051. }
  1052. OkCnt++;
  1053. }
  1054. else
  1055. {
  1056. OkCnt=0;
  1057. RetVal=FALSE;
  1058. }
  1059. }
  1060. if( sAdcInfo.ucSource==Adc_kSourceVGA )
  1061. {
  1062. sAdcInfo.usHsyncWidth= ADC_Read(ADC_STA_shp_width)* SYS_CRYS_CLK_RATIO_PRECISE_3 /1000;
  1063. sAdcInfo.ulVsyncWidth = ADC_Read(ADC_STA_svp_width)* SYS_CRYS_CLK_RATIO_PRECISE_3 /1000;
  1064. sAdcInfo.usHsyncWidth = sAdcInfo.usHsyncWidth;
  1065. sAdcInfo.ulVsyncWidth = sAdcInfo.ulVsyncWidth;
  1066. bSignalStable = ADC_Read(ADC_STA_cstable_i2);
  1067. }
  1068. else
  1069. {
  1070. sAdcInfo.ucRegLineWidth = ADC_Read(ADC_STA_line_wdth);
  1071. sAdcInfo.ucRegLowWidth = ADC_Read(ADC_STA_low_wdth);
  1072. ucMLineWidth = ADC_Read(ADC_STA_mline_wdth);
  1073. if (abs(sAdcInfo.ucRegLineWidth -ucMLineWidth) > 4 )
  1074. {
  1075. ADC_DebugMsg("Fail: mLine_width < threshold\n");
  1076. ADC_DebugMsg("RegLineWidth=%d ucMLineWidth=%d\n", sAdcInfo.ucRegLineWidth, ucMLineWidth);
  1077. //bSignalStable = FALSE;
  1078. }
  1079. else
  1080. {
  1081. //<--Workaround for COMP1080p pattern BURST of quantumdata.
  1082. bSignalStable = (ADC_Read(ADC_STA_cur_state)==0xd0)? TRUE:FALSE;
  1083. if(bSignalStable == FALSE)
  1084. {
  1085. ADC_DebugMsg("Fail: Sog Unstable\n");
  1086. }
  1087. }
  1088. if ( (sAdcInfo.ucSource == Adc_kSourceCOMP1 ||
  1089. sAdcInfo.ucSource == Adc_kSourceCOMP2 ||
  1090. sAdcInfo.ucSource == Adc_kSourceCOMP3) &&
  1091. (bSignalStable == TRUE) )
  1092. bSignalStable = ADC_CheckInterlaceMode();
  1093. }
  1094. if (bSignalStable == TRUE)
  1095. {
  1096. if (abs(ADC_DetectTiming.usVcount - 562) < 5 )
  1097. ADC_Write(ADC_REG_cs_vslp, 0);
  1098. }
  1099. ADC_Clear_Interrupt(0xdfff);
  1100. if(ChkCnt > ucTimeOut || bSignalStable==FALSE)
  1101. {
  1102. ADC_DetectTiming.usVcount=ADC_DetectTiming.ucFlag=0;
  1103. ADC_DetectTiming.ucVFrequency=ADC_DetectTiming.usHFrequency=0;
  1104. sAdcInfo.ulVsyncWidth=0;
  1105. RetVal = FALSE;
  1106. }
  1107. }
  1108. ADC_DebugMsg("ADC_DetectTiming from VIP_InputSyncDetect:\n HF = %d, VF = %d, Vcount = %d, Flag = 0x%x\n",
  1109. ADC_DetectTiming.usHFrequency,
  1110. ADC_DetectTiming.ucVFrequency,
  1111. ADC_DetectTiming.usVcount,
  1112. ADC_DetectTiming.ucFlag);
  1113. if( sAdcInfo.ucSource == Adc_kSourceVGA )
  1114. {
  1115. ADC_DebugMsg("AdcInfo: HS_Width<shp_width> = %d, VS_Width<svp_width> = %d\n",sAdcInfo.usHsyncWidth, sAdcInfo.ulVsyncWidth);
  1116. }
  1117. else
  1118. {
  1119. ADC_DebugMsg("AdcInfo: Line_Width = %d, Low_Width = %d\n",sAdcInfo.ucRegLineWidth, sAdcInfo.ucRegLowWidth);
  1120. }
  1121. if(sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  1122. {
  1123. if(sAdcInfo.ucRegLineWidth< 2500)
  1124. {
  1125. ADC_DebugMsg("Fail: AdcInfo:RegLineWidth < 2500 !!!!!!!!!\n");
  1126. //ADC_DelayMS(4500);
  1127. ADC_Write(ADC_REG_cs2_pll_sw_rst, 0x1);
  1128. ADC_Write(ADC_REG_cs2_pll_sw_rst, 0x0);
  1129. udelay(1000); // 1ms
  1130. RetVal = FALSE;
  1131. }
  1132. }
  1133. ADC_UpdateFlag(ADC_DetectTiming.ucFlag);
  1134. return RetVal;
  1135. }
  1136. BOOL ADC_ModeStable(void)
  1137. {
  1138. UINT8 ucLoop=0;
  1139. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  1140. while (ucLoop++ < 10)
  1141. {
  1142. if (ADC_CheckSyncStable(6) == TRUE)
  1143. {
  1144. ADC_DebugMsg("%dth VIP Sync chk\n", ucLoop);
  1145. ucLoop=100;
  1146. }
  1147. }
  1148. if (ucLoop <= 11)
  1149. {
  1150. ADC_DebugMsg("Sync UnStable TimeOut\n");
  1151. return FALSE;
  1152. }
  1153. return TRUE;
  1154. }
  1155. void ADC_ModeSetting(void)
  1156. {
  1157. UINT16 usPtr;
  1158. UINT32 ADCReg=0, ADCValue=0, ulHStart=0, ucIndex;
  1159. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  1160. ADC_OverSample();
  1161. if (sAdcInfo.ucSource == Adc_kSourceVGA)
  1162. {
  1163. ucIndex = g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucADCTableIndex;
  1164. ADC_LoadVesaTable(sAdcInfo.ucMatchTablePtr);
  1165. }
  1166. else
  1167. {
  1168. ucIndex = g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucADCTableIndex;
  1169. ADC_LoadYPPTable(sAdcInfo.ucMatchTablePtr);
  1170. }
  1171. if( ADC_CheckLoadTableValueRange()==FALSE )
  1172. sAdcInfo.bDoAuto = TRUE;
  1173. sAdcInfo.ucTimingModeIndex = ucIndex;
  1174. for (usPtr=0;usPtr<ADCModeSettingTableSize;usPtr++)
  1175. {
  1176. if (ADCModeTable[usPtr][0] == ucIndex && ADCModeTable[usPtr][1] == 0xff00)
  1177. {
  1178. usPtr++;
  1179. while (ADCModeTable[usPtr][0] != 0xffff && ADCModeTable[usPtr][1] != 0xffff)
  1180. {
  1181. ADCReg = ADCModeTable[usPtr][0];
  1182. ADCValue=(UINT8)(ADCModeTable[usPtr][1] & 0xff);
  1183. ADC_Write(ADCReg, ADCValue);
  1184. usPtr++;
  1185. }
  1186. usPtr=ADCModeSettingTableSize;
  1187. }
  1188. }
  1189. ulHStart = ADC_DetectTiming.usHs_Width + (ADC_InputVesaTiming.usHstart-ADC_DetectTiming.usHs_Width)/2;;
  1190. ADC_DebugMsg("Auto offset:HStart=%d\n", ulHStart);
  1191. // because component line is bad, adjustment sog_smthr 0x98 to 0xdb when SDTV
  1192. if(sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  1193. {
  1194. if( (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_480I60) || (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_480P60) || (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_576I50) || (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_576P50))
  1195. {
  1196. ADC_Write(ADC_REG_sog_smtl_dbsen, 0x1);
  1197. ADC_Write(ADC_REG_aof_pstart, (ulHStart<255?ulHStart:254));
  1198. ADC_Write(ADC_REG_vsync_mask_start, 0x1);
  1199. ADC_Write(ADC_REG_vsync_mask_end, 0x1);
  1200. ADC_Write(ADC_REG_iir_fbppn1_i_7to0, 0xc0);
  1201. ADC_Write(ADC_REG_iir_fbppn1_i_8, 0x0);
  1202. ADC_Write(ADC_REG_sc_vblankt2, 3);
  1203. ADC_Write(ADC_REG_vs_synct_th, 0xc);
  1204. ADC_Write(ADC_REG_stb_vs_sc_update, 0);
  1205. ADC_Write(ADC_REG_st_top_enter_th, 0x8);
  1206. ADC_Write(ADC_REG_coast_out_sel, 0x2);
  1207. ADC_Write(ADC_REG_coast200_start_opt, 0x2);
  1208. if( SMT_mergin == (sAdcInfo.ucTimingModeIndex&0xff) )
  1209. {
  1210. ADC_Write(ADC_REG_sog_smthr12v, 0x54);
  1211. printk(KERN_EMERG " #### <0x%x> Revise SMT = 0x%x\n", SMT_mergin, ADC_Read(ADC_REG_sog_smthr12v));
  1212. }
  1213. }
  1214. else
  1215. ADC_Write(ADC_REG_aof_pstart, (ulHStart<255?ulHStart:254));
  1216. SMT_mergin = 0;
  1217. }
  1218. else if (sAdcInfo.ucSource == Adc_kSourceVGA)
  1219. {
  1220. if ( ( g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHactive==1920 ) &&
  1221. ( g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usVactive==1080 ))
  1222. {
  1223. ADC_Write(ADC_REG_cs2_r_clamp_width, 0x5);
  1224. ADC_Write(ADC_REG_cs2_g_clamp_width, 0x5);
  1225. ADC_Write(ADC_REG_cs2_b_clamp_width, 0x5);
  1226. }
  1227. else if( ( g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHactive==1920 ) &&
  1228. ( g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usVactive==1200 ) )
  1229. {
  1230. ADC_Write(ADC_REG_cs2_r_clamp_width, 0x3);
  1231. ADC_Write(ADC_REG_cs2_g_clamp_width, 0x3);
  1232. ADC_Write(ADC_REG_cs2_b_clamp_width, 0x3);
  1233. }
  1234. else
  1235. {
  1236. ADC_Write(ADC_REG_cs2_r_clamp_width, 0x7);
  1237. ADC_Write(ADC_REG_cs2_g_clamp_width, 0x7);
  1238. ADC_Write(ADC_REG_cs2_b_clamp_width, 0x7);
  1239. }
  1240. //clamppdn edge different by Hpol
  1241. if (sAdcInfo.bHpol == 1)
  1242. ADC_Write(ADC_REG_clamppdn_edge, 0x1);
  1243. else
  1244. ADC_Write(ADC_REG_clamppdn_edge, 0);
  1245. // Interference for 1600 x 1200 @60Hz (Switch to Audio)
  1246. if( ( g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHactive==1600 ) &&
  1247. ( g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usVactive==1200 ) &&
  1248. ( g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucVFrequency==60 ))
  1249. {
  1250. ADC_Write(ADC_REG_cal_sw_ctrl_th, 0x1d);
  1251. }
  1252. }
  1253. }
  1254. BOOL ADC_Signal_Status(void)
  1255. {
  1256. INT32 iTimeOut1 = 0, iTimeOut2 = 0, iTimeOut3 = 0;
  1257. BOOL bStable1 = FALSE, bStable2=FALSE;
  1258. UINT8 ucDetectTimeOut=8, ucSogStableTimes=0, ucCurState=0, ucMid=0, ucMin=0, ucTipHeightcount =0;
  1259. UINT32 ulTipHeight=0;
  1260. UINT8 cur_source = sAdcInfo.ucSource;
  1261. VIP_ADCIntClear();
  1262. do{
  1263. iTimeOut1 = 0;
  1264. iTimeOut2 = 0;
  1265. if(!sAdcInfo.bADCEnable)
  1266. return FALSE;
  1267. ADC_ClearWatchDog;
  1268. if(sAdcInfo.ucSource != Adc_kSourceVGA)
  1269. {
  1270. ADC_SOG_Slicer_Backup();
  1271. ADC_DelayMS(30); // waiting 2 vsync for sog stable
  1272. while( iTimeOut1++ < 4)
  1273. {
  1274. ucCurState = (UINT8)ADC_Read(ADC_STA_cur_state);
  1275. if( ucCurState == 0x60)
  1276. {
  1277. iTimeOut3++;
  1278. break;
  1279. }
  1280. else if( ucCurState == 0xd0 )
  1281. {
  1282. bStable1 = TRUE;
  1283. ADC_DebugMsg("DetTimeRound %d: Sog stable\n", (9 - ucDetectTimeOut));
  1284. break;
  1285. }
  1286. else if( ucCurState == 0xfd )
  1287. break;
  1288. else
  1289. udelay(1000); //25ms
  1290. }
  1291. if( iTimeOut3 == 5)
  1292. {
  1293. ADC_Write(ADC_REG_vs_acc_enter_th, 0x2);
  1294. ADC_Write(ADC_REG_vs_skip_mline_wdth, 0x1);
  1295. }
  1296. if((iTimeOut1 == 5 && bStable1 == FALSE) || ucCurState == 0xfd)
  1297. {
  1298. ADC_DebugMsg("DetTimeRound %d: Sog unstable, CurState: 0x%x\n", (9 - ucDetectTimeOut), ucCurState);
  1299. continue;
  1300. }
  1301. else if ((ucCurState == 0xd0) && ( ADC_Read(ADC_STA_mline_wdth) == 0x20))
  1302. {
  1303. ADC_DebugMsg("DetTimeRound %d: mline_width < threshold\n", (9 - ucDetectTimeOut));
  1304. continue;
  1305. }
  1306. //tip Height
  1307. ucMid = ADC_Read(ADC_STA_mid_find);
  1308. ucMin = ADC_Read(ADC_STA_min_find);
  1309. ulTipHeight = (((UINT32)(ucMid-ucMin)*1000)/8/20); //unit: mV
  1310. ADC_DebugMsg("TimeRound %d: Tip Height=%d \n", ucTipHeightcount, ulTipHeight);
  1311. if(ulTipHeight < 200 )
  1312. {
  1313. if(ucTipHeightcount < 3 )
  1314. {
  1315. ucTipHeightcount++;
  1316. continue;
  1317. }
  1318. ADC_DebugMsg("TipHeight<200, new smthr\n");
  1319. if (sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  1320. {
  1321. ADC_Write(ADC_REG_st_iir1_strength, 0x3);
  1322. ADC_Write(ADC_REG_vs_synct_base_opt, 0x1);
  1323. ADC_Write(ADC_REG_vs_synct_th, 0x9);
  1324. ADC_Write(ADC_REG_vblank_ini_length, 0);
  1325. ADC_Write(ADC_REG_st_top_cgplus, 0x1);
  1326. }
  1327. }
  1328. else if (ulTipHeight > 400 )
  1329. {
  1330. if (sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  1331. {
  1332. ADC_DebugMsg("TipHeight>400\n");
  1333. /* ADC_DebugMsg("Reset ucDetectTimeOut count to 8\n");
  1334. if (ulTipHeight > 500 )
  1335. {
  1336. ADC_DebugMsg("TipHeight>500\n");
  1337. ADC_DebugMsg("Add Delay 500ms\n");
  1338. ADC_DelayMS(500);
  1339. }
  1340. ucDetectTimeOut=8;
  1341. continue;*/
  1342. }
  1343. }
  1344. }
  1345. if(cur_source != sAdcInfo.ucSource)
  1346. {
  1347. ADC_DebugMsg("### source change %d => %d , break signal status checking ###\n", cur_source, sAdcInfo.ucSource);
  1348. break;
  1349. }
  1350. ADC_DelayMS(40); // waiting 2 vsync for coast stable, 30ms
  1351. while( iTimeOut2++ < 8)
  1352. {
  1353. if( ADC_Read(ADC_STA_cstable_i2) == 0x1 )
  1354. {
  1355. ADC_DebugMsg("DetTimeRound %d: Coast stable\n", (9 - ucDetectTimeOut));
  1356. bStable2 = TRUE;
  1357. if (sAdcInfo.ucSource != Adc_kSourceVGA)
  1358. {
  1359. ADC_Write(ADC_REG_stb1_sc_wdth_opt, 3);
  1360. }
  1361. break;
  1362. }
  1363. else
  1364. {
  1365. if (sAdcInfo.ucSource != Adc_kSourceVGA)
  1366. {
  1367. //because only one vsync, set to "original signal" replace "regeneration signal"
  1368. if(ulTipHeight > 200 )
  1369. ADC_Write(ADC_REG_source_sel, 0x1);
  1370. ADC_DelayMS(25);
  1371. }
  1372. else
  1373. ADC_DelayMS(10);
  1374. }
  1375. }
  1376. if(iTimeOut2 == 9 && bStable2== FALSE)
  1377. {
  1378. ADC_DebugMsg("DetTimeRound %d: Coast unstable\n", (9 - ucDetectTimeOut));
  1379. if( ( ADC_Read(ADC_STA_cur_state) & 0x30) != 0)
  1380. {
  1381. ADC_DebugMsg("## cur_state!= {0x10, 0x20, 0x30} ~ Reset ucDetectTimeOut count to 8\n");
  1382. ucDetectTimeOut=8;
  1383. }
  1384. continue;
  1385. }
  1386. if( ADC_GetExtsInfo(4, 10, 32)==TRUE )
  1387. {
  1388. ADC_DebugMsg("DetTimeRound %d: GetExtsInfo success\n", (9 - ucDetectTimeOut));
  1389. return TRUE;
  1390. }
  1391. else
  1392. {
  1393. ADC_DebugMsg("DetTimeRound %d: GetExtsInfo fail\n", (9 - ucDetectTimeOut));
  1394. }
  1395. //??reset digital block
  1396. if( sAdcInfo.ucSource!=Adc_kSourceVGA )
  1397. {
  1398. //It's for Macro vision or worse csync.
  1399. if( ADC_Read(ADC_STA_cur_state)==0xd0 )
  1400. {
  1401. ucSogStableTimes++;
  1402. if( ucSogStableTimes==4 )
  1403. {
  1404. ADC_Write(ADC_REG_dg_l2h_thold, 0x1a);
  1405. ADC_Write(ADC_REG_dg_h2l_thold, 0x1a);
  1406. }
  1407. }
  1408. }
  1409. VIP_ResetADI();
  1410. }while ( --ucDetectTimeOut>0 );
  1411. ADC_DebugMsg("No stable signal=%x\n", VIP_InputActiveDetect(EXTS));
  1412. sAdcInfo.ucInputMode = NOSIGNAL_MODE;
  1413. return FALSE;
  1414. }
  1415. UINT8 ADC_Mode_Setup( void )
  1416. {
  1417. UINT8 ucPixelClock = 0;
  1418. UINT16 usHTotal = 0;
  1419. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  1420. if(ADC_Signal_Status()==FALSE)
  1421. return VIP_No_Signal;
  1422. if(ADC_Detect_Mode()==FALSE)
  1423. return Unsupported_Timing;
  1424. //Set PLL, Clamp and mode setting
  1425. ADC_ModeSetting();
  1426. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  1427. {
  1428. ucPixelClock = g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucPixelClock*iEnlargeWidthRate;
  1429. usHTotal = g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHtotal*iEnlargeWidthRate;
  1430. }
  1431. else
  1432. {
  1433. ucPixelClock = g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucPixelClock*iEnlargeWidthRate;
  1434. usHTotal = g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHtotal*iEnlargeWidthRate;
  1435. }
  1436. //ADC_PllSetting(ucPixelClock, usHTotal);
  1437. ADC_CheckPllResetSequence(ucPixelClock, usHTotal);
  1438. //Hsync output by PLL
  1439. ADC_Write(ADC_REG_o_hsync_sel,0);
  1440. udelay(1000); //10ms
  1441. if(ADC_CheckSyncStable(6) ==FALSE)
  1442. {
  1443. sAdcInfo.ucInputMode = NOSIGNAL_MODE;
  1444. return Mode_Change_Again;
  1445. }
  1446. ADC_StatusUpdate();
  1447. FactoryModeAWB = FALSE;
  1448. return Mode_Change_Stable;
  1449. }
  1450. void ADC_SourceInit(void)
  1451. {
  1452. UINT16 usPtr;
  1453. UINT32 ADCReg=0, ADCValue=0;
  1454. UINT8 ucCheckInputPIN;
  1455. ADC_ScreenMode(BlackScreen);
  1456. ADC_Write(GLB_REG_VADC_REF_SEL_24M, 0); // 0xbe000149[6] 24 MHz reference selector. 0: CPLL, 1: Crystal 24M
  1457. //ADC Clock 200MHz on.
  1458. ADC_Write(GLB_REG_YPP200MCLK_DIV, 3);
  1459. ADC_Write(GLB_REG_YPP200MCLK_DIV_RSTN, 1);
  1460. ADC_Write(GLB_REG_DEMOD_PWDN_BG, 1 ); // power down DMADC's BGP
  1461. ADC_Write(GLB_REG_VCLK_DIV_RSTN, 1 ); // Set ADC_PLL reference divider reset as normal mode
  1462. //VIP bypass input = Hsync(0:sog)
  1463. ADC_Write(GLB_REG_ALWAYS_HSI, 1);
  1464. //internal coast select
  1465. ADC_Write(GLB_REG_ECO_FIELD_SEL, 1);
  1466. ADC_Write(ADC_REG_ss_mode, 1);
  1467. //Bandgap setting
  1468. sAdcInfo.ucBandgap = 0x5;
  1469. ADC_Write(ADC_REG_vbg_v_ctrl, sAdcInfo.ucBandgap);
  1470. *((volatile UINT8*)0xbe1cf082) = 0x1f;
  1471. sAdcInfo.ulMClk=0;
  1472. sAdcInfo.ulMClk = ADC_MClk();
  1473. ADC_DebugMsg("MClk=%d\n",sAdcInfo.ulMClk);
  1474. if (sAdcInfo.ucSource == Adc_kSourceVGA)
  1475. ucCheckInputPIN = adc_InputSrcPin.rgb.g_pin;
  1476. else
  1477. ucCheckInputPIN = adc_InputSrcPin.ypbpr.y_pin;
  1478. if (ucCheckInputPIN == INPUT_PIN_COMP_G1)
  1479. {
  1480. ADC_Write(ADC_REG_lcg_rch_sel, 0x1);
  1481. ADC_Write(ADC_REG_lcg_gch_sel, 0x1);
  1482. ADC_Write(ADC_REG_lcg_bch_sel, 0x1);
  1483. ADC_Write(ADC_REG_sog_ch_sel, 0x2);
  1484. ADC_Write(ADC_REG_sog_clamp_sel, 0x2);
  1485. // Differential mode setting
  1486. ADC_Write(ADC_REG_r_refch12v, 1);
  1487. ADC_Write(ADC_REG_g_refch12v, 1);
  1488. ADC_Write(ADC_REG_b_refch12v, 1);
  1489. ADC_Write(ADC_REG_y_refch12v, 1);
  1490. }
  1491. else if (ucCheckInputPIN== INPUT_PIN_COMP_G2)
  1492. {
  1493. ADC_Write(ADC_REG_lcg_rch_sel, 0x2);
  1494. ADC_Write(ADC_REG_lcg_gch_sel, 0x2);
  1495. ADC_Write(ADC_REG_lcg_bch_sel, 0x2);
  1496. ADC_Write(ADC_REG_sog_ch_sel, 0x2);
  1497. ADC_Write(ADC_REG_sog_clamp_sel, 0x2);
  1498. // Differential mode setting
  1499. ADC_Write(ADC_REG_r_refch12v, 2);
  1500. ADC_Write(ADC_REG_g_refch12v, 2);
  1501. ADC_Write(ADC_REG_b_refch12v, 2);
  1502. ADC_Write(ADC_REG_y_refch12v, 2);
  1503. }
  1504. else if (ucCheckInputPIN == INPUT_PIN_COMP_G3)
  1505. {
  1506. ADC_Write(ADC_REG_lcg_rch_sel, 0x3);
  1507. ADC_Write(ADC_REG_lcg_gch_sel, 0x3);
  1508. ADC_Write(ADC_REG_lcg_bch_sel, 0x3);
  1509. ADC_Write(ADC_REG_sog_ch_sel, 0x4);
  1510. ADC_Write(ADC_REG_sog_clamp_sel, 0x3);
  1511. // Differential mode setting
  1512. ADC_Write(ADC_REG_r_refch12v, 3);
  1513. ADC_Write(ADC_REG_g_refch12v, 3);
  1514. ADC_Write(ADC_REG_b_refch12v, 3);
  1515. ADC_Write(ADC_REG_y_refch12v, 3);
  1516. }
  1517. else
  1518. { // For default VGA setting <R0, G0, B0> (ucCheckInputPIN == INPUT_PIN_NO_USE)
  1519. ADC_Write(ADC_REG_lcg_rch_sel, 0x0);
  1520. ADC_Write(ADC_REG_lcg_gch_sel, 0x0);
  1521. ADC_Write(ADC_REG_lcg_bch_sel, 0x0);
  1522. ADC_Write(ADC_REG_sog_ch_sel, 0x0);
  1523. ADC_Write(ADC_REG_sog_clamp_sel, 0x0);
  1524. // Differential mode setting
  1525. ADC_Write(ADC_REG_r_refch12v, 0);
  1526. ADC_Write(ADC_REG_g_refch12v, 0);
  1527. ADC_Write(ADC_REG_b_refch12v, 0);
  1528. ADC_Write(ADC_REG_y_refch12v, 0);
  1529. }
  1530. // Pull down unused RGB
  1531. ADC_Write(ADC_REG_r_pden12v, 1);
  1532. ADC_Write(ADC_REG_g_pden12v, 1);
  1533. ADC_Write(ADC_REG_b_pden12v, 1);
  1534. ADC_Write(ADC_REG_r_tswmiden12v, 1);
  1535. ADC_Write(ADC_REG_g_tswmiden12v, 1);
  1536. ADC_Write(ADC_REG_b_tswmiden12v, 1);
  1537. //ADCSouceInitBaseTable
  1538. for (usPtr=0;usPtr<ADCSouceInitBaseTableSize;usPtr++)
  1539. {
  1540. if (ADCSouceInitBaseTable[usPtr][0] == sAdcInfo.ucSource && ADCSouceInitBaseTable[usPtr][1] == 0xff00)
  1541. {
  1542. usPtr++;
  1543. while (ADCSouceInitBaseTable[usPtr][0] != 0xffff && ADCSouceInitBaseTable[usPtr][1] != 0xffff)
  1544. {
  1545. ADCReg = ADCSouceInitBaseTable[usPtr][0];
  1546. ADCValue=(UINT8)(ADCSouceInitBaseTable[usPtr][1] & 0xff);
  1547. ADC_Write(ADCReg, ADCValue);
  1548. usPtr++;
  1549. }
  1550. usPtr=ADCSouceInitBaseTableSize;
  1551. }
  1552. }
  1553. // AFE mode selection on channel RGB
  1554. ADC_Write(ADC_REG_R_SYPP120, 1);
  1555. ADC_Write(ADC_REG_R_SYPP121, 0);
  1556. ADC_Write(ADC_REG_R_SCVBS12, 0);
  1557. ADC_Write(ADC_REG_G_SYPP120, 1);
  1558. ADC_Write(ADC_REG_G_SYPP121, 0);
  1559. ADC_Write(ADC_REG_G_SCVBS12, 0);
  1560. ADC_Write(ADC_REG_B_SYPP120, 1);
  1561. ADC_Write(ADC_REG_B_SYPP121, 0);
  1562. ADC_Write(ADC_REG_b_scvbs12, 0);
  1563. //Differential mode setting
  1564. if (sAdcInfo.ucSource == Adc_kSourceVGA)
  1565. {
  1566. ADC_Write(ADC_REG_av_r_pg12v2, 4);
  1567. ADC_Write(ADC_REG_av_g_pg12v2, 4);
  1568. ADC_Write(ADC_REG_av_b_pg12v2, 4);
  1569. }
  1570. else
  1571. {
  1572. ADC_Write(ADC_REG_av_r_pg12v2, 3);
  1573. ADC_Write(ADC_REG_av_g_pg12v2, 3);
  1574. ADC_Write(ADC_REG_av_b_pg12v2, 3);
  1575. }
  1576. ADC_Write(ADC_REG_r_intrefen12v, 1);
  1577. ADC_Write(ADC_REG_g_intrefen12v, 1);
  1578. ADC_Write(ADC_REG_b_intrefen12v, 1);
  1579. ADC_Write(ADC_REG_r_lpfmod12v, 0);
  1580. ADC_Write(ADC_REG_g_lpfmod12v, 0);
  1581. ADC_Write(ADC_REG_b_lpfmod12v, 0);
  1582. ADC_Write(ADC_REG_r_refclampsel12v, 1);
  1583. ADC_Write(ADC_REG_g_refclampsel12v, 1);
  1584. ADC_Write(ADC_REG_b_refclampsel12v, 1);
  1585. ADC_Write(ADC_REG_epdy_12v, 0);
  1586. ADC_Write(ADC_REG_y_tswmiden12v, 1);
  1587. ADC_Write(ADC_REG_y_refclampsel12v, 1);
  1588. ADC_Write(ADC_REG_y_intrefen12v, 1);
  1589. //set correct the clock phase on re-sync buffer
  1590. ADC_Write(ADC_REG_hs_samples_clk_sel, 1);
  1591. //enable VBG from Audio
  1592. ADC_Write(ADC_REG_cal_manual_en, 0);
  1593. ADC_Write(ADC_REG_cal_manual_th, 0x00);
  1594. ADC_Write(ADC_REG_cal_sw_ctrl_en, 1);
  1595. ADC_Write(ADC_REG_cal_sw_ctrl_th, 0x0b);
  1596. //Enalbe YPP F switch function
  1597. ADC_Write(ADC_REG_r_epd12v, 0x0);
  1598. // Switch reference mode for AWB
  1599. ADC_Write(ADC_REG_lcg_refdbg_sel_temp, 0x3);
  1600. ADC_Write(ADC_REG_lcg_awbsel12v, 0x1);
  1601. //LN_div msb
  1602. ADC_Write(ADC_REG_r_pll_opi, 0);
  1603. // ADC MDAC OP current (0: Large current / 1: Small current)
  1604. ADC_Write(ADC_REG_av_g_pg12v1, 0);
  1605. //Source input
  1606. switch(sAdcInfo.ucSource)
  1607. {
  1608. case Adc_kSourceCOMP1 :
  1609. ADC_DebugMsg("Source: COMP1\n");
  1610. break;
  1611. case Adc_kSourceCOMP2:
  1612. ADC_DebugMsg("Source: COMP2\n");
  1613. break;
  1614. case Adc_kSourceCOMP3:
  1615. ADC_DebugMsg("Source: COMP3\n");
  1616. break;
  1617. case Adc_kSourceVGA:
  1618. ADC_DebugMsg("Source: PC\n");
  1619. break;
  1620. }
  1621. //ADC reset
  1622. ADC_Write(ADC_REG_adi_reset, 1);
  1623. ADC_Write(ADC_REG_adi_reset, 0);
  1624. }
  1625. void ADC_SendInfo( void )
  1626. {
  1627. UINT32 ulInputVsize;
  1628. sSendInfo.ucInputSource = EXTS;
  1629. sSendInfo.ucSubInputSource = sAdcInfo.ucSource;
  1630. sSendInfo.uiHactive = ADC_DetectTiming.usHactive;
  1631. sSendInfo.uiVactive = ADC_DetectTiming.usVactive;
  1632. sSendInfo.uiHstart = ADC_DetectTiming.usHstart;
  1633. sSendInfo.uiVstart = ADC_DetectTiming.usVstart;
  1634. sSendInfo.uiHend = sSendInfo.uiHstart+sSendInfo.uiHactive;
  1635. sSendInfo.uiVend = sSendInfo.uiVstart+sSendInfo.uiVactive;
  1636. sSendInfo.uiHfreq = ADC_InputVesaTiming.usHFrequency;
  1637. sSendInfo.uiVfreq = ADC_InputVesaTiming.ucVFrequency;
  1638. sSendInfo.uiHtotal= ADC_InputVesaTiming.usHtotal;
  1639. sSendInfo.uiVtotal= ADC_InputVesaTiming.usVcount;
  1640. sSendInfo.ucVpol = sAdcInfo.bVpol;
  1641. sSendInfo.ucHpol = sAdcInfo.bHpol;
  1642. sSendInfo.bInterlace = sAdcInfo.bInterlace;
  1643. sSendInfo.uiTableHstart = ADC_InputVesaTiming.usHstart;
  1644. sSendInfo.uiTableVstart = ADC_InputVesaTiming.usVstart;
  1645. sSendInfo.uiHsync_width = ADC_InputVesaTiming.usHs_Width;
  1646. sSendInfo.ucEnlargeWidthRate = iEnlargeWidthRate;
  1647. sSendInfo.uiTimingIndex = sAdcInfo.ucTimingModeIndex;
  1648. if (sAdcInfo.ucSource == Adc_kSourceVGA)
  1649. {
  1650. ADC_DebugMsg("Input: PC\n");
  1651. if(g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucVFrequency == 67) //Add by Jason. The timing name is 640x480@66, but the real V frequancy is 66.7(round up to 67).
  1652. sSendInfo.uiVfreq = 66;
  1653. sSendInfo.ucColorimetry = RGB;
  1654. sSendInfo.ucDataFormat = RGB;
  1655. sSendInfo.ucAspectRatio = ASPECT_NON;
  1656. }
  1657. else
  1658. {
  1659. ADC_DebugMsg("Input: YPP\n");
  1660. ulInputVsize = (sAdcInfo.bInterlace == INTERLACE) ?
  1661. ADC_DetectTiming.usVactive*2 : ADC_DetectTiming.usVactive;
  1662. sSendInfo.ucColorimetry = (ulInputVsize >= 720) ? YPP : YCC;
  1663. sSendInfo.ucDataFormat = YUV_444;
  1664. sSendInfo.ucAspectRatio = ASPECT_NON;
  1665. }
  1666. ADC_DebugMsg("ColorStandard=%d \n", sSendInfo.ucColorimetry);
  1667. VIP_SendInformation(&sSendInfo);
  1668. if( sAdcInfo.ucSource==Adc_kSourceVGA )
  1669. {
  1670. if(ADC_InputVesaTiming.usHactive == 834 && ADC_InputVesaTiming.usVactive == 624) //Add by Jason. H active is defined 832, but the the actuality is 834.
  1671. VIP_EXTS_SetOriActive(832, ADC_InputVesaTiming.usVactive);
  1672. else
  1673. VIP_EXTS_SetOriActive(ADC_InputVesaTiming.usHactive, ADC_InputVesaTiming.usVactive);
  1674. }
  1675. else
  1676. {
  1677. if( sAdcInfo.bInterlace )
  1678. VIP_EXTS_SetOriActive(ADC_InputVesaTiming.usHactive, ADC_InputVesaTiming.usVactive*2);
  1679. else
  1680. VIP_EXTS_SetOriActive(ADC_InputVesaTiming.usHactive, ADC_InputVesaTiming.usVactive);
  1681. }
  1682. ADC_DebugMsg("========= InputSource = %s ======== SubSource = %s =========",
  1683. (sSendInfo.ucInputSource==EXTS)?" EXTS ":"UNKNOWN", (sSendInfo.ucSubInputSource == Adc_kSourceVGA)?" VGA ":" YPP ");
  1684. ADC_DebugMsg("| Hactive = %4d, Hstart = %3d, Hend = %4d, HFreq = %4d, Hpol = %d |",
  1685. sSendInfo.uiHactive, sSendInfo.uiHstart, sSendInfo.uiHend, sSendInfo.uiHfreq, sSendInfo.ucHpol );
  1686. ADC_DebugMsg("| Vactive = %4d, Vstart = %3d, Vend = %4d, VFreq = %2d , Vpol = %d |",
  1687. sSendInfo.uiVactive, sSendInfo.uiVstart, sSendInfo.uiVend, sSendInfo.uiVfreq, sSendInfo.ucVpol);
  1688. ADC_DebugMsg("| Colorimetry = %s, DataFormat = %s AspectRatio = %s, Interlace = %s |",
  1689. (sSendInfo.ucColorimetry==RGB)?"RGB":(sSendInfo.ucColorimetry==YPP)?"YPP":"YCC",
  1690. (sSendInfo.ucDataFormat==RGB)?" RGB ":"YUV_444",
  1691. (sSendInfo.ucAspectRatio==ASPECT_NON)?"NON":"N/A",
  1692. sSendInfo.bInterlace?"T":"F");
  1693. ADC_DebugMsg("| TableIdx = %6d, Htotal = %4d, Hstart = %3d, HsWidth = %3d, Vstart = %d |",
  1694. sSendInfo.uiTimingIndex, sSendInfo.uiHtotal, sSendInfo.uiTableHstart, sSendInfo.uiHsync_width, sSendInfo.uiTableVstart);
  1695. }
  1696. void ADC_Centering(BOOL bDoCentering)
  1697. {
  1698. VIP_RECT rcCenter;
  1699. UINT8 RetValue;
  1700. ADC_DebugMsg("Do Auto Centering: %d\n", bDoCentering);
  1701. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  1702. {
  1703. ADC_DebugMsg(" Skip %s when mode change... \n", __FUNCTION__);
  1704. return;
  1705. }
  1706. RetValue = VIP_Centering(&rcCenter, bDoCentering);
  1707. if(RetValue == CENTERING_FAIL)
  1708. {
  1709. ADC_DebugMsg("Do Auto Centering ERROR\n");
  1710. }
  1711. else
  1712. {
  1713. ADC_DebugMsg("Centering Result is %s Mode.\n",
  1714. (RetValue==CENTERING_H)?"[H]":(RetValue==CENTERING_V)?"[V]":"[HV]");
  1715. }
  1716. if(bDoCentering && RetValue)
  1717. {
  1718. ADC_DetectTiming.usHstart = rcCenter.ulHStart;
  1719. ADC_DetectTiming.usVstart = rcCenter.ulVStart;
  1720. ADC_DetectTiming.usHactive = rcCenter.ulHEnd - rcCenter.ulHStart;
  1721. ADC_DetectTiming.usVactive = rcCenter.ulVEnd - rcCenter.ulVStart;
  1722. }
  1723. else if(!bDoCentering && RetValue)
  1724. {
  1725. ADC_DetectTiming.usHstart= rcCenter.ulHStart;
  1726. ADC_DetectTiming.usVstart= rcCenter.ulVStart;
  1727. ADC_DetectTiming.usHactive= ADC_InputVesaTiming.usHactive;
  1728. ADC_DetectTiming.usVactive= ADC_InputVesaTiming.usVactive;
  1729. }
  1730. ADC_DebugMsg("ADC_DetectTiming: Hstart=%d Vstart=%d Hactive=%d Vactive=%d\n", ADC_DetectTiming.usHstart, ADC_DetectTiming.usVstart, ADC_DetectTiming.usHactive, ADC_DetectTiming.usVactive);
  1731. ADC_DebugMsg("ADC_InputVesaTiming: Hstart=%d Vstart=%d Hactive=%d Vactive=%d\n", ADC_InputVesaTiming.usHstart, ADC_InputVesaTiming.usVstart, ADC_InputVesaTiming.usHactive, ADC_InputVesaTiming.usVactive);
  1732. return;
  1733. }
  1734. UINT8 ADC_FullPhaseDetected(void)
  1735. {
  1736. UINT16 VIPttl_backup = 0, VIPttl_current = 0;
  1737. UINT8 i = 0;
  1738. UINT16 array[200] = {0};
  1739. BOOL check[32] = {FALSE};
  1740. UINT32 ulTestPhase, ulPreSummation=0, ulNowSummation=0, lPhase1[32];
  1741. UINT8 ucPhaseRef=32, ucCompareTimes, ucZeroCnt, ucZeroMaxCnt, ucBest=0, ucDelay;
  1742. ADC_DebugMsg("%s\n", __FUNCTION__);
  1743. if (sAdcInfo.bInterlace)
  1744. ucCompareTimes = 2;
  1745. else
  1746. ucCompareTimes = 1;
  1747. ucComparethd = 0;
  1748. ucDelay = 0;
  1749. if(gAdcAp.bApUse == TRUE)
  1750. {
  1751. if(gAdcAp.ulTimes != 0xffffffff)
  1752. ucCompareTimes = gAdcAp.ulTimes;
  1753. if(gAdcAp.ulData != 0xffffffff)
  1754. ucComparethd = gAdcAp.ulData;
  1755. }
  1756. ADC_DebugMsg("ucCompareTimes = %d(0x%x), ucComparethd = %d(0x%x)\n", ucCompareTimes, ucCompareTimes, ucComparethd, ucComparethd);
  1757. if(gAdcAp.bApUse == TRUE && gAdcAp.ucPhase != 0xff)
  1758. {
  1759. ADC_SetPhaseDirdect(gAdcAp.ucPhase);
  1760. ADC_DelayMS(ucDelay);
  1761. ADC_ResetADI_Unlock();
  1762. ADC_DebugMsg("Sum_Cmp22Value[%2d]=%d\n", gAdcAp.ucPhase, VIP_FrameCompare(ucCompareTimes, ucComparethd));
  1763. VIPttl_backup = *((volatile UINT16*)(0xbe1cf008));
  1764. for(i = 0; i< 200 ; i++)
  1765. {
  1766. VIPttl_current = *((volatile UINT16*)(0xbe1cf008));
  1767. array[i] = (VIPttl_current > VIPttl_backup)?(VIPttl_current - VIPttl_backup):(VIPttl_backup - VIPttl_current);
  1768. //printk(KERN_EMERG" %d ", (VIPttl_current > VIPttl_backup)?(VIPttl_current - VIPttl_backup):(VIPttl_backup - VIPttl_current));
  1769. if(array[i] >= 1)
  1770. check[gAdcAp.ucPhase] = TRUE;
  1771. VIPttl_backup = VIPttl_current;
  1772. }
  1773. for(i = 0; i < 20; i++)
  1774. {
  1775. ADC_DebugMsg(" %6d %6d %6d %6d %6d %6d %6d %6d %6d %6d ",
  1776. array[i*10], array[i*10+1], array[i*10+2], array[i*10+3], array[i*10+4],
  1777. array[i*10+5], array[i*10+6], array[i*10+7], array[i*10+8], array[i*10+9]);
  1778. }
  1779. return gAdcAp.ucPhase;
  1780. }
  1781. else
  1782. {
  1783. //Frame compare result collection
  1784. for(ulTestPhase=0; ulTestPhase<ucPhaseRef; ulTestPhase++)
  1785. {
  1786. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable)
  1787. return 0;
  1788. ADC_SetPhaseDirdect((ulTestPhase<<5)/ucPhaseRef);
  1789. ADC_DelayMS(ucDelay);
  1790. ADC_ResetADI_Unlock();
  1791. lPhase1[ulTestPhase]= VIP_FrameCompare(ucCompareTimes, ucComparethd); //argument1:compare times, argument2:compare thd
  1792. ADC_DebugMsg("Sum_Cmp22Value[%2d]=%d\n", ulTestPhase, VIP_FrameCompare(ucCompareTimes, ucComparethd));
  1793. VIPttl_backup = *((volatile UINT16*)(0xbe1cf008));
  1794. for(i = 0; i< 200 ; i++)
  1795. {
  1796. VIPttl_current = *((volatile UINT16*)(0xbe1cf008));
  1797. array[i] = (VIPttl_current > VIPttl_backup)?(VIPttl_current - VIPttl_backup):(VIPttl_backup - VIPttl_current);
  1798. //printk(KERN_EMERG" %d ", (VIPttl_current > VIPttl_backup)?(VIPttl_current - VIPttl_backup):(VIPttl_backup - VIPttl_current));
  1799. if(array[i] >= 1)
  1800. check[ulTestPhase] = TRUE;
  1801. VIPttl_backup = VIPttl_current;
  1802. }
  1803. for(i = 0; i < 20; i++)
  1804. {
  1805. ADC_DebugMsg(" %6d %6d %6d %6d %6d %6d %6d %6d %6d %6d ",
  1806. array[i*10], array[i*10+1], array[i*10+2], array[i*10+3], array[i*10+4],
  1807. array[i*10+5], array[i*10+6], array[i*10+7], array[i*10+8], array[i*10+9]);
  1808. }
  1809. ADC_DebugMsg("\n");
  1810. }
  1811. }
  1812. ADC_DebugMsg("-----------------Frame compare phase detecrt result ---------------- \n");
  1813. for(ulTestPhase=0;ulTestPhase<ucPhaseRef;ulTestPhase++)
  1814. printk(KERN_EMERG"Sum of Cmp32Value[%2d] =%2d %s\n", (ulTestPhase<<5)/ucPhaseRef, lPhase1[ulTestPhase], check[ulTestPhase]?"NG":" ");
  1815. //Best phase selection
  1816. ucZeroCnt=0;
  1817. ucZeroMaxCnt=0;
  1818. for(ulTestPhase=0; ulTestPhase<ucPhaseRef; ulTestPhase++){
  1819. if( lPhase1[ulTestPhase]==0 )
  1820. ucZeroCnt++;
  1821. }
  1822. ucZeroMaxCnt=ucZeroCnt;
  1823. if(ucZeroMaxCnt == 0)
  1824. {
  1825. for(ulTestPhase=0; ulTestPhase<ucPhaseRef; ulTestPhase++){
  1826. ulNowSummation= lPhase1[ulTestPhase] ;
  1827. if(ulTestPhase==0) //First time only
  1828. {
  1829. ulPreSummation = ulNowSummation;
  1830. ucBest = ulTestPhase;
  1831. }
  1832. else //After first time
  1833. {
  1834. if( ulPreSummation>ulNowSummation )
  1835. {
  1836. ulPreSummation = ulNowSummation;
  1837. ucBest = ulTestPhase;
  1838. }
  1839. }
  1840. }
  1841. }
  1842. else
  1843. {
  1844. ucZeroCnt = 0;
  1845. for(ulTestPhase=0;ulTestPhase<ucPhaseRef;ulTestPhase++){
  1846. if(lPhase1[ulTestPhase] == 0)
  1847. ucZeroCnt++;
  1848. if(ucZeroCnt == (ucZeroMaxCnt/2+1))
  1849. {
  1850. ucBest=ulTestPhase;
  1851. break;
  1852. }
  1853. }
  1854. }
  1855. //Still input phase setting
  1856. ADC_SetPhaseDirdect(ucBest);
  1857. ADC_DebugMsg("Best Phase is %d\n", ucBest);
  1858. return ucBest;
  1859. }
  1860. UINT8 ADC_PhaseDetected(void)
  1861. {
  1862. UINT16 VIPttl_backup = 0, VIPttl_current = 0;
  1863. UINT16 array[1000] = {0};
  1864. UINT16 idx = 0, check_cnt = 0;
  1865. BOOL check[32] = {FALSE}, final_check[32] = {FALSE};
  1866. UINT32 ucPhaseRef,ulTestPhase, ulPreSummation=0, ulNowSummation=0, sum=0;
  1867. UINT8 ucBest=0, ucDelay;
  1868. UINT32 lPhase1[32];
  1869. UINT16 usInterruptStatus;
  1870. UINT8 i, j ,t, tmp;
  1871. UINT32 Temp;
  1872. UINT8 sample_cnt = 2;
  1873. ADC_DebugMsg("%s\n", __FUNCTION__);
  1874. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  1875. return 0;
  1876. usInterruptStatus = ADC_Read(ADC_REG_int_mask_byte);
  1877. if( (sAdcInfo.ucSource != Adc_kSourceVGA) && ((usInterruptStatus & 0x80) == 0x80) )
  1878. {
  1879. printk(KERN_EMERG"#### Interrupt Disabled!! Skip @ [%s] ####\n", __FUNCTION__);
  1880. return 0;
  1881. }
  1882. ADC_Write(ADC_REG_int_mask_byte, usInterruptStatus|0x80);
  1883. //Frame compare threshold
  1884. ucPhaseRef = 8;
  1885. if (sAdcInfo.bInterlace)
  1886. ucCompareTimes = 2;
  1887. else
  1888. {
  1889. if ((ADC_InputVesaTiming.ucPixelClock > 140) && (sAdcInfo.ucSource == Adc_kSourceVGA))
  1890. ucCompareTimes = 2;
  1891. else
  1892. ucCompareTimes = 1;
  1893. }
  1894. ucComparethd = 0;
  1895. ucDelay = 0; // 500*3/ADC_DetectTiming.ucVFrequency;
  1896. if(gAdcAp.bApUse == TRUE)
  1897. {
  1898. if(gAdcAp.ulTimes != 0xffffffff)
  1899. ucCompareTimes = gAdcAp.ulTimes;
  1900. if(gAdcAp.ulData != 0xffffffff)
  1901. ucComparethd = gAdcAp.ulData;
  1902. }
  1903. ADC_DebugMsg("Frame compare (Time/TH) in round 1: (%d/0x%x)\n", ucCompareTimes, ucComparethd);
  1904. if(gAdcAp.bApUse == TRUE && gAdcAp.ucPhase != 0xff)
  1905. {
  1906. ADC_SetPhaseDirdect(gAdcAp.ucPhase);
  1907. //ADC_DelayMS(ucDelay);
  1908. //argument1:compare times, argument2:compare thd
  1909. ADC_ResetADI_Unlock();
  1910. ADC_DebugMsg("Sum_Cmp22Value[%2d]=%d\n", gAdcAp.ucPhase, VIP_FrameCompare(ucCompareTimes, ucComparethd));
  1911. return gAdcAp.ucPhase;
  1912. }
  1913. else
  1914. {
  1915. //Frame compare result collection
  1916. if(bAutoAdjust == FALSE)
  1917. {
  1918. for(ulTestPhase=0; ulTestPhase<ucPhaseRef; ulTestPhase+=2)
  1919. {
  1920. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  1921. return 0;
  1922. ADC_SetPhaseDirdect((ulTestPhase<<5)/ucPhaseRef);
  1923. ADC_DelayMS(ucDelay);
  1924. ADC_ResetADI_Unlock();
  1925. lPhase1[ulTestPhase]= VIP_FrameCompare(ucCompareTimes, ucComparethd);
  1926. }
  1927. }
  1928. else
  1929. {
  1930. for(ulTestPhase=0; ulTestPhase<ucPhaseRef; ulTestPhase++)
  1931. {
  1932. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  1933. return 0;
  1934. ADC_SetPhaseDirdect((ulTestPhase<<5)/ucPhaseRef);
  1935. ADC_DelayMS(ucDelay);
  1936. ADC_ResetADI_Unlock();
  1937. lPhase1[ulTestPhase]= VIP_FrameCompare(ucCompareTimes, ucComparethd);
  1938. // Check whether horizontal total is defect.
  1939. VIPttl_backup = *((volatile UINT16*)(0xbe1cf008));
  1940. for(idx = 0; idx< 1000 ; idx++)
  1941. {
  1942. VIPttl_current = *((volatile UINT16*)(0xbe1cf008));
  1943. array[idx] = (VIPttl_current > VIPttl_backup)?(VIPttl_current - VIPttl_backup):(VIPttl_backup - VIPttl_current);
  1944. //printk(KERN_EMERG" %d ", (VIPttl_current > VIPttl_backup)?(VIPttl_current - VIPttl_backup):(VIPttl_backup - VIPttl_current));
  1945. if(array[idx] >= 1)
  1946. check[(ulTestPhase<<5)/ucPhaseRef] = TRUE;
  1947. VIPttl_backup = VIPttl_current;
  1948. }
  1949. if(check[(ulTestPhase<<5)/ucPhaseRef])
  1950. check_cnt++;
  1951. }
  1952. }
  1953. }
  1954. if(bAutoAdjust == FALSE)
  1955. {
  1956. for(ulTestPhase=0;ulTestPhase<ucPhaseRef;ulTestPhase+=2){
  1957. ADC_DebugMsg("Phase1[%2d]=%2d\n", (ulTestPhase<<5)/ucPhaseRef, lPhase1[ulTestPhase]);
  1958. }
  1959. }
  1960. else
  1961. {
  1962. ADC_DebugMsg("P1[%2d] = %8d, P1[%2d] = %8d, P1[%2d] = %8d, P1[%2d] = %8d\n",
  1963. (0<<5)/ucPhaseRef, lPhase1[0],
  1964. (1<<5)/ucPhaseRef, lPhase1[1],
  1965. (2<<5)/ucPhaseRef, lPhase1[2],
  1966. (3<<5)/ucPhaseRef, lPhase1[3]);
  1967. ADC_DebugMsg("P1[%2d] = %8d, P1[%2d] = %8d, P1[%2d] = %8d, P1[%2d] = %8d\n",
  1968. (4<<5)/ucPhaseRef, lPhase1[4],
  1969. (5<<5)/ucPhaseRef, lPhase1[5],
  1970. (6<<5)/ucPhaseRef, lPhase1[6],
  1971. (7<<5)/ucPhaseRef, lPhase1[7]);
  1972. }
  1973. if( bAutoAdjust == FALSE)
  1974. {
  1975. ucBestLocation = 0;
  1976. ulNowSummation = 0xffffffff;
  1977. for(ulTestPhase=0; ulTestPhase<8; ulTestPhase+=2)
  1978. {
  1979. if( ulNowSummation > (lPhase1[ulTestPhase] + lPhase1[(ulTestPhase+2)&0x7]))
  1980. {
  1981. ucBestLocation = ulTestPhase;
  1982. ulNowSummation = (lPhase1[ulTestPhase] + lPhase1[(ulTestPhase+2)&0x7]);
  1983. if ((lPhase1[ulTestPhase]) > (lPhase1[(ulTestPhase+2)&0x7]))
  1984. ucBest = (((ucBestLocation+2)&0x7)<<2);
  1985. else
  1986. ucBest = ((ucBestLocation&0x7)<<2);
  1987. }
  1988. }
  1989. lPhase2[(ucBestLocation<<2)] =lPhase1[ucBestLocation];
  1990. lPhase2[((ucBestLocation+2)&0x7)<<2] =lPhase1[(ucBestLocation+2)&0x7];
  1991. }
  1992. else
  1993. {
  1994. //Find the best location with the least P[n-1]+P[n]+P[n+1]
  1995. ulPreSummation=0xffffffff;
  1996. for(ulTestPhase=0; ulTestPhase<ucPhaseRef; ulTestPhase++)
  1997. {
  1998. ulNowSummation = lPhase1[(ulTestPhase-1)&(ucPhaseRef-1)] +
  1999. lPhase1[ulTestPhase] +
  2000. lPhase1[(ulTestPhase+1)&(ucPhaseRef-1)];
  2001. if( ulNowSummation<ulPreSummation )
  2002. {
  2003. ulPreSummation = ulNowSummation;
  2004. ucBestLocation = ulTestPhase;
  2005. }
  2006. }
  2007. // Fetch P1[n-2] ~ P1[n+2] for the second round
  2008. ADC_DebugMsg("Best phase may located at P[n] with the least Sum(P[n-4]+P[n]+P[n+4])\n\
  2009. => P[%d] is selected and expanded 8 to the 2nd round.\n", (ucBestLocation<<5)/ucPhaseRef);
  2010. // P2[Q0] = P1[n-2]
  2011. lPhase2[0] = lPhase1[(ucBestLocation-sample_cnt) & (ucPhaseRef-1)];
  2012. // P2[Q1] = P1[n-1]
  2013. lPhase2[ sample_cnt * (32/ucPhaseRef) - (32/ucPhaseRef)] = lPhase1[(ucBestLocation-1) & (ucPhaseRef-1)];
  2014. // P2[Q2] = P1[n]
  2015. lPhase2[ sample_cnt * (32/ucPhaseRef)] = lPhase1[ucBestLocation];
  2016. // P2[Q3] = P1[n+1]
  2017. lPhase2[ sample_cnt * (32/ucPhaseRef) + (32/ucPhaseRef)] = lPhase1[(ucBestLocation+1) & (ucPhaseRef-1)];
  2018. // P2[Q4] = P1[n+2]
  2019. lPhase2[ sample_cnt * (32/ucPhaseRef<<1)] = lPhase1[(ucBestLocation+sample_cnt) & (ucPhaseRef-1)];
  2020. ADC_DebugMsg("Frame compare TH in round 2: 0x%x\n", ucComparethd);
  2021. for(ulTestPhase=0; ulTestPhase<= sample_cnt * (32/ucPhaseRef*2); ulTestPhase++)
  2022. {
  2023. if( (ulTestPhase % (32/ucPhaseRef)) == 0 )
  2024. continue;
  2025. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  2026. return 0;
  2027. ADC_SetPhaseDirdect((ulTestPhase + ((ucBestLocation-sample_cnt)<<5)/ucPhaseRef) & 0x1f);
  2028. ADC_DelayMS(ucDelay);
  2029. ADC_ResetADI_Unlock();
  2030. lPhase2[ulTestPhase]= VIP_FrameCompare(ucCompareTimes, ucComparethd); //argument1:compare times, argument2:compare thd
  2031. // Check whether horizontal total is defect.
  2032. VIPttl_backup = *((volatile UINT16*)(0xbe1cf008));
  2033. for(idx = 0; idx< 1000 ; idx++)
  2034. {
  2035. VIPttl_current = *((volatile UINT16*)(0xbe1cf008));
  2036. array[idx] = (VIPttl_current > VIPttl_backup)?(VIPttl_current - VIPttl_backup):(VIPttl_backup - VIPttl_current);
  2037. //printk(KERN_EMERG" %d ", (VIPttl_current > VIPttl_backup)?(VIPttl_current - VIPttl_backup):(VIPttl_backup - VIPttl_current));
  2038. if(array[idx] >= 1)
  2039. check[(ulTestPhase + ((ucBestLocation-sample_cnt)<<5)/ucPhaseRef) & 0x1f] = TRUE;
  2040. VIPttl_backup = VIPttl_current;
  2041. }
  2042. if(check[(ulTestPhase + ((ucBestLocation-sample_cnt)<<5)/ucPhaseRef) & 0x1f])
  2043. check_cnt++;
  2044. }
  2045. for(ulTestPhase=0; ulTestPhase<= sample_cnt * (32/ucPhaseRef*2); ulTestPhase++)
  2046. {
  2047. ADC_DebugMsg("P2[%2d] = %8ld %s\n", (ulTestPhase + ((ucBestLocation-sample_cnt)<<5)/ucPhaseRef) & 0x1f,
  2048. lPhase2[ulTestPhase],
  2049. (check[(ulTestPhase + ((ucBestLocation-sample_cnt)<<5)/ucPhaseRef) & 0x1f])?"NG":" " );
  2050. sum = sum + lPhase2[ulTestPhase];
  2051. ucBestPhase[ulTestPhase]=(ulTestPhase + ((ucBestLocation-sample_cnt)<<5)/ucPhaseRef) & 0x1f;
  2052. }
  2053. if(sum != 0)
  2054. {
  2055. ADC_DebugMsg("Best Phase average Sum=%d\n", sum / ((sample_cnt * (32/ucPhaseRef*2)+1)) );
  2056. }
  2057. // Extending the skipping range according to the checked number of defect phase.
  2058. // For only one defect phase, mark itself and neighboring two, i.e. [n-2]~[n+2];
  2059. // Otherwise, mark itself and neighboring one, i.e. [n-1]~[n+1].
  2060. for(idx=0; idx<32; idx++)
  2061. {
  2062. if(check[idx])
  2063. {
  2064. // Defect phase itself
  2065. final_check[idx] = TRUE;
  2066. // Defect phase neighbor with distance 1
  2067. final_check[(idx+1)%32] = TRUE;
  2068. if(idx < 1)
  2069. final_check[31+idx] = TRUE;
  2070. else
  2071. final_check[(idx-1)%32] = TRUE;
  2072. ADC_DebugMsg(KERN_EMERG"Extending P[%d] with distance = 1 to P[%d] and P[%d]\n", idx
  2073. , (idx+1)%32 ,(idx < 1)?(31+idx):((idx-1)%32) );
  2074. // Defect phase neighbor with distance 2
  2075. if(check_cnt == 1)
  2076. {
  2077. final_check[(idx+2)%32] = TRUE;
  2078. if(idx < 2)
  2079. final_check[30+idx] = TRUE;
  2080. else
  2081. final_check[(idx-2)%32] = TRUE;
  2082. ADC_DebugMsg(KERN_EMERG"Extending P[%d] with distance = 2 to P[%d] and P[%d]\n", idx
  2083. , (idx+2)%32 ,(idx < 1)?(30+idx):((idx-2)%32) );
  2084. }
  2085. }
  2086. }
  2087. //Best phase selection => Sorting ucBestPhase
  2088. for(i = 0;i < sample_cnt * (32/ucPhaseRef*2); i++)
  2089. {
  2090. for(j = i+1;j <= sample_cnt * (32/ucPhaseRef*2); j++)
  2091. {
  2092. if(final_check[ucBestPhase[j]])
  2093. continue;
  2094. t=i;
  2095. if( (lPhase2[t] > lPhase2[j]) || final_check[ucBestPhase[i]] )
  2096. {
  2097. t=j;
  2098. }
  2099. if(t !=i)
  2100. {
  2101. Temp=lPhase2[t];
  2102. lPhase2[t] = lPhase2[i];
  2103. lPhase2[i] = Temp;
  2104. tmp = ucBestPhase[t];
  2105. ucBestPhase[t] = ucBestPhase[i];
  2106. ucBestPhase[i] = tmp;
  2107. }
  2108. }
  2109. }
  2110. /*
  2111. for(i = 0;i <= sample_cnt * (32/ucPhaseRef*2); i++)
  2112. {
  2113. ADC_DebugMsg("Best Phase Ranking No.%d = P[%d] %s\n", i+1, ucBestPhase[i], final_check[ucBestPhase[i]]?"NG":" ");
  2114. }
  2115. */
  2116. ADC_DebugMsg("Best Phase Ranking \n No.1 = P[%d], No.2 = P[%d], No.3 = P[%d], No.4 = P[%d]",
  2117. ucBestPhase[0], ucBestPhase[1], ucBestPhase[2], ucBestPhase[3]);
  2118. ucBest=ucBestPhase[0] ;
  2119. ucBestPhaseIndex=0;
  2120. }
  2121. //Still input phase setting
  2122. ADC_SetPhaseDirdect(ucBest);
  2123. ADC_DelayMS(ucDelay); //Set phase would be unstable. Wait pll stable.
  2124. ADC_ResetADI_Unlock();
  2125. ADC_DebugMsg("Best Phase=%d\n", ucBest);
  2126. if( bAutoAdjust == FALSE)
  2127. {
  2128. if (sAdcInfo.ucSource == Adc_kSourceVGA)
  2129. {
  2130. if( g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr ].ucPixelClock > 130 )
  2131. ADC_PhaseDetectedSecond();
  2132. }
  2133. else if(sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  2134. {
  2135. if( g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr ].ucPixelClock > 60 )
  2136. ADC_PhaseDetectedSecond();
  2137. }
  2138. }
  2139. ADC_Clear_Interrupt(0x80);
  2140. ADC_Write(ADC_REG_int_mask_byte, usInterruptStatus);
  2141. usVIPHttlMin = usVIPHttlMax = *((volatile UINT16*)(0xbe1cf008));
  2142. return ucBest;
  2143. }
  2144. void ADC_PhaseDetectedSecond(void)
  2145. {
  2146. UINT8 ucBest, i,j,t, tmp;//ulTestPhase,
  2147. INT32 Temp;
  2148. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  2149. return;
  2150. ADC_SetPhaseDirdect(((ucBestLocation<<2)+2));
  2151. ADC_ResetADI_Unlock();
  2152. lPhase2[(ucBestLocation<<2)+2] =VIP_FrameCompare(ucCompareTimes, ucComparethd);
  2153. ucBestPhase[1]=(ucBestLocation<<2)+2;
  2154. ADC_SetPhaseDirdect(((ucBestLocation<<2)+4));
  2155. ADC_ResetADI_Unlock();
  2156. lPhase2[(ucBestLocation<<2)+4] =VIP_FrameCompare(ucCompareTimes, ucComparethd);
  2157. ucBestPhase[2]=(ucBestLocation<<2)+4;
  2158. ADC_SetPhaseDirdect(((ucBestLocation<<2)+6));
  2159. ADC_ResetADI_Unlock();
  2160. lPhase2[(ucBestLocation<<2)+6] =VIP_FrameCompare(ucCompareTimes, ucComparethd);
  2161. ucBestPhase[3]=(ucBestLocation<<2)+6;
  2162. ADC_DebugMsg("Between phase[%d] & phase[%d]\n", (ucBestLocation<<2), ((ucBestLocation+2)&0x7)<<2);
  2163. ADC_DebugMsg("Sum_Cmp32Value[%d] =%ld\n", (ucBestLocation<<2), lPhase2[ (ucBestLocation<<2)]);
  2164. ADC_DebugMsg("Sum_Cmp32Value[%d] =%ld\n", (ucBestLocation<<2)+2, lPhase2[ (ucBestLocation<<2)+2]);
  2165. ADC_DebugMsg("Sum_Cmp32Value[%d] =%ld\n", (ucBestLocation<<2)+4, lPhase2[ (ucBestLocation<<2)+4]);
  2166. ADC_DebugMsg("Sum_Cmp32Value[%d] =%ld\n", (ucBestLocation<<2)+6, lPhase2[ (ucBestLocation<<2)+6]);
  2167. ADC_DebugMsg("Sum_Cmp32Value[%d] =%ld\n", ((ucBestLocation+2)&0x7)<<2, lPhase2[ (((ucBestLocation+2)&0x7)<<2)]);
  2168. ucBestPhase[4]= (((ucBestLocation+2)&0x7)<<2);
  2169. ucBest = (ucBestLocation<<2);
  2170. tmp = lPhase2[(ucBestLocation<<2)];
  2171. ucBestPhase[0]=ucBest ;
  2172. for(i = 0;i < 5; i++)
  2173. {
  2174. for(j = i+1;j < 5; j++)
  2175. {
  2176. t=i;
  2177. if(lPhase2[ucBestPhase[t]] > lPhase2[ucBestPhase[j]])
  2178. {
  2179. t=j;
  2180. }
  2181. if(t!=i)
  2182. {
  2183. Temp=lPhase2[t];
  2184. lPhase2[t] = lPhase2[i];
  2185. lPhase2[i] = Temp;
  2186. tmp = ucBestPhase[i];
  2187. ucBestPhase[i] = ucBestPhase[j];
  2188. ucBestPhase[j] = tmp;
  2189. }
  2190. }
  2191. }
  2192. ucBest=ucBestPhase[0] ;
  2193. ucBestPhaseIndex=0;
  2194. for(i = 0;i < 5; i++)
  2195. {
  2196. ADC_DebugMsg("Best Phase[%d]=%d\n", i, ucBestPhase[i]);
  2197. }
  2198. //Still input phase setting
  2199. ADC_SetPhaseDirdect(ucBest);
  2200. ADC_ResetADI_Unlock();
  2201. ADC_DebugMsg("Best Phase=%d\n", ucBest);
  2202. }
  2203. BOOL ADC_DoAuto(UINT8 ucPath, BOOL bEnable, UINT8 ucMode)
  2204. {
  2205. BOOL RetValue=TRUE;
  2206. UINT8 value = 0;
  2207. //fix system handup if no signal or unsupported mode
  2208. if((sAdcInfo.ucInputMode == UNSUPPORT_MODE) || (sAdcInfo.ucInputMode == NOSIGNAL_MODE))
  2209. return FALSE;
  2210. if (bEnable)
  2211. {
  2212. // if ((ADC_InputVesaTiming.ucPixelClock > 140) && (sAdcInfo.ucSource == Adc_kSourceVGA))
  2213. bAutoAdjust = TRUE;
  2214. sAdcInfo.ucUserPhase = ADC_PhaseDetected();
  2215. // if ((ADC_InputVesaTiming.ucPixelClock > 140) && (sAdcInfo.ucSource == Adc_kSourceVGA))
  2216. bAutoAdjust = FALSE;
  2217. }
  2218. else
  2219. ADC_SetPhaseDirdect(sAdcInfo.ucUserPhase);
  2220. if ((sAdcInfo.ucSource == Adc_kSourceVGA) || (ucMode == 2)) //"ucMode=2" is a special case, it means PC & YPP sources can all do centering in factory mode
  2221. {
  2222. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  2223. return 0;
  2224. if (ucMode == 2)
  2225. {
  2226. ucMode = 1; //"ucMode=0" means tune only Hstart & Vstart values; "ucMode=1" means tune all Hstart & Vstart & Hactive & Vactive values
  2227. }
  2228. ADC_Centering(FALSE);
  2229. noticekmf(KMF2UMF_EVID_ADC, KMF2UMF_EVTYPE_ADC_PCSETUPDATE, &value, 1);
  2230. }
  2231. return RetValue;
  2232. }
  2233. void ADC_TimerWork(void *unuse)
  2234. {
  2235. if(ADCTimerInfo[TimerSignaloff][1] == 1)
  2236. {
  2237. ADC_Write(ADC_REG_cs2_sog_rst, 0x3);
  2238. ADC_Write(ADC_REG_cs2_sog_rst, 0x0);
  2239. }
  2240. sAdcInfo.bTimerHandlerBusy=FALSE;
  2241. }
  2242. void ADC_InterruptProcess(void *unuse)
  2243. {
  2244. volatile UINT16 ucLowWidth, ucLineWidth;
  2245. if( ADC_Read(ADC_REG_dbg_temp)& BIT4 )
  2246. {
  2247. // ADC_DebugMsg("Skip InterruptProcess\n");
  2248. return;
  2249. }
  2250. sAdcInfo.bInterruptHappen = TRUE;
  2251. sAdcInfo.bInterruptHappenAgain = FALSE;
  2252. switch( sAdcInfo.ucInterruptEvent )
  2253. {
  2254. case CheckSogWidth:
  2255. ADC_DelayMS(1000/(ADC_DetectTiming.ucVFrequency+1));
  2256. if( sAdcInfo.bInterruptHappenAgain || sAdcInfo.bModeDetection || sAdcInfo.bModeChange )
  2257. return;
  2258. ADC_SOG_Slicer_Backup();
  2259. ADC_DelayMS(1000/(ADC_DetectTiming.ucVFrequency+1));
  2260. if( sAdcInfo.bInterruptHappenAgain || sAdcInfo.bModeDetection || sAdcInfo.bModeChange )
  2261. return;
  2262. ucLineWidth = ADC_Read(ADC_STA_line_wdth);
  2263. ucLowWidth = ADC_Read(ADC_STA_low_wdth);
  2264. if( abs(sAdcInfo.ucRegLowWidth-ucLowWidth)>15 ||
  2265. abs(sAdcInfo.ucRegLineWidth-ucLineWidth)!=0 )
  2266. {
  2267. printk(KERN_EMERG "[2] Mode change \n");
  2268. printk(KERN_EMERG "RegLowWidth=%d, ADC_STA_low_width=%d\n", sAdcInfo.ucRegLowWidth, ucLowWidth);
  2269. printk(KERN_EMERG "RegLineWidth=%d, ADC_STA_line_width=%d\n", sAdcInfo.ucRegLineWidth, ucLineWidth);
  2270. ADC_SyncDetectCreate();
  2271. return;
  2272. }
  2273. ADC_DelayMS(1000/(ADC_DetectTiming.ucVFrequency+1)*2);
  2274. if( sAdcInfo.bInterruptHappenAgain || sAdcInfo.bModeDetection || sAdcInfo.bModeChange)
  2275. return;
  2276. break;
  2277. case HandlerHSOut:
  2278. break;
  2279. case ResetCoast:
  2280. ADC_Coast_Gen_Backup();
  2281. break;
  2282. case CheckSyncStable:
  2283. do{
  2284. if(sAdcInfo.bInterruptHappenAgain || sAdcInfo.bModeDetection || sAdcInfo.bModeChange)
  2285. return;
  2286. if (VIP_InputActiveDetect(EXTS)!=0x0f)
  2287. ADC_DelayMS(16);
  2288. else
  2289. break;
  2290. }while(sAdcInfo.bInterruptHappen);
  2291. break;
  2292. }
  2293. if( sAdcInfo.bInterruptHappenAgain==FALSE && sAdcInfo.bModeDetection==FALSE && sAdcInfo.bModeChange==FALSE )
  2294. {
  2295. if( sAdcInfo.bSyncDetection==FALSE )
  2296. {
  2297. if ( sAdcInfo.ucInputMode == UNSUPPORT_MODE)
  2298. VIP_NoticeModeNotSupport(EXTS, ENABLE);
  2299. else if (sAdcInfo.ucInputMode == NOSIGNAL_MODE)
  2300. VIP_NoticeModeNotSupport(EXTS, DISABLE);
  2301. else
  2302. {
  2303. ADC_ScreenMode(NormalScreen);
  2304. VIP_SetAutoTuneStatus(TRUE);
  2305. }
  2306. }
  2307. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  2308. {
  2309. ADCTimerInfo[TimerVsyncloss][1] = 1;
  2310. ADC_Interrupt(ENABLE, 0x7030);
  2311. }
  2312. else
  2313. {
  2314. ADC_Interrupt(ENABLE, 0x478f);
  2315. ADCTimerInfo[TimerModeChange][1] = 1;
  2316. }
  2317. }
  2318. sAdcInfo.bInterruptHappen = FALSE;
  2319. }
  2320. void ADC_SearchDigitalOffset(void)
  2321. {
  2322. VIP_RECT rcRect;
  2323. UINT8 ucColor, ucStep;
  2324. UINT32 ulCurrentOffset[MaxColor], ulBestOffset[MaxColor];
  2325. UINT32 ulTargetValue[MaxColor], ulOutputValue[MaxColor], ulCurrentDelta;
  2326. #ifdef CONFIG_SUPPORT_DEBUG_MESSAGE
  2327. UINT8 ulMaxTime = 9, ucTotalCnt;
  2328. WBDbgMsg OffsetDebug[MaxColor][ulMaxTime];
  2329. #endif
  2330. BOOL bFound[MaxColor];
  2331. UINT32 AvgOffset[MaxColor] = {0};
  2332. UINT32 loop_time = 0, MaxAvgTime = 3;
  2333. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  2334. if((sAdcInfo.ucInputMode == UNSUPPORT_MODE) || (sAdcInfo.ucInputMode == NOSIGNAL_MODE) || (sAdcInfo.ucInputMode == UNSTABLE_MODE))
  2335. {
  2336. return ;
  2337. }
  2338. /// Setup target values and an rectangle AWB region for calculating compenstaion.
  2339. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  2340. {
  2341. ulTargetValue[RED] = OffsetRGBTarget;
  2342. ulTargetValue[GREEN] = OffsetRGBTarget;
  2343. ulTargetValue[BLUE] = OffsetRGBTarget;
  2344. if( sAdcInfo.bHpol==1 )
  2345. rcRect.ulHStart = ADC_InputVesaTiming.usHs_Width + ((ADC_DetectTiming.usHstart-ADC_InputVesaTiming.usHs_Width)*3)/4;
  2346. else
  2347. rcRect.ulHStart = ((ADC_DetectTiming.usHstart)*3)/4;
  2348. rcRect.ulHEnd = rcRect.ulHStart + 10*iEnlargeWidthRate;
  2349. rcRect.ulVStart = ADC_InputVesaTiming.usVstart;
  2350. rcRect.ulVEnd = ADC_InputVesaTiming.usVstart + ADC_InputVesaTiming.usVactive;
  2351. }
  2352. else
  2353. {
  2354. ulTargetValue[GREEN] = OffsetYTarget;
  2355. ulTargetValue[RED] = OffsetCbCrTarget;
  2356. ulTargetValue[BLUE] = OffsetCbCrTarget;
  2357. rcRect.ulHStart = ADC_InputVesaTiming.usHs_Width + ((ADC_InputVesaTiming.usHstart-ADC_InputVesaTiming.usHs_Width)*3)/4;
  2358. rcRect.ulHEnd = rcRect.ulHStart + 10*iEnlargeWidthRate;
  2359. rcRect.ulVStart = ADC_InputVesaTiming.usVstart + ADC_InputVesaTiming.usVactive/4;
  2360. rcRect.ulVEnd = ADC_InputVesaTiming.usVstart + ADC_InputVesaTiming.usVactive*3/4;
  2361. }
  2362. if( gAdcAp.bApUse && gAdcAp.ulApPosition!=0xffffffff )
  2363. {
  2364. rcRect.ulHStart = gAdcAp.ulApPosition;
  2365. rcRect.ulHEnd = rcRect.ulHStart+21;
  2366. }
  2367. if(gAdcAp.bApUse)
  2368. {
  2369. for(ucColor = RED; ucColor<MaxColor; ucColor++)
  2370. if(gAdcAp.ulTargetValue[ucColor] != 0xffffffff)
  2371. ulTargetValue[ucColor] = gAdcAp.ulTargetValue[ucColor]*4*10;
  2372. }
  2373. ADC_DebugMsg("HStart=%d HEnd=%d VStart=%d VEnd=%d\n", rcRect.ulHStart, rcRect.ulHEnd, rcRect.ulVStart, rcRect.ulVEnd);
  2374. ADC_DebugMsg("TargetValue[R,G,B]=(%d,%d,%d)\n", ulTargetValue[RED], ulTargetValue[GREEN], ulTargetValue[BLUE]);
  2375. ADC_Write(ADC_REG_beofst_en0, 1);
  2376. for(ucColor = RED; ucColor<MaxColor; ucColor++)
  2377. {
  2378. ulCurrentOffset[ucColor] = 0x0;
  2379. ulBestOffset[ucColor] = 0x0;
  2380. bFound[ucColor] = FALSE;
  2381. }
  2382. sAdcInfo.bAutoOffset = TRUE;
  2383. ucStep = 0;
  2384. while(bFound[RED]==FALSE || bFound[GREEN]==FALSE || bFound[BLUE]==FALSE)
  2385. {
  2386. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  2387. break;
  2388. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  2389. {
  2390. if(bFound[ucColor] == FALSE)
  2391. ADC_SetOffsetDirdect(ucColor, ulCurrentOffset[ucColor]);
  2392. }
  2393. /// Calcultate average offset value of the next three sample points.
  2394. for(loop_time = 0; loop_time < MaxAvgTime ; loop_time++ )
  2395. {
  2396. VIP_simulate_Compensation_function(rcRect, &ulOutputValue[RED], &ulOutputValue[GREEN], &ulOutputValue[BLUE]);
  2397. for(ucColor = RED; ucColor<MaxColor; ucColor++)
  2398. AvgOffset[ucColor] += ulOutputValue[ucColor];
  2399. }
  2400. for(ucColor = RED; ucColor<MaxColor; ucColor++)
  2401. AvgOffset[ucColor] = AvgOffset[ucColor] / MaxAvgTime;
  2402. ADC_DebugMsg(" AvgOffset[R] = %d, AvgOffset[G] = %d, AvgOffset[B] = %d \n",
  2403. AvgOffset[RED],AvgOffset[GREEN],AvgOffset[BLUE]);
  2404. /// Calculate the best gain by formula in 0.1 precision.
  2405. ADC_DebugMsg("Calculate in 0.1 precision\n => Best Offset = (Delta * 512) / (512 + Gain) / 10 \n ");
  2406. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  2407. {
  2408. if(bFound[ucColor] == FALSE)
  2409. {
  2410. ulCurrentDelta = abs(AvgOffset[ucColor] - ulTargetValue[ucColor]);
  2411. #ifdef CONFIG_SUPPORT_DEBUG_MESSAGE
  2412. OffsetDebug[ucColor][ucStep].ulCurrentSearch = ulCurrentOffset[ucColor];
  2413. OffsetDebug[ucColor][ucStep].ulCurrentSearchValue = AvgOffset[ucColor];
  2414. OffsetDebug[ucColor][ucStep].ulDelta= ulCurrentDelta;
  2415. #endif
  2416. if (ulTargetValue[ucColor] > AvgOffset[ucColor])
  2417. {
  2418. if (ucColor==RED)
  2419. ADC_Write(ADC_REG_dofst_r, 0x1);
  2420. else if(ucColor==GREEN)
  2421. ADC_Write(ADC_REG_dofst_g, 0x1);
  2422. else if(ucColor==BLUE)
  2423. ADC_Write(ADC_REG_dofst_b, 0x1);
  2424. }
  2425. else
  2426. {
  2427. if (ucColor==RED)
  2428. ADC_Write(ADC_REG_dofst_r, 0x0);
  2429. else if(ucColor==GREEN)
  2430. ADC_Write(ADC_REG_dofst_g, 0x0);
  2431. else if(ucColor==BLUE)
  2432. ADC_Write(ADC_REG_dofst_b, 0x0);
  2433. }
  2434. ulBestOffset[ucColor] = ulCurrentDelta * 512 / ( ADC_GetGain(ucColor) + 512 ) / 10;
  2435. bFound[ucColor] = TRUE;
  2436. }
  2437. else
  2438. {
  2439. #ifdef CONFIG_SUPPORT_DEBUG_MESSAGE
  2440. OffsetDebug[ucColor][ucStep].ulCurrentSearch = 0;
  2441. OffsetDebug[ucColor][ucStep].ulCurrentSearchValue = 0;
  2442. OffsetDebug[ucColor][ucStep].ulDelta= 0;
  2443. #endif
  2444. }
  2445. }
  2446. ucStep++;
  2447. }
  2448. sAdcInfo.bAutoOffset = FALSE;
  2449. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  2450. ADC_SetOffsetDirdect(ucColor, ulBestOffset[ucColor]);
  2451. #ifdef CONFIG_SUPPORT_DEBUG_MESSAGE
  2452. ucTotalCnt = ucStep;
  2453. ADC_DebugMsg("--- Search Offset ---\n");
  2454. ADC_DebugMsg(" Color Offset Target Gain Delta AvgOffset Best\n");
  2455. for(ucColor = RED; ucColor<MaxColor; ucColor++)
  2456. {
  2457. for(ucStep=0; ucStep<ucTotalCnt; ucStep++)
  2458. COLOR_PRINT(ucColor," [%s] %3d %4d %3d %4d %4d %3d",
  2459. (ucColor==RED)?"R":(ucColor==GREEN)?"G":"B",
  2460. OffsetDebug[ucColor][ucStep].ulCurrentSearch,
  2461. ulTargetValue[ucColor],
  2462. ADC_GetGain(ucColor),
  2463. OffsetDebug[ucColor][ucStep].ulDelta,
  2464. OffsetDebug[ucColor][ucStep].ulCurrentSearchValue,
  2465. ulBestOffset[ucColor] );
  2466. //COLOR_PRINT(ucColor,"Best Offset[%s]=%d\n",(ucColor==RED)?"RED":(ucColor==GREEN)?"GREEN":"BLUE", ulBestOffset[ucColor]);
  2467. }
  2468. #endif
  2469. }
  2470. void ADC_UpdateWBOSDvalue(void)
  2471. {
  2472. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  2473. //Gain
  2474. ADCCalibrate_OSDGainOffset.scOSDRGainValue=ADC_GetGain(RED);
  2475. ADCCalibrate_OSDGainOffset.scOSDGGainValue=ADC_GetGain(GREEN);
  2476. ADCCalibrate_OSDGainOffset.scOSDBGainValue=ADC_GetGain(BLUE);
  2477. //Offset
  2478. if(ADC_Read(ADC_REG_dofst_r) == 1)
  2479. ADCCalibrate_OSDGainOffset.scOSDROffsetValue=(INT16)(ADC_GetOffset(RED) + 255);
  2480. else
  2481. ADCCalibrate_OSDGainOffset.scOSDROffsetValue=(INT16)(abs(ADC_GetOffset(RED) - 255));
  2482. if(ADC_Read(ADC_REG_dofst_g) == 1)
  2483. ADCCalibrate_OSDGainOffset.scOSDGOffsetValue=(INT16)(ADC_GetOffset(GREEN) + 255);
  2484. else
  2485. ADCCalibrate_OSDGainOffset.scOSDGOffsetValue=(INT16)(abs(ADC_GetOffset(GREEN) - 255));
  2486. if(ADC_Read(ADC_REG_dofst_b) == 1)
  2487. ADCCalibrate_OSDGainOffset.scOSDBOffsetValue=(INT16)(ADC_GetOffset(BLUE) + 255);
  2488. else
  2489. ADCCalibrate_OSDGainOffset.scOSDBOffsetValue=(INT16)(abs(ADC_GetOffset(BLUE) - 255));
  2490. #ifdef CONFIG_SUPPORT_DEBUG_MESSAGE
  2491. COLOR_PRINT(RED,"OSD R-gain = %d, R-offset = %d (255 %s BestOffset[R])",
  2492. ADCCalibrate_OSDGainOffset.scOSDRGainValue,
  2493. ADCCalibrate_OSDGainOffset.scOSDROffsetValue,
  2494. ADC_Read(ADC_REG_dofst_r)?"+":"-");
  2495. COLOR_PRINT(GREEN,"OSD G-gain = %d, G-offset = %d (255 %s BestOffset[G])",
  2496. ADCCalibrate_OSDGainOffset.scOSDGGainValue,
  2497. ADCCalibrate_OSDGainOffset.scOSDGOffsetValue,
  2498. ADC_Read(ADC_REG_dofst_g)?"+":"-");
  2499. COLOR_PRINT(BLUE,"OSD B-gain = %d, B-offset = %d (255 %s BestOffset[B])",
  2500. ADCCalibrate_OSDGainOffset.scOSDBGainValue,
  2501. ADCCalibrate_OSDGainOffset.scOSDBOffsetValue,
  2502. ADC_Read(ADC_REG_dofst_b)?"+":"-");
  2503. #endif
  2504. }
  2505. void ADC_AutoColorCalibration(void)
  2506. {
  2507. BOOL bSource_sel = FALSE;
  2508. UINT8 value =0;
  2509. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  2510. //if no signal or unsupported mode
  2511. if((sAdcInfo.ucInputMode == 0xf) ||(sAdcInfo.ucInputMode == UNSUPPORT_MODE) || (sAdcInfo.ucInputMode == NOSIGNAL_MODE) || (sAdcInfo.ucInputMode == UNSTABLE_MODE))
  2512. {
  2513. ADC_DebugMsg("sAdcInfo.ucInputMode = %d\n", sAdcInfo.ucInputMode);
  2514. return ;
  2515. }
  2516. //because only one vsync, set to "original signal" replace "regeneration signal"
  2517. if( ADC_Read(ADC_REG_source_sel)== 0x1 )
  2518. {
  2519. bSource_sel = TRUE;
  2520. ADC_Write(ADC_REG_source_sel, 0x2);
  2521. }
  2522. if((sAdcInfo.ucInputMode == 0xf) ||(sAdcInfo.ucInputMode == UNSUPPORT_MODE) || (sAdcInfo.ucInputMode == NOSIGNAL_MODE) || (sAdcInfo.ucInputMode == UNSTABLE_MODE))
  2523. {
  2524. ADC_DebugMsg("sAdcInfo.ucInputMode = %d\n", sAdcInfo.ucInputMode);
  2525. return ;
  2526. }
  2527. if (bAutoWB == TRUE)
  2528. ADC_SearchGain(FALSE);
  2529. else
  2530. ADC_FirstTimeSearchGain();
  2531. ADC_DelayMS(1);
  2532. ADC_DebugMsg("sAdcInfo.ucInputMode = %d\n", sAdcInfo.ucInputMode);
  2533. if((sAdcInfo.ucInputMode == 0xf) ||(sAdcInfo.ucInputMode == UNSUPPORT_MODE) || (sAdcInfo.ucInputMode == NOSIGNAL_MODE) || (sAdcInfo.ucInputMode == UNSTABLE_MODE))
  2534. {
  2535. return ;
  2536. }
  2537. ADC_SearchDigitalOffset();
  2538. if( bSource_sel == TRUE)
  2539. ADC_Write(ADC_REG_source_sel, 0x1);
  2540. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  2541. return;
  2542. ADC_UpdateWBOSDvalue();
  2543. ADCCalibrate_OSDGainOffset.bResult=TRUE; //??
  2544. bAutoColorCalibrationDone =TRUE;
  2545. if(!sAdcInfo.bWBUpdate)
  2546. noticekmf(KMF2UMF_EVID_ADC, KMF2UMF_EVTYPE_ADC_WHITEBALANCE, &value,1); //NULL
  2547. }
  2548. void ADC_FirstTimeSearchGain(void)
  2549. {
  2550. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  2551. if ( Source[sAdcInfo.ucSource].bFirstTime )
  2552. {
  2553. ADC_DebugMsg("[%d] First time search gain value... \n", sAdcInfo.ucSource);
  2554. ADC_SearchGain(FALSE);
  2555. if (ADC_CheckGainValue( ADC_GetGain(RED) ) || ADC_CheckGainValue( ADC_GetGain(GREEN) ) || ADC_CheckGainValue( ADC_GetGain(BLUE) ))
  2556. {
  2557. ADC_DebugMsg("[%d] Retry search gain value ... \n", sAdcInfo.ucSource);
  2558. ADC_DebugMsg("OSD R-gain=%d\n", Source[sAdcInfo.ucSource].scFirstTimeSearchRGainValue);
  2559. ADC_DebugMsg("OSD G-gain=%d\n", Source[sAdcInfo.ucSource].scFirstTimeSearchGGainValue);
  2560. ADC_DebugMsg("OSD B-gain=%d\n", Source[sAdcInfo.ucSource].scFirstTimeSearchBGainValue);
  2561. Source[sAdcInfo.ucSource].bFirstTime = TRUE;
  2562. }
  2563. else
  2564. {
  2565. Source[sAdcInfo.ucSource].scFirstTimeSearchRGainValue=ADC_GetGain(RED);
  2566. Source[sAdcInfo.ucSource].scFirstTimeSearchGGainValue=ADC_GetGain(GREEN);
  2567. Source[sAdcInfo.ucSource].scFirstTimeSearchBGainValue=ADC_GetGain(BLUE);
  2568. Source[sAdcInfo.ucSource].bFirstTime = FALSE;
  2569. }
  2570. }
  2571. else
  2572. {
  2573. ADC_DebugMsg("[%d] Don't not search gain, set gain value... \n", sAdcInfo.ucSource);
  2574. ADC_DebugMsg("OSD R-gain=%d\n", Source[sAdcInfo.ucSource].scFirstTimeSearchRGainValue);
  2575. ADC_DebugMsg("OSD G-gain=%d\n", Source[sAdcInfo.ucSource].scFirstTimeSearchGGainValue);
  2576. ADC_DebugMsg("OSD B-gain=%d\n", Source[sAdcInfo.ucSource].scFirstTimeSearchBGainValue);
  2577. ADC_SetGainDirdect(RED, Source[sAdcInfo.ucSource].scFirstTimeSearchRGainValue);
  2578. ADC_SetGainDirdect(GREEN, Source[sAdcInfo.ucSource].scFirstTimeSearchGGainValue);
  2579. ADC_SetGainDirdect(BLUE, Source[sAdcInfo.ucSource].scFirstTimeSearchBGainValue);
  2580. }
  2581. }
  2582. BOOL ADC_CheckGainValue(UINT16 scValue)
  2583. {
  2584. ADC_DebugMsg("[%s] Check value = %d \n", __FUNCTION__, scValue);
  2585. if ((scValue <= 0) || (scValue == 252) || (scValue >= 511))
  2586. return TRUE;
  2587. else
  2588. return FALSE;
  2589. }
  2590. void ADC_SyncDetection(void *unuse)
  2591. {
  2592. UINT8 retval;
  2593. UINT8 value = 0;
  2594. UINT8 ucPixelClock = 0;
  2595. UINT16 usHTotal = 0;
  2596. BOOL AutoAdjustStatus = FALSE;
  2597. ADC_Clear_Interrupt(0xffff);
  2598. do{
  2599. if(!sAdcInfo.bADCEnable)
  2600. break;
  2601. sAdcInfo.bSyncDetection=TRUE;
  2602. sAdcInfo.bModeDetection=TRUE;
  2603. bCheckVIPHttl = FALSE;
  2604. bAutoColorCalibrationDone =FALSE;
  2605. ADC_Interrupt(DISABLE, 0);
  2606. #ifdef DRV_ENABLE_CVD2
  2607. if (sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  2608. {
  2609. if(ucCVD2PowerEnable==TRUE)
  2610. {
  2611. DRV_CVD2_Power_Setting(FALSE); //component cc will open cvd2
  2612. ucCVD2PowerEnable=FALSE;
  2613. }
  2614. }
  2615. #endif
  2616. ADC_ResetAdcInfoSetting();
  2617. if(!sAdcInfo.bADCEnable)
  2618. break;
  2619. ADC_SourceInit();
  2620. udelay(1000); //ADC initialize. Wait 2 V-sync 30ms
  2621. if(!sAdcInfo.bADCEnable)
  2622. break;
  2623. if(gAdcAp.bAutoFlow == FALSE)//For test
  2624. {
  2625. sAdcInfo.ucMatchTablePtr = sAdcInfo.ucVesaModeTableEntry = gAdcAp.ucMatchTable;
  2626. ADC_ModeSetting();
  2627. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  2628. {
  2629. ucPixelClock = g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucPixelClock*iEnlargeWidthRate;
  2630. usHTotal = g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHtotal*iEnlargeWidthRate;
  2631. }
  2632. else
  2633. {
  2634. ucPixelClock = g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucPixelClock*iEnlargeWidthRate;
  2635. usHTotal = g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHtotal*iEnlargeWidthRate;
  2636. }
  2637. //ADC_PllSetting(ucPixelClock, usHTotal);
  2638. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  2639. {
  2640. ADC_DetectTiming.usVcount=ADC_InputVesaTiming.usVcount;
  2641. ADC_DetectTiming.ucVFrequency=ADC_InputVesaTiming.ucVFrequency;
  2642. ADC_DetectTiming.usHFrequency=ADC_InputVesaTiming.usHFrequency;
  2643. ADC_DetectTiming.ucFlag=ADC_InputVesaTiming.ucFlag=g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucFlag;
  2644. }
  2645. else
  2646. {
  2647. ADC_DetectTiming.usVcount=ADC_InputVesaTiming.usVcount;
  2648. ADC_DetectTiming.ucVFrequency=ADC_InputVesaTiming.ucVFrequency;
  2649. ADC_DetectTiming.usHFrequency=ADC_InputVesaTiming.usHFrequency;
  2650. ADC_DetectTiming.ucFlag=ADC_InputVesaTiming.ucFlag=g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].ucFlag;
  2651. }
  2652. ADC_UpdateFlag(ADC_DetectTiming.ucFlag);
  2653. ADC_CheckPllResetSequence(ucPixelClock, usHTotal);
  2654. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  2655. {
  2656. ADC_Write(ADC_REG_o_hsync_sel,0);
  2657. ADC_Write(ADC_REG_o_vsync_sel,0x01);
  2658. }
  2659. else
  2660. {
  2661. ADC_Write(ADC_REG_o_hsync_sel,0);
  2662. ADC_Write(ADC_REG_o_vsync_sel,0);
  2663. }
  2664. retval = Mode_Change_Stable;
  2665. }
  2666. else
  2667. {
  2668. retval = ADC_Mode_Setup();
  2669. }
  2670. sAdcInfo.bModeDetection=FALSE;
  2671. sAdcInfo.bModeChange = FALSE;
  2672. sAdcInfo.bInterruptHappen = FALSE;
  2673. ADC_Clear_Interrupt(0x80);
  2674. if(!sAdcInfo.bADCEnable)
  2675. break;
  2676. //??interrupt by KMF
  2677. switch (retval)
  2678. {
  2679. case Current_state_Failed:
  2680. case Csync_stable_i2_failed:
  2681. case VIP_No_Signal:
  2682. case Unstable_Timing_Setting:
  2683. //Added by Jason to clear H and V count for pollingHandler().
  2684. sAdcInfo.usHcount = 0;
  2685. sAdcInfo.usVcount = 0;
  2686. ADC_DebugMsg("Input Sync unstable\n");
  2687. VIP_NoticeModeNotSupport(EXTS, DISABLE);
  2688. ADC_NoticeKmf(ADCMSG_INPUTPATHSTATUS, FALSE, FALSE);
  2689. ucLastInputMode = sAdcInfo.ucInputMode;
  2690. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  2691. {
  2692. ADCTimerInfo[TimerVsyncloss][1] = 0;
  2693. ADC_Interrupt(ENABLE, 0x2000);
  2694. }
  2695. else
  2696. {
  2697. sAdcInfo.bSyncDetection=FALSE;
  2698. ADC_Interrupt(ENABLE, 0x02);
  2699. ADCTimerInfo[TimerSignaloff][1] = 1;
  2700. }
  2701. ADCTimerInfo[TimerTunerStrength][1] = 0;
  2702. break;
  2703. case Unsupported_Timing:
  2704. if(ucLastInputMode != UNSUPPORT_MODE)
  2705. {
  2706. ADC_DebugMsg("Not support\n");
  2707. VIP_NoticeModeNotSupport(EXTS, ENABLE);
  2708. ADC_NoticeKmf(ADCMSG_INPUTPATHSTATUS, FALSE, TRUE);
  2709. ADC_DelayMS(100);
  2710. }
  2711. ucLastInputMode = sAdcInfo.ucInputMode;
  2712. if(sAdcInfo.bModeChange)
  2713. break;
  2714. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  2715. {
  2716. ADCTimerInfo[TimerVsyncloss][1] = 1;
  2717. ADC_Interrupt(ENABLE, 0x7030);
  2718. }
  2719. else
  2720. {
  2721. ADCTimerInfo[TimerModeChange][1] = 1;
  2722. ADC_Interrupt(ENABLE, 0x478f);
  2723. }
  2724. ADCTimerInfo[TimerTunerStrength][1] = 0;
  2725. break;
  2726. case Mode_Change_Again:
  2727. sAdcInfo.bModeChange = TRUE;
  2728. break;
  2729. case Mode_Change_Stable:
  2730. if(gAdcAp.bAutoFlow != FALSE)
  2731. {
  2732. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  2733. {
  2734. ADCTimerInfo[TimerVsyncloss][1] = 1;
  2735. ADC_Interrupt(ENABLE, 0x7030);
  2736. }
  2737. else
  2738. {
  2739. ADCTimerInfo[TimerModeChange][1] = 1;
  2740. ADC_Interrupt(ENABLE, 0x478f);
  2741. }
  2742. ADC_DelayMS(60);
  2743. }
  2744. //ADCTimerInfo[TimerTunerStrength][1] = 1;
  2745. ADC_NoticeKmf(ADCMSG_INPUTPATHSTATUS, TRUE, FALSE);
  2746. ADC_SendInfo();
  2747. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  2748. break;
  2749. if (sAdcInfo.ucSource != Adc_kSourceVGA)
  2750. {
  2751. ADC_Write(ADC_REG_cs2_r_clamp_ref_edge, 0);
  2752. ADC_Write(ADC_REG_cs2_g_clamp_ref_edge, 0);
  2753. ADC_Write(ADC_REG_cs2_b_clamp_ref_edge, 0);
  2754. }
  2755. else
  2756. {
  2757. ADC_Write(ADC_REG_cs2_r_clamp_ref_edge, 1);
  2758. ADC_Write(ADC_REG_cs2_g_clamp_ref_edge, 1);
  2759. ADC_Write(ADC_REG_cs2_b_clamp_ref_edge, 1);
  2760. }
  2761. if(sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  2762. {
  2763. if( (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_480I60 ) || (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_576I50))
  2764. {
  2765. //avoid touch sync or data, clamp width = 280ns
  2766. ADC_Write(ADC_REG_cs2_r_clamp_start, 0x10);
  2767. ADC_Write(ADC_REG_cs2_r_clamp_width, 0x10);
  2768. ADC_Write(ADC_REG_cs2_g_clamp_start, 0x10);
  2769. ADC_Write(ADC_REG_cs2_g_clamp_width, 0x10);
  2770. ADC_Write(ADC_REG_cs2_b_clamp_start, 0x10);
  2771. ADC_Write(ADC_REG_cs2_b_clamp_width, 0x10);
  2772. }
  2773. else if ((sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_480P60) || (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_576P50))
  2774. {
  2775. ADC_Write(ADC_REG_cs2_r_clamp_start, 0xd);
  2776. ADC_Write(ADC_REG_cs2_r_clamp_width, 0xd);
  2777. ADC_Write(ADC_REG_cs2_g_clamp_start, 0xd);
  2778. ADC_Write(ADC_REG_cs2_g_clamp_width, 0xd);
  2779. ADC_Write(ADC_REG_cs2_b_clamp_start, 0xd);
  2780. ADC_Write(ADC_REG_cs2_b_clamp_width, 0xd);
  2781. }
  2782. else
  2783. {
  2784. if (sAdcInfo.bInterlace)
  2785. {
  2786. ADC_Write(ADC_REG_cs2_r_clamp_start, 0xa);
  2787. ADC_Write(ADC_REG_cs2_r_clamp_width, 0x6);
  2788. ADC_Write(ADC_REG_cs2_g_clamp_start, 0xa);
  2789. ADC_Write(ADC_REG_cs2_g_clamp_width, 0x6);
  2790. ADC_Write(ADC_REG_cs2_b_clamp_start, 0xa);
  2791. ADC_Write(ADC_REG_cs2_b_clamp_width, 0x6);
  2792. }
  2793. else
  2794. {
  2795. if ((sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_1080P50) ||(sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_1080P60))
  2796. {
  2797. ADC_Write(ADC_REG_cs2_r_clamp_start, 0x6);
  2798. ADC_Write(ADC_REG_cs2_g_clamp_start, 0x6);
  2799. ADC_Write(ADC_REG_cs2_b_clamp_start, 0x6);
  2800. }
  2801. else
  2802. {
  2803. ADC_Write(ADC_REG_cs2_r_clamp_start, 0xa);
  2804. ADC_Write(ADC_REG_cs2_g_clamp_start, 0xa);
  2805. ADC_Write(ADC_REG_cs2_b_clamp_start, 0xa);
  2806. }
  2807. ADC_Write(ADC_REG_cs2_r_clamp_width, 0x4);
  2808. ADC_Write(ADC_REG_cs2_g_clamp_width, 0x4);
  2809. ADC_Write(ADC_REG_cs2_b_clamp_width, 0x4);
  2810. }
  2811. }
  2812. }
  2813. else
  2814. {
  2815. ADC_Write(ADC_REG_r_sb1, 0x13);
  2816. ADC_Write(ADC_REG_g_sb1, 0x13);
  2817. ADC_Write(ADC_REG_b_sb1, 0x13);
  2818. }
  2819. ADC_Write(ADC_REG_csgen_start, 0x26);
  2820. ADC_Write(ADC_REG_cvbs_clamp_mode_g, 0);
  2821. sAdcInfo.bWBUpdate=TRUE;
  2822. if(sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2)
  2823. {
  2824. DRV_ADC_SetGain(RED,435);
  2825. DRV_ADC_SetGain(GREEN,420);
  2826. DRV_ADC_SetGain(BLUE,427);
  2827. DRV_ADC_SetOffset(RED,407);
  2828. DRV_ADC_SetOffset(GREEN,107);
  2829. DRV_ADC_SetOffset(BLUE,422);
  2830. }
  2831. else
  2832. {
  2833. DRV_ADC_SetGain(RED,310);
  2834. DRV_ADC_SetGain(GREEN,299);
  2835. DRV_ADC_SetGain(BLUE,306);
  2836. DRV_ADC_SetOffset(RED,181);
  2837. DRV_ADC_SetOffset(GREEN,191);
  2838. DRV_ADC_SetOffset(BLUE,196);
  2839. }
  2840. ADC_Write(ADC_REG_lcg_refdbg_sel_temp, 0);
  2841. sAdcInfo.bWBUpdate=FALSE;
  2842. if( sAdcInfo.bInterlace )
  2843. VIP_TopDetect(SOURCE_EXTS);
  2844. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  2845. break;
  2846. bAutoWB = TRUE;
  2847. ADC_AutoColorCalibration();
  2848. //move normal screen before doing phase and centering to make display time shorter
  2849. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  2850. break;
  2851. else
  2852. {
  2853. ADC_ScreenMode(NormalScreen);
  2854. VIP_SetAutoTuneStatus(TRUE);
  2855. }
  2856. if(!FactoryModeAWB || sAdcInfo.ucSource == Adc_kSourceVGA)
  2857. {
  2858. AutoAdjustStatus = TRUE;
  2859. noticekmf(KMF2UMF_EVID_ADC, KMF2UMF_EVTYPE_ADC_AUTOADJUST, &AutoAdjustStatus, 1);
  2860. }
  2861. #ifndef CONFIG_QSD
  2862. if(!FactoryModeAWB) // Skip phase detection when AWB in factory mode.
  2863. {
  2864. bAutoAdjust = TRUE;
  2865. sAdcInfo.ucUserPhase = ADC_PhaseDetected();
  2866. bAutoAdjust = FALSE;
  2867. ADC_DelayMS(50);
  2868. ADC_SearchDigitalOffset();
  2869. bCheckVIPHttl = TRUE;
  2870. }
  2871. #endif
  2872. if ( sAdcInfo.ucSource == Adc_kSourceVGA )
  2873. {
  2874. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  2875. break;
  2876. ADC_Centering(FALSE); // Set FALSE for ignoring mute mechanism when size is revised during centering procedure.
  2877. noticekmf(KMF2UMF_EVID_ADC, KMF2UMF_EVTYPE_ADC_PCSETUPDATE, &value, 1);
  2878. }
  2879. if(!FactoryModeAWB || sAdcInfo.ucSource == Adc_kSourceVGA)
  2880. {
  2881. AutoAdjustStatus = FALSE;
  2882. noticekmf(KMF2UMF_EVID_ADC, KMF2UMF_EVTYPE_ADC_AUTOADJUST, &AutoAdjustStatus, 1);
  2883. }
  2884. //ADC_DelayMS(300); // signal is unstable when switching timing on Chroma_22293.
  2885. if(sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  2886. {
  2887. if (sAdcInfo.ucTimingModeIndex == PLF_VIDEO_TIMING_ID_DTV_576I50)
  2888. {
  2889. ADC_Write(ADC_REG_iir_fbpn1_i_8, 0);
  2890. ADC_Write(ADC_REG_iir_fbppn1_i_8, 1);
  2891. }
  2892. }
  2893. break;
  2894. }
  2895. sAdcInfo.bSyncDetection=FALSE;
  2896. if(gAdcAp.bDisableInterrupt)
  2897. {
  2898. sAdcInfo.bModeChange = FALSE;
  2899. ADC_Interrupt(DISABLE, 0);
  2900. ADCTimerInfo[TimerSignaloff][1] = 0;
  2901. }
  2902. }while(sAdcInfo.bModeChange && sAdcInfo.bADCEnable); //interrupt flag that needs to handle
  2903. }
  2904. void ADC_SourceSelect(UINT8 ucSubInputSource, BOOL bEnable)
  2905. {
  2906. BOOL cancel_result = FALSE;
  2907. ADC_DebugMsg("%s\n", __FUNCTION__);
  2908. if(sAdcInfo.bADCEnable == bEnable)
  2909. return;
  2910. sAdcInfo.bFactoryMode = FALSE;
  2911. // Set default VGA-WAKEUP Bottom Range Number
  2912. *((volatile UINT8*)0xbe0f0700) = 0x2e;
  2913. sAdcInfo.bADCEnable = bEnable;
  2914. sAdcInfo.ucSource = ucSubInputSource;
  2915. sAdcInfo.bInterruptHappen = FALSE;
  2916. sAdcInfo.bInterruptHappenAgain = FALSE;
  2917. sAdcInfo.ucScreenMode = 0xf;
  2918. ucLastInputMode = 0xf;
  2919. sAdcInfo.ucInputMode = 0xf;
  2920. ADC_Clear_Interrupt(0xffff);
  2921. ADC_Interrupt(DISABLE, 0);
  2922. ADC_ResetApSetting();
  2923. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  2924. {
  2925. sAdcInfo.usHcountModeChange = 8;
  2926. sAdcInfo.usVcountModeChange = 5;
  2927. }
  2928. else
  2929. {
  2930. sAdcInfo.usHcountModeChange = 30;
  2931. sAdcInfo.usVcountModeChange = 15;
  2932. }
  2933. if(sAdcInfo.bADCEnable == ENABLE)
  2934. {
  2935. ADC_DebugMsg("ADC on\n");
  2936. DRV_ADC_power(ENABLE);
  2937. ADC_Write(GLB_REG_global_reset, 0);
  2938. udelay(1000); //Wait MMIO write data in register. 1ms
  2939. ADC_Write(GLB_REG_global_reset, 1);
  2940. ADC_StartTimerFun(&ADCContext, ADC_TimerFun);
  2941. sAdcInfo.bSyncDetection=TRUE;
  2942. queue_delayed_work(pADC_WQSyncDetection, &ADCSyncDetectionThread, 0);
  2943. }
  2944. else
  2945. {
  2946. cancel_result = cancel_delayed_work(&ADCTunerStrengthThread);
  2947. if(cancel_result)
  2948. flush_workqueue(pADC_WQTunerStrength);
  2949. ADC_StopTimerFun(&ADCContext);
  2950. cancel_result = cancel_delayed_work(&ADCSyncDetectionThread);
  2951. if(cancel_result)
  2952. flush_workqueue(pADC_WQSyncDetection);
  2953. DRV_ADC_power(DISABLE);
  2954. ADC_DebugMsg("ADC off\n");
  2955. }
  2956. }
  2957. void ADC_Open(void)
  2958. {
  2959. printk(KERN_EMERG"%s:\n",__FUNCTION__);
  2960. Source[Adc_kSourceVGA].bFirstTime = TRUE;
  2961. Source[Adc_kSourceCOMP1].bFirstTime = Source[Adc_kSourceCOMP2].bFirstTime = Source[Adc_kSourceCOMP3].bFirstTime = TRUE;
  2962. }
  2963. void ADC_Close(void)
  2964. {
  2965. printk(KERN_EMERG"%s:\n",__FUNCTION__);
  2966. if(sAdcInfo.bADCEnable == TRUE)
  2967. {
  2968. sAdcInfo.bADCEnable = FALSE;
  2969. ADC_Interrupt(DISABLE, 0);
  2970. ADC_StopTimerFun(&ADCContext);
  2971. #ifdef DRV_ENABLE_CVD2
  2972. if (sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  2973. {
  2974. if(ucCVD2PowerEnable==TRUE)
  2975. {
  2976. DRV_CVD2_Disable_Ypp_CC();
  2977. DRV_CVD2_Power_Setting(FALSE); //component cc will open cvd2
  2978. ucCVD2PowerEnable=FALSE;
  2979. }
  2980. }
  2981. #endif
  2982. flush_workqueue(pADC_WQSyncDetection);
  2983. flush_workqueue(pADC_WQTunerStrength);
  2984. DRV_ADC_power(DISABLE);
  2985. }
  2986. }
  2987. void ADC_InfoSet(UINT8 ucFunID, INT32 iValue)
  2988. {
  2989. }
  2990. INT32 ADC_InfoGet(UINT8 ucFunID)
  2991. {
  2992. INT32 iValue= -1;
  2993. return iValue;
  2994. }
  2995. void DRV_ADC_GetAutoColorValue(ADCCalibrate_OSDGainOffset_t* pstConfig)
  2996. {
  2997. ADC_UpdateWBOSDvalue();
  2998. pstConfig->scOSDRGainValue=ADCCalibrate_OSDGainOffset.scOSDRGainValue;
  2999. pstConfig->scOSDGGainValue=ADCCalibrate_OSDGainOffset.scOSDGGainValue;
  3000. pstConfig->scOSDBGainValue=ADCCalibrate_OSDGainOffset.scOSDBGainValue;
  3001. pstConfig->scOSDROffsetValue=ADCCalibrate_OSDGainOffset.scOSDROffsetValue;
  3002. pstConfig->scOSDGOffsetValue=ADCCalibrate_OSDGainOffset.scOSDGOffsetValue;
  3003. pstConfig->scOSDBOffsetValue=ADCCalibrate_OSDGainOffset.scOSDBOffsetValue;
  3004. pstConfig->bResult=ADCCalibrate_OSDGainOffset.bResult;
  3005. }
  3006. EXPORT_SYMBOL(DRV_ADC_GetAutoColorValue);
  3007. void ADC_SearchGain(BOOL bAutoGainMode)
  3008. {
  3009. VIP_RECT rcRect;
  3010. UINT8 ucColor, ucStep, ucTotalCnt;
  3011. UINT8 ucRegChannelSel[MaxColor]={0}, ucClampWidth[MaxColor]={0}, ucRegClampExt=0, ucClampPwdMode;
  3012. UINT32 ulCurrentGain[MaxColor], ulBestGain[MaxColor], ulTargetValue[MaxColor];
  3013. UINT32 ulHighValue[MaxColor] = {0}, ulLowValue[MaxColor] = {0}, ulCodeDiff;
  3014. #ifdef CONFIG_SUPPORT_DEBUG_MESSAGE
  3015. UINT8 ulMaxTime = 8;
  3016. WBDbgMsg GainDebug[MaxColor][ulMaxTime];
  3017. #endif
  3018. BOOL bFound[MaxColor];
  3019. UINT32 Buf[MaxColor] = {0}, BufDelta[MaxColor] = {0}, AvgHigh[MaxColor] = {0},AvgLow[MaxColor] = {0};
  3020. BOOL AWB_Stable;
  3021. UINT8 AWB_TH = 30, Avg_cnt = 3, Avg_loop = 0;
  3022. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  3023. // Disable enhance pull down before switching RGB input select
  3024. ADC_Write(ADC_REG_r_epd12v, 0);
  3025. ADC_DelayMS(10);
  3026. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  3027. {
  3028. // In order to get correct region for AWB, setup offset before centering.
  3029. DRV_ADC_SetOffset(RED,0);
  3030. DRV_ADC_SetOffset(GREEN,0);
  3031. DRV_ADC_SetOffset(BLUE,0);
  3032. ADC_Write(ADC_REG_lcg_r33vcm_sel,7);
  3033. ADC_Write(ADC_REG_lcg_g33vcm_sel,7);
  3034. ADC_Write(ADC_REG_lcg_b33vcm_sel,7);
  3035. //Get VIP ADC_DetectTiming Info
  3036. //ADC_Centering(0);
  3037. ADC_Write(ADC_REG_lcg_r33vcm_sel,1);
  3038. ADC_Write(ADC_REG_lcg_g33vcm_sel,1);
  3039. ADC_Write(ADC_REG_lcg_b33vcm_sel,1);
  3040. }
  3041. else
  3042. {
  3043. // Enable SoG clamp
  3044. ADC_Write(ADC_REG_sc_stb_vs_sth, 7);
  3045. // Disable data clamp
  3046. ADC_Write(ADC_REG_g_clamppdn_mod, 3);
  3047. // Adjsut clamp level to 500 mV
  3048. ADC_Write(ADC_REG_g_sb1, 0x19);
  3049. }
  3050. /// Setup target values and an rectangle AWB region for calculating compenstaion.
  3051. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  3052. {
  3053. ulTargetValue[RED] = GainRGBCodeDiff;
  3054. ulTargetValue[GREEN] = GainRGBCodeDiff;
  3055. ulTargetValue[BLUE] = GainRGBCodeDiff;
  3056. if( sAdcInfo.bHpol==1 )
  3057. rcRect.ulHStart = ADC_InputVesaTiming.usHs_Width + ((ADC_DetectTiming.usHstart-ADC_InputVesaTiming.usHs_Width)*3)/4;
  3058. else
  3059. rcRect.ulHStart = ((ADC_DetectTiming.usHstart)*3)/4;
  3060. rcRect.ulHEnd = rcRect.ulHStart + 10*iEnlargeWidthRate;
  3061. rcRect.ulVStart = ADC_InputVesaTiming.usVstart;
  3062. rcRect.ulVEnd = ADC_InputVesaTiming.usVstart + ADC_InputVesaTiming.usVactive;
  3063. }
  3064. else
  3065. {
  3066. ulTargetValue[RED] = GainCbCrCodeDiff;
  3067. ulTargetValue[GREEN] = GainYCodeDiff;
  3068. ulTargetValue[BLUE] = GainCbCrCodeDiff;
  3069. rcRect.ulHStart = ADC_InputVesaTiming.usHs_Width + ((ADC_InputVesaTiming.usHstart-ADC_InputVesaTiming.usHs_Width)*3)/4;
  3070. rcRect.ulHEnd = rcRect.ulHStart + 10*iEnlargeWidthRate;
  3071. rcRect.ulVStart = ADC_InputVesaTiming.usVstart + ADC_InputVesaTiming.usVactive/4;
  3072. rcRect.ulVEnd = ADC_InputVesaTiming.usVstart + ADC_InputVesaTiming.usVactive*3/4;
  3073. }
  3074. if( gAdcAp.bApUse && gAdcAp.ulApPosition!=0xffffffff )
  3075. {
  3076. rcRect.ulHStart = gAdcAp.ulApPosition;
  3077. rcRect.ulHEnd = rcRect.ulHStart+21;
  3078. }
  3079. if(gAdcAp.bApUse)
  3080. {
  3081. for(ucColor = RED; ucColor<MaxColor; ucColor++)
  3082. if(gAdcAp.ulTargetValue[ucColor] != 0xffffffff)
  3083. ulTargetValue[ucColor] = gAdcAp.ulTargetValue[ucColor];
  3084. }
  3085. ADC_DebugMsg("Detect_Hw=%d Detect_Hs=%d Vesa_Hw=%d Vesa_Hs=%d\n", ADC_DetectTiming.usHs_Width, ADC_InputVesaTiming.usHstart, ADC_InputVesaTiming.usHs_Width, ADC_InputVesaTiming.usHstart);
  3086. ADC_DebugMsg("HStart=%d HEnd=%d VStart=%d VEnd=%d\n", rcRect.ulHStart, rcRect.ulHEnd, rcRect.ulVStart, rcRect.ulVEnd);
  3087. ADC_DebugMsg("TargetValue[R,G,B]=(%d,%d,%d)\n", ulTargetValue[RED], ulTargetValue[GREEN], ulTargetValue[BLUE]);
  3088. ADC_Write(ADC_REG_beofst_en0, 0);
  3089. // Switch RGB input select channel to internal voltage zone before doing AWB
  3090. ucRegChannelSel[RED] = ADC_Read(ADC_REG_lcg_rch_sel);
  3091. ucRegChannelSel[GREEN] = ADC_Read(ADC_REG_lcg_gch_sel);
  3092. ucRegChannelSel[BLUE] = ADC_Read(ADC_REG_lcg_bch_sel);
  3093. ADC_Write(ADC_REG_lcg_rch_sel, 6);
  3094. ADC_Write(ADC_REG_lcg_gch_sel, 6);
  3095. ADC_Write(ADC_REG_lcg_bch_sel, 6);
  3096. ucRegClampExt = ADC_Read(ADC_REG_o_rgbclamp_sel_extension);
  3097. ADC_Write(ADC_REG_o_rgbclamp_sel_extension, 1);
  3098. // Switch Mux to AWB path
  3099. ADC_Write(ADC_REG_lcg_refdbg_sel_temp, 0x3);
  3100. // Enable G channel clamp for entering internal data clamp flow
  3101. ucClampPwdMode = ADC_Read(ADC_REG_g_clamppdn_mod);
  3102. ADC_Write(ADC_REG_g_clamppdn_mod, 2);
  3103. // Enlarge clamp region for increasing stability of High/Low value in AWB mechanism
  3104. ucClampWidth[RED] = ADC_Read(ADC_REG_cs2_r_clamp_width);
  3105. ucClampWidth[GREEN] = ADC_Read(ADC_REG_cs2_g_clamp_width);
  3106. ucClampWidth[BLUE] = ADC_Read(ADC_REG_cs2_b_clamp_width);
  3107. ADC_Write(ADC_REG_cs2_r_clamp_width, 0xff);
  3108. ADC_Write(ADC_REG_cs2_g_clamp_width, 0xff);
  3109. ADC_Write(ADC_REG_cs2_b_clamp_width, 0xff);
  3110. sAdcInfo.usPollingCounter = 0;
  3111. do{
  3112. sAdcInfo.bReSearchGain = FALSE;
  3113. for(ucColor = RED; ucColor<MaxColor; ucColor++)
  3114. {
  3115. ulCurrentGain[ucColor] = 0xFF;
  3116. ulBestGain[ucColor] = 0xFF;
  3117. bFound[ucColor] = FALSE;
  3118. }
  3119. sAdcInfo.bAutoGain = TRUE;
  3120. ucStep = 0;
  3121. while(bFound[RED]==FALSE || bFound[GREEN]==FALSE || bFound[BLUE]==FALSE)
  3122. {
  3123. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  3124. break;
  3125. /// Switch auto gain voltage selector to High.
  3126. ADC_Write(ADC_REG_lcg_awbsel12v, (sAdcInfo.ucSource == Adc_kSourceVGA)?1:0);
  3127. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3128. {
  3129. if(bFound[ucColor] == FALSE)
  3130. ADC_SetGainDirdect(ucColor, ulCurrentGain[ucColor]);
  3131. }
  3132. ADC_DelayMS(20);
  3133. /// Find stable sampling point for High.
  3134. AWB_Stable = FALSE;
  3135. ucTotalCnt = 0;
  3136. while(!AWB_Stable)
  3137. {
  3138. ucTotalCnt++;
  3139. if(ucTotalCnt > 5)
  3140. {
  3141. ADC_DebugMsg("### Cannot get stable compensation results. ###\n\n");
  3142. break;
  3143. }
  3144. ADC_DelayMS(10);
  3145. if((sAdcInfo.ucInputMode == 0xf) ||(sAdcInfo.ucInputMode == UNSUPPORT_MODE) || (sAdcInfo.ucInputMode == NOSIGNAL_MODE) || (sAdcInfo.ucInputMode == UNSTABLE_MODE))
  3146. break;
  3147. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  3148. break;
  3149. // Backup previous sampling point compensation result, value would be 0 in the first round.
  3150. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3151. Buf[ucColor] = ulHighValue[ucColor];
  3152. VIP_simulate_Compensation_function(rcRect, &ulHighValue[RED], &ulHighValue[GREEN], &ulHighValue[BLUE]);
  3153. // Force to get the second sampling point if it is the first round.
  3154. if( (Buf[RED]==0) && (Buf[GREEN]==0) && (Buf[BLUE]==0) )
  3155. continue;
  3156. // Check whether code diff between the latest two sample results is in the range of AWB_TH.
  3157. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3158. BufDelta[ucColor] = abs(Buf[ucColor] - ulHighValue[ucColor]);
  3159. if( (BufDelta[RED] <= AWB_TH) && (BufDelta[GREEN] <= AWB_TH) && (BufDelta[BLUE] <= AWB_TH) )
  3160. {
  3161. //ADC_DebugMsg("### Stable enough ###\n\n");
  3162. AWB_Stable = TRUE;
  3163. }
  3164. }
  3165. /// Calcultate average High value of the next three sample points.
  3166. for(Avg_loop = 0; Avg_loop < Avg_cnt; Avg_loop++)
  3167. {
  3168. VIP_simulate_Compensation_function(rcRect, &ulHighValue[RED], &ulHighValue[GREEN], &ulHighValue[BLUE]);//ADC_InputVesaTiming.usHs_Width
  3169. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3170. AvgHigh[ucColor] = AvgHigh[ucColor] + ulHighValue[ucColor];
  3171. }
  3172. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3173. AvgHigh[ucColor] = AvgHigh[ucColor]/Avg_cnt;
  3174. ADC_DebugMsg(" AvgHigh[R] = %d, AvgHigh[G] = %d, AvgHigh[B] = %d\n",
  3175. AvgHigh[RED],AvgHigh[GREEN],AvgHigh[BLUE]);
  3176. /// Switch auto gain voltage selector to Low.
  3177. ADC_Write(ADC_REG_lcg_awbsel12v, 2);
  3178. ADC_DelayMS(20);
  3179. /// Find stable sampling point for Low.
  3180. AWB_Stable = FALSE;
  3181. ucTotalCnt = 0;
  3182. while(!AWB_Stable)
  3183. {
  3184. ucTotalCnt++;
  3185. if(ucTotalCnt > 5)
  3186. {
  3187. ADC_DebugMsg("### Cannot get stable compensation results. ###\n\n");
  3188. break;
  3189. }
  3190. ADC_DelayMS(10);
  3191. if((sAdcInfo.ucInputMode == 0xf) ||(sAdcInfo.ucInputMode == UNSUPPORT_MODE) || (sAdcInfo.ucInputMode == NOSIGNAL_MODE) || (sAdcInfo.ucInputMode == UNSTABLE_MODE))
  3192. break;
  3193. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  3194. break;
  3195. // Backup previous sampling point compensation result, value would be 0 in the first round.
  3196. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3197. Buf[ucColor] = ulLowValue[ucColor];
  3198. VIP_simulate_Compensation_function(rcRect, &ulLowValue[RED], &ulLowValue[1], &ulLowValue[BLUE]);
  3199. // Force to get the second sampling point if it is the first round.
  3200. if( (Buf[RED]==0) && (Buf[GREEN]==0) && (Buf[BLUE]==0) )
  3201. continue;
  3202. // Check whether code diff is in specific range in the latest two sample points
  3203. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3204. BufDelta[ucColor] = abs(Buf[ucColor] - ulLowValue[ucColor]);
  3205. if( (BufDelta[RED] <= AWB_TH) && (BufDelta[GREEN] <= AWB_TH) && (BufDelta[BLUE] <= AWB_TH) )
  3206. {
  3207. //ADC_DebugMsg("### Stable enough ###\n\n");
  3208. AWB_Stable = TRUE;
  3209. }
  3210. }
  3211. /// Calcultate average Low value of the next three sample points.
  3212. for(Avg_loop = 0; Avg_loop < Avg_cnt; Avg_loop++)
  3213. {
  3214. VIP_simulate_Compensation_function(rcRect, &ulLowValue[RED], &ulLowValue[GREEN], &ulLowValue[BLUE]);
  3215. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3216. AvgLow[ucColor] = AvgLow[ucColor] + ulLowValue[ucColor];
  3217. }
  3218. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3219. AvgLow[ucColor] = AvgLow[ucColor]/Avg_cnt;
  3220. ADC_DebugMsg(" AvgLow[R] = %d, AvgLow[G] = %d, AvgLow[B] = %d\n",
  3221. AvgLow[RED],AvgLow[GREEN],AvgLow[BLUE]);
  3222. /// Calculate the best gain by formula in 0.0001 precision
  3223. ADC_DebugMsg("Calculate in 0.001 precision\n => ( ( ( (Target * 1.5)/CodeDiff - 1) * 512) ) - 1 \n ");
  3224. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3225. {
  3226. if(bFound[ucColor] == FALSE)
  3227. {
  3228. ulCodeDiff = abs(AvgHigh[ucColor] - AvgLow[ucColor]);
  3229. #ifdef CONFIG_SUPPORT_DEBUG_MESSAGE
  3230. GainDebug[ucColor][ucStep].ulCurrentSearch = ulCurrentGain[ucColor];
  3231. GainDebug[ucColor][ucStep].ulHighValue = AvgHigh[ucColor];
  3232. GainDebug[ucColor][ucStep].ulLowValue = AvgLow[ucColor];
  3233. GainDebug[ucColor][ucStep].ulCurrentSearchValue = ulCodeDiff;
  3234. GainDebug[ucColor][ucStep].ulDelta= abs(ulTargetValue[ucColor] - ulCodeDiff);
  3235. #endif
  3236. //digital gain is linearity
  3237. ulBestGain[ucColor] = ( ( ( (ulTargetValue[ucColor] * 1500)/ulCodeDiff - 1000) * 512) / 1000 ) - 1;
  3238. bFound[ucColor] = TRUE;
  3239. }
  3240. else
  3241. {
  3242. #ifdef CONFIG_SUPPORT_DEBUG_MESSAGE
  3243. GainDebug[ucColor][ucStep].ulCurrentSearch = 0;
  3244. GainDebug[ucColor][ucStep].ulHighValue = 0;
  3245. GainDebug[ucColor][ucStep].ulLowValue = 0;
  3246. GainDebug[ucColor][ucStep].ulCurrentSearchValue = 0;
  3247. GainDebug[ucColor][ucStep].ulDelta= 0;
  3248. #endif
  3249. }
  3250. }
  3251. ucStep++;
  3252. }
  3253. sAdcInfo.bAutoGain = FALSE;
  3254. if(sAdcInfo.bModeChange || !sAdcInfo.bADCEnable || sAdcInfo.bModeDetection)
  3255. break;
  3256. if((sAdcInfo.ucInputMode == 0xf) ||(sAdcInfo.ucInputMode == UNSUPPORT_MODE) || (sAdcInfo.ucInputMode == NOSIGNAL_MODE) || (sAdcInfo.ucInputMode == UNSTABLE_MODE))
  3257. break;
  3258. }while(sAdcInfo.bReSearchGain);
  3259. // Recovery orignial clamp width before leaving AWB
  3260. ADC_Write(ADC_REG_cs2_r_clamp_width, ucClampWidth[RED]);
  3261. ADC_Write(ADC_REG_cs2_g_clamp_width, ucClampWidth[GREEN]);
  3262. ADC_Write(ADC_REG_cs2_b_clamp_width, ucClampWidth[BLUE]);
  3263. // Recovery G channel clamp for entering SoG clamp flow.
  3264. ADC_Write(ADC_REG_g_clamppdn_mod, ucClampPwdMode);
  3265. ADC_Write(ADC_REG_lcg_refdbg_sel_temp, 0);
  3266. // Recovery RGB channel select for original input source
  3267. ADC_Write(ADC_REG_lcg_rch_sel, ucRegChannelSel[RED]);
  3268. ADC_Write(ADC_REG_lcg_gch_sel, ucRegChannelSel[GREEN]);
  3269. ADC_Write(ADC_REG_lcg_bch_sel, ucRegChannelSel[BLUE]);
  3270. ADC_Write(ADC_REG_o_rgbclamp_sel_extension, ucRegClampExt);
  3271. #ifdef CONFIG_BOE_HV430FHB_N40
  3272. // Cannot pull down due to Tcon_7 and VGA_R are bonded on N40 panel
  3273. ADC_Write(ADC_REG_r_epd12v, 0x0);
  3274. #else
  3275. // Enable enhance pull down when channel select is recoveried.
  3276. ADC_Write(ADC_REG_r_epd12v, 1);
  3277. #endif
  3278. if(sAdcInfo.ucSource != Adc_kSourceVGA)
  3279. {
  3280. // Adjsut data clamp level to 800 mV
  3281. ADC_Write(ADC_REG_g_sb1, 0);
  3282. // Enable data clamp
  3283. ADC_Write(ADC_REG_g_clamppdn_mod, 2);
  3284. // Disable SoG clamp
  3285. ADC_Write(ADC_REG_sc_stb_vs_sth, 0);
  3286. }
  3287. /// Setup the best gain value
  3288. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3289. ADC_SetGainDirdect(ucColor, ulBestGain[ucColor]);
  3290. #ifdef CONFIG_SUPPORT_DEBUG_MESSAGE
  3291. ucTotalCnt = ucStep;
  3292. ADC_DebugMsg("--- Search Gain ---\n");
  3293. ADC_DebugMsg(" Color Gain Target Delta CodeDiff High Low Best\n");
  3294. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3295. {
  3296. for(ucStep=0; ucStep<ucTotalCnt; ucStep++)
  3297. COLOR_PRINT(ucColor," [%s] %3d %3d %3d %5d %3d %3d %3d",
  3298. (ucColor==RED)?"R":(ucColor==GREEN)?"G":"B",
  3299. GainDebug[ucColor][ucStep].ulCurrentSearch,
  3300. ulTargetValue[ucColor]/10,
  3301. (GainDebug[ucColor][ucStep].ulDelta+5)/10,
  3302. (GainDebug[ucColor][ucStep].ulCurrentSearchValue+5)/10,
  3303. (GainDebug[ucColor][ucStep].ulHighValue+5)/10,
  3304. (GainDebug[ucColor][ucStep].ulLowValue+5)/10,
  3305. ulBestGain[ucColor] );
  3306. //COLOR_PRINT(ucColor,"Best Gain[%s]=%d\n",(ucColor==RED)?"RED":(ucColor==GREEN)?"GREEN":"BLUE", ulBestGain[ucColor]);
  3307. }
  3308. #endif
  3309. // Recover to High gain setting
  3310. ADC_Write(ADC_REG_lcg_awbsel12v, 1);
  3311. }
  3312. void ADC_InterruptHandler (void)
  3313. {
  3314. UINT8 ucCurState, ucAction=0xff;
  3315. UINT16 usStatus;
  3316. volatile UINT16 usVIPHttl=0, usVIPVcnt=0;
  3317. static UINT8 ucLossSyncCount=0;
  3318. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  3319. ucCurState = ADC_Read(ADC_STA_cur_state);
  3320. usStatus = ADC_Read(ADC_STA_interrupt);
  3321. ADC_Clear_Interrupt(usStatus);
  3322. while(sAdcInfo.bADCEnable)
  3323. {
  3324. if(sAdcInfo.bSyncDetection==FALSE && sAdcInfo.ucInputMode == NOSIGNAL_MODE)
  3325. {
  3326. ucAction = 0;
  3327. break;
  3328. }
  3329. if(ADC_Read(ADC_STA_cstable_i2) == 0x1 && (usStatus&0x2000) == 0x2000)
  3330. {
  3331. printk(KERN_EMERG "Chk Mode\n");
  3332. ADC_DelayMS(1);
  3333. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  3334. {
  3335. UINT8 ucHPol, ucVPol;
  3336. UINT16 usAdcHttl=0, usAdcVcnt=0;
  3337. UINT32 ulVsyncWidth;
  3338. usAdcHttl = ADC_Read(ADC_STA_latched_stable_htotal);
  3339. usAdcVcnt = ADC_Read(ADC_STA_latched_stable_vtotal);
  3340. ucHPol = ADC_Read(ADC_STA_hs_plrty);
  3341. ucVPol = ADC_Read(ADC_STA_vs_plrty);
  3342. ulVsyncWidth = ADC_Read(ADC_STA_svp_width)* SYS_CRYS_CLK_RATIO_PRECISE_3 /1000;
  3343. ulVsyncWidth = ulVsyncWidth;
  3344. if( usAdcVcnt < 200 )
  3345. {
  3346. ADC_Interrupt(DISABLE, 0);
  3347. ucAction = 0;
  3348. }
  3349. else if(abs(sAdcInfo.usHcount-usAdcHttl) > sAdcInfo.usHcountModeChange ||
  3350. abs(sAdcInfo.usVcount-usAdcVcnt) > sAdcInfo.usVcountModeChange||
  3351. sAdcInfo.bHpol != ucHPol || sAdcInfo.bVpol != ucVPol ||
  3352. abs(sAdcInfo.ulVsyncWidth-ulVsyncWidth)>10)
  3353. {
  3354. printk(KERN_EMERG "[3] Mode change\n");
  3355. printk(KERN_EMERG "AdcInfo: Hcount=%d Vcount=%d Hpol=%d Vpol=%d VsyncWidth=%d\n",
  3356. sAdcInfo.usHcount, sAdcInfo.usVcount, sAdcInfo.bHpol, sAdcInfo.bVpol, sAdcInfo.ulVsyncWidth);
  3357. printk(KERN_EMERG "AdcHttl=%d AdcVcnt=%d HPol=%d VPol=%d VsyncWidth=%d\n",
  3358. usAdcHttl, usAdcVcnt, ucHPol, ucVPol, ulVsyncWidth);
  3359. ucAction = 1;
  3360. }
  3361. }
  3362. else
  3363. {
  3364. UINT16 usAdcHttl=0, usAdcVcnt=0;
  3365. usAdcHttl = ADC_Read(ADC_STA_latched_stable_htotal);
  3366. usAdcVcnt = ADC_Read(ADC_STA_latched_stable_vtotal);
  3367. if(abs(sAdcInfo.usHcount-usAdcHttl) > sAdcInfo.usHcountModeChange ||
  3368. abs(sAdcInfo.usVcount-usAdcVcnt) > sAdcInfo.usVcountModeChange)
  3369. {
  3370. printk(KERN_EMERG "[4] Mode change\n");
  3371. printk(KERN_EMERG "AdcInfo: usHcount=%d Vcount=%d\n", sAdcInfo.usHcount, sAdcInfo.usVcount);
  3372. printk(KERN_EMERG "AdcHttl=%d AdcVcnt=%d\n", usAdcHttl, usAdcVcnt);
  3373. ucAction = 1;
  3374. }
  3375. else if( abs(sAdcInfo.ucRegLowWidth - ADC_Read(ADC_STA_low_wdth) ) > 10 ||
  3376. abs(sAdcInfo.ucRegLineWidth - ADC_Read(ADC_STA_line_wdth) ) > 1 )
  3377. {
  3378. printk(KERN_EMERG "[5] Mode change\n");
  3379. printk(KERN_EMERG "sAdcInfo: RegLowWidth=%d ADC_STA_low_wdth=%d\n", sAdcInfo.ucRegLowWidth, ADC_Read(ADC_STA_low_wdth));
  3380. printk(KERN_EMERG "sAdcInfo: RegLineWidth=%d ADC_STA_line_wdth=%d\n", sAdcInfo.ucRegLineWidth, ADC_Read(ADC_STA_line_wdth));
  3381. ucAction = 1;
  3382. }
  3383. }
  3384. if( ucAction!=1 && sAdcInfo.bSyncDetection==FALSE )
  3385. {
  3386. //PC source change mode has serious flicker and garbage issue
  3387. VIP_ADIReset();
  3388. //1080p23 change to 1080p24, 1080p29 change to 1080p30, OSD show no signal
  3389. if (VIP_InputActiveDetect(EXTS)!=0x0f)
  3390. {
  3391. printk(KERN_EMERG "Sync Unstable\n");
  3392. ucAction = 5;
  3393. }
  3394. else
  3395. {
  3396. if (sAdcInfo.ucInputMode == UNSUPPORT_MODE)
  3397. break;
  3398. else
  3399. {
  3400. ADC_ScreenMode(NormalScreen);
  3401. VIP_SetAutoTuneStatus(TRUE);
  3402. }
  3403. }
  3404. }
  3405. break;
  3406. }
  3407. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  3408. {
  3409. if((usStatus&0x10) == 0x10)
  3410. {
  3411. printk(KERN_EMERG "HSYNC NON-ACTIVE\n");
  3412. ucAction = 1;
  3413. break;
  3414. }
  3415. }
  3416. else
  3417. {
  3418. if((usStatus&0x0100) == 0x0100)
  3419. {
  3420. printk(KERN_EMERG "CSync NON-ACTIVE\n");
  3421. sAdcInfo.ucInputMode = UNSTABLE_MODE;
  3422. sAdcInfo.bModeChange = TRUE;
  3423. ucAction = 1;
  3424. break;
  3425. }
  3426. else if((usStatus&0x0400) == 0x0400)
  3427. {
  3428. //Qisheng DVD-8170_ 576I Change mode to 576P fail
  3429. printk(KERN_EMERG "I->P detected\n");
  3430. ucAction = 1;
  3431. break;
  3432. }
  3433. }
  3434. if((usStatus&0x1) == 0x1)
  3435. {
  3436. if(ADC_Read(ADC_STA_cs_active) == 0)
  3437. {
  3438. printk(KERN_EMERG "SOG no signal\n");
  3439. ucAction = 1;
  3440. }
  3441. else
  3442. {
  3443. printk(KERN_EMERG "Wait CS non-active interrupt\n");
  3444. ucAction = 2;
  3445. }
  3446. }
  3447. else if( (usStatus&0xc)>0 )
  3448. {
  3449. if((usStatus&0xc) == 0x8)
  3450. {
  3451. if(ucLossSyncCount == 4)
  3452. {
  3453. printk(KERN_EMERG "Hsync loss\n");
  3454. ADC_Write(ADC_REG_loss_sync_update, 0);
  3455. ADC_Write(ADC_REG_synct_too_low_update, 0);
  3456. ucLossSyncCount=0;
  3457. }
  3458. else
  3459. ucLossSyncCount++;
  3460. }
  3461. printk(KERN_EMERG "Loss sync\n");
  3462. if (sAdcInfo.ucInputMode == UNSUPPORT_MODE)
  3463. ucAction = 1;
  3464. else
  3465. ucAction = 2;
  3466. }
  3467. else if(ADC_Read(ADC_STA_cstable_i2) == 0 && (usStatus&0x1000) == 0x1000)
  3468. {
  3469. //1080i50 & 1080i59 timing switch, 1080i50 HS out fail
  3470. if( sAdcInfo.ucSource !=Adc_kSourceVGA )
  3471. ucAction = 2;
  3472. if( sAdcInfo.bSyncDetection==FALSE && sAdcInfo.ucInputMode != UNSUPPORT_MODE)
  3473. ADC_ScreenMode(BlackScreen);
  3474. printk(KERN_EMERG "Coast fail! Dig_rst\n");
  3475. }
  3476. else if( (usStatus&0x80)==0x80 )
  3477. {
  3478. printk(KERN_EMERG "HS out fail\n");
  3479. //1080i50 & 1080i59 timing switch, 1080i50 HS out fail
  3480. if( sAdcInfo.bSyncDetection== false && abs( sAdcInfo.ucRegLowWidth - ADC_Read(ADC_STA_low_wdth) ) > 10)
  3481. {
  3482. if( sAdcInfo.bSyncDetection== false && abs( sAdcInfo.ucRegLowWidth - ADC_Read(ADC_STA_low_wdth) ) > 10)
  3483. {
  3484. if( sAdcInfo.bSyncDetection== false && abs( sAdcInfo.ucRegLowWidth - ADC_Read(ADC_STA_low_wdth) ) > 10)
  3485. {
  3486. printk(KERN_EMERG "[6] Mode change\n");
  3487. printk(KERN_EMERG "sAdcInfo: RegLowWidth=%d ADC_STA_low_wdth=%d\n", sAdcInfo.ucRegLowWidth, ADC_Read(ADC_STA_low_wdth));
  3488. printk(KERN_EMERG "sAdcInfo: RegLineWidth=%d ADC_STA_line_wdth=%d\n", sAdcInfo.ucRegLineWidth, ADC_Read(ADC_STA_line_wdth));
  3489. ucAction = 1;
  3490. break;
  3491. }
  3492. }
  3493. }
  3494. usVIPHttl = *((volatile UINT16*)(0xbe1cf010));
  3495. usVIPVcnt = *((volatile UINT16*)(0xbe1cf014));
  3496. if( sAdcInfo.ucSource != Adc_kSourceVGA )
  3497. {
  3498. if(abs(sAdcInfo.usHcount - usVIPHttl) > sAdcInfo.usHcountModeChange ||
  3499. abs(sAdcInfo.usVcount - usVIPVcnt) > sAdcInfo.usVcountModeChange)
  3500. {
  3501. printk(KERN_EMERG "[7] Mode change\n");
  3502. printk(KERN_EMERG "sAdcInfo: Hcount=%d Vcount=%d\n", sAdcInfo.usHcount, sAdcInfo.usVcount);
  3503. printk(KERN_EMERG "VIPHttl=%d VIPVcnt=%d\n", usVIPHttl, usVIPVcnt);
  3504. ucAction = 1;
  3505. }
  3506. }
  3507. }
  3508. else if( (usStatus & 0x4000) == 0x4000)
  3509. {
  3510. if( sAdcInfo.ucSource !=Adc_kSourceVGA )
  3511. ucAction = 2;
  3512. if( sAdcInfo.bSyncDetection==FALSE && sAdcInfo.ucInputMode != UNSUPPORT_MODE)
  3513. ADC_ScreenMode(BlackScreen);
  3514. printk(KERN_EMERG "Hsync Miss\n");
  3515. }
  3516. break;
  3517. }
  3518. printk(KERN_EMERG "CurSta=%x\n", ucCurState);
  3519. printk(KERN_EMERG "STAInt=%x\n", usStatus);
  3520. printk(KERN_EMERG "Action = <0x%x>\n", ucAction);
  3521. switch(ucAction)
  3522. {
  3523. case 0:
  3524. sAdcInfo.bSyncDetection=TRUE;
  3525. queue_delayed_work(pADC_WQSyncDetection, &ADCSyncDetectionThread, 0);
  3526. break;
  3527. case 1:
  3528. ADC_SyncDetectCreate();
  3529. break;
  3530. case 2:
  3531. queue_delayed_work(pADC_WQInterruptProcess, &ADCInterruptProcessThread, 0);
  3532. ADC_Interrupt(ENABLE, 0x000d);
  3533. sAdcInfo.ucInterruptEvent = CheckSogWidth;
  3534. if( sAdcInfo.bSyncDetection==FALSE )
  3535. ADC_ScreenMode(BlackScreen);
  3536. if( sAdcInfo.bInterruptHappen==TRUE )
  3537. sAdcInfo.bInterruptHappenAgain = TRUE;
  3538. sAdcInfo.bInterruptHappen = TRUE;
  3539. return;
  3540. case 5:
  3541. queue_delayed_work(pADC_WQInterruptProcess, &ADCInterruptProcessThread, 0);
  3542. ADC_Interrupt(ENABLE, 0x000d);
  3543. sAdcInfo.ucInterruptEvent = CheckSyncStable;
  3544. sAdcInfo.bInterruptHappen = TRUE;
  3545. return;
  3546. case 0xff:
  3547. break;
  3548. }
  3549. }
  3550. static irqreturn_t ADC_Isr(INT32 irq, void* dev_id, struct pt_regs *regs)
  3551. {
  3552. ADC_InterruptHandler();
  3553. return IRQ_HANDLED;
  3554. }
  3555. static struct irqaction adc_irqaction = {
  3556. .handler = (void*)&ADC_Isr,
  3557. .flags = 0,//SA_INTERRUPT,
  3558. .name = "adc",
  3559. };
  3560. static void ADC_Dispatch(struct pt_regs *regs)
  3561. {
  3562. do_IRQ(ADC_SYNC_IRQ);//,regs);
  3563. }
  3564. static irqreturn_t ADC_VGA_WakeupIsr(INT32 irq, void* dev_id, struct pt_regs *regs)
  3565. {
  3566. static UINT8 debounce = 0;
  3567. static BOOL VGAPlugStatus = FALSE;
  3568. //printk("\n >>>> VGA Wake up !!! (%d) ===> 0x703 = 0x%x , 0x70f = 0x%x ####\n", VGAPlugStatus, *((volatile UINT8*)0xbe0f0703), *((volatile UINT8*)0xbe0f070f) );
  3569. if( !VGAPlugStatus )
  3570. {
  3571. if( (sAdcInfo.bFactoryMode||(debounce > 1) ) &&
  3572. ((*((volatile UINT8*)0xbe0f070f)) & 1) )
  3573. {
  3574. VGAPlugStatus = TRUE;
  3575. printk("\n << VGA >> Notice Plug in\n\n");
  3576. noticekmf(KMF2UMF_EVID_ADC, KMF2UMF_EVTYPE_ADC_VGAPLUGIN, &VGAPlugStatus, sizeof(BOOL));
  3577. // Clear interrupt status => byte 0xbe0f0703 0xe0
  3578. *((volatile UINT8*)0xbe0f0703) = 0xe0;
  3579. // Disable connect event interrupt
  3580. *((volatile UINT8*)0xbe0f0703) = 0x00;
  3581. // Enable disconnect event interrupt
  3582. *((volatile UINT8*)0xbe0f070f) = 0xd0;
  3583. debounce = 0;
  3584. }
  3585. else
  3586. { // Clear interrupt status and enable connect event for debounce confirm
  3587. debounce++;
  3588. *((volatile UINT8*)0xbe0f0703) = 0xe0;
  3589. *((volatile UINT8*)0xbe0f070f) = 0x30;
  3590. }
  3591. }
  3592. else
  3593. {
  3594. if( (sAdcInfo.bFactoryMode||(debounce > 1) ) &&
  3595. ((*((volatile UINT8*)0xbe0f070f)) & 1) )
  3596. {
  3597. VGAPlugStatus = FALSE;
  3598. printk("\n << VGA >> Notice Plug out\n\n");
  3599. noticekmf(KMF2UMF_EVID_ADC, KMF2UMF_EVTYPE_ADC_VGAPLUGIN, &VGAPlugStatus, sizeof(BOOL));
  3600. // Clear interrupt status => byte 0xbe0f070f 0xf0
  3601. *((volatile UINT8*)0xbe0f070f) = 0xf0;
  3602. // Disable disconnect event interrupt
  3603. *((volatile UINT8*)0xbe0f070f) = 0x10;
  3604. // Enable connect event interrupt
  3605. *((volatile UINT8*)0xbe0f0703) = 0xc0;
  3606. debounce = 0;
  3607. }
  3608. else
  3609. {
  3610. // Clear interrupt status and enable disconnect event for debounce confirm
  3611. debounce++;
  3612. *((volatile UINT8*)0xbe0f070f) = 0xf0;
  3613. *((volatile UINT8*)0xbe0f0703) = 0x20;
  3614. }
  3615. }
  3616. //printk("\n <<<< VGA Wake up !!! (%d) ===> 0x703 = 0x%x , 0x70f = 0x%x ####\n", VGAPlugStatus, *((volatile UINT8*)0xbe0f0703), *((volatile UINT8*)0xbe0f070f) );
  3617. return IRQ_HANDLED;
  3618. }
  3619. static struct irqaction adc_vga_irqaction = {
  3620. .handler = (void*)&ADC_VGA_WakeupIsr,
  3621. .flags = 0,//SA_INTERRUPT,
  3622. .name = "VGA_Wakeup",
  3623. };
  3624. static void ADC_VGA_Plug(struct pt_regs *regs)
  3625. {
  3626. do_IRQ(ADC_VGA_WAKEUP_IRQ);//,regs);
  3627. }
  3628. void ADC_Standby(void)
  3629. {
  3630. sAdcInfo.bFactoryMode = TRUE;
  3631. // For easier wake up during standby state, decrease VGA-WAKEUP Bottom Range Number
  3632. *((volatile UINT8*)0xbe0f0700) = 0x01;
  3633. printk("\n >>>>>>> ADC Standby \n\n\n");
  3634. }
  3635. void ADC_WakeUp(void)
  3636. {
  3637. sAdcInfo.bFactoryMode = FALSE;
  3638. *((volatile UINT8*)0xbe0f0700) = 0x2e;
  3639. printk("\n >>>>>>> ADC Wake Up \n\n\n");
  3640. }
  3641. void ADC_ResetADI_Unlock(void)
  3642. {
  3643. //ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  3644. if(ADC_DetectTiming.ucVFrequency == 0)
  3645. return;
  3646. VIP_ResetADIEnable();
  3647. }
  3648. void ADC_SystemChipID(void)
  3649. {
  3650. sAdcInfo.ulChipID = ((*((UINT32 *)0xbe000000)&0xffff0000)>>8) | *((UINT8 *)0xbe000005);
  3651. ADC_DebugMsg("Chip ID=%x \n", sAdcInfo.ulChipID);
  3652. }
  3653. UINT8 DRV_ADC_DgSourceStatus(void)
  3654. {
  3655. //For the component CC 1 line shift issue
  3656. return ADC_Read(ADC_REG_source_sel);
  3657. }
  3658. EXPORT_SYMBOL(DRV_ADC_DgSourceStatus);
  3659. void ADC_OverSample(void)
  3660. {
  3661. if (sAdcInfo.ucSource == Adc_kSourceVGA)
  3662. {
  3663. if(g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr ].usHtotal<= 1024 && g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr ].ucPixelClock<42)
  3664. iEnlargeWidthRate = 1;
  3665. else if (((g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr ].usHtotal> 1024)&& (g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr ].usHtotal<= 2048) ) && (g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr ].ucPixelClock<84 ) )
  3666. iEnlargeWidthRate = 1;
  3667. else
  3668. iEnlargeWidthRate = 1;
  3669. }
  3670. else
  3671. {
  3672. if(g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr ].usHtotal<= 1024 && g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr ].ucPixelClock<42)
  3673. iEnlargeWidthRate = 1;
  3674. else if (((g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr ].usHtotal> 1024)&& (g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr ].usHtotal<= 2048) ) && (g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr ].ucPixelClock<84 ) )
  3675. iEnlargeWidthRate = 1;
  3676. else
  3677. iEnlargeWidthRate =1;
  3678. }
  3679. }
  3680. BOOL ADC_CheckInterlaceMode(void)
  3681. {
  3682. ADC_DebugMsg("%s %d\n", __FUNCTION__,__LINE__);
  3683. if ((abs(ADC_DetectTiming.usVcount - 262) <5 ) ||
  3684. (abs(ADC_DetectTiming.usVcount - 312) <5 ) ||
  3685. (abs(ADC_DetectTiming.usVcount - 562) <5 ))
  3686. {
  3687. ADC_DebugMsg( "Advance check Interlace Mode=%d \n", (ADC_DetectTiming.ucFlag & BIT0));
  3688. // ADC_DetectTiming.ucFlag |= 1;
  3689. return ((ADC_DetectTiming.ucFlag & BIT0)? 1:0);
  3690. }
  3691. else if ((abs(ADC_DetectTiming.usVcount - 525) <5 ) ||
  3692. (abs(ADC_DetectTiming.usVcount - 750) <5 )||
  3693. (abs(ADC_DetectTiming.usVcount - 1125) <5 ))
  3694. {
  3695. ADC_DebugMsg( "Advance check Progressive Mode=%d \n", (ADC_DetectTiming.ucFlag & BIT0));
  3696. // ADC_DetectTiming.ucFlag |= 0;
  3697. return ((ADC_DetectTiming.ucFlag & BIT0)? 0:1);
  3698. }
  3699. else if (abs(ADC_DetectTiming.usVcount - 625) <5 )
  3700. {
  3701. ADC_DebugMsg( "1050i@50Hz conflict with 576i@50hz use RegLowWidth=%d \n", sAdcInfo.ucRegLowWidth);
  3702. if (sAdcInfo.ucRegLowWidth < 250 )
  3703. ADC_DetectTiming.ucFlag = 1;
  3704. else
  3705. ADC_DetectTiming.ucFlag = 0;
  3706. return TRUE;
  3707. }
  3708. else
  3709. return FALSE;
  3710. }
  3711. #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,8)
  3712. LONG adc_ioctl(struct file *file,UINT32 cmd,ULONG arg)
  3713. #else
  3714. ssize_t adc_ioctl(struct inode *inode,struct file *file,UINT32 cmd,ULONG arg)
  3715. #endif
  3716. {
  3717. adc_ioctl_data parameter;
  3718. UINT8 ucColor, value = 0;
  3719. UINT16 usData[MaxColor];
  3720. #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,8)
  3721. down (&adc_ioctl_semaphore);
  3722. #endif
  3723. switch(cmd)
  3724. {
  3725. case ADC_IOCTL0:
  3726. //Get data from user space
  3727. //copy_from_user(&parameter,(void*)arg,sizeof(adc_ioctl_data));
  3728. //Do something ...
  3729. //printk("Get data from user application : 0x%08x\n",parameter.data);//example
  3730. //printk(KERN_EMERG"arg=%ld\n",arg);
  3731. //parameter.data&=0xffff0000; //example
  3732. //Write data into user space
  3733. //copy_to_user((void*)arg,&parameter,sizeof(adc_ioctl_data));
  3734. break;
  3735. case ADC_IOCTL1:
  3736. break;
  3737. case ADC_CHANGE_FLOW:
  3738. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3739. printk(KERN_EMERG"Auto flow=%d\n", parameter.bChangeFlow);
  3740. printk(KERN_EMERG"Timing=%d\n", parameter.ucMatchTablePtr);
  3741. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  3742. {
  3743. if(parameter.ucMatchTablePtr < g_stADCTimingTbl.VgaVideoTimingTblSize)
  3744. {
  3745. gAdcAp.bAutoFlow = parameter.bChangeFlow;
  3746. gAdcAp.ucMatchTable = parameter.ucMatchTablePtr;
  3747. ADC_SyncDetectCreate();
  3748. }
  3749. }
  3750. else
  3751. {
  3752. if(parameter.ucMatchTablePtr < g_stADCTimingTbl.YppVideoTimingTblSize)
  3753. {
  3754. gAdcAp.bAutoFlow = parameter.bChangeFlow;
  3755. gAdcAp.ucMatchTable = parameter.ucMatchTablePtr;
  3756. ADC_SyncDetectCreate();
  3757. }
  3758. }
  3759. break;
  3760. case ADC_AUTO_GAIN:
  3761. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3762. printk(KERN_EMERG "Auto Gain\n");
  3763. for(ucColor = RED; ucColor<MaxColor; ucColor++)
  3764. gAdcAp.ulTargetValue[ucColor] = parameter.ulTargetValue[ucColor];
  3765. gAdcAp.ulApPosition = parameter.ulPosition;
  3766. gAdcAp.bApUse = TRUE;
  3767. sAdcInfo.bSyncDetection = TRUE;
  3768. ADC_SearchGain(FALSE);
  3769. sAdcInfo.bSyncDetection = FALSE;
  3770. gAdcAp.bApUse = FALSE;
  3771. break;
  3772. case ADC_AUTO_OFFSET:
  3773. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3774. printk(KERN_EMERG "Auto Offset\n");
  3775. //enable the auto offset function of 9565 ADC Component mode
  3776. if(sAdcInfo.ucSource == Adc_kSourceCOMP1 || sAdcInfo.ucSource == Adc_kSourceCOMP2 || sAdcInfo.ucSource == Adc_kSourceCOMP3)
  3777. ADC_Write(ADC_REG_auto_ofsen, 0);
  3778. for(ucColor = RED; ucColor<MaxColor; ucColor++)
  3779. gAdcAp.ulTargetValue[ucColor] = parameter.ulTargetValue[ucColor];
  3780. gAdcAp.ulApPosition = parameter.ulPosition;
  3781. gAdcAp.bApUse = TRUE;
  3782. sAdcInfo.bSyncDetection = TRUE;
  3783. ADC_SearchDigitalOffset();
  3784. sAdcInfo.bSyncDetection = FALSE;
  3785. gAdcAp.bApUse = FALSE;
  3786. break;
  3787. case ADC_AUTO_WHITE_BALANCE:
  3788. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3789. printk(KERN_EMERG "Auto White Balance\n");
  3790. sAdcInfo.bSyncDetection = TRUE;
  3791. ADC_AutoColorCalibration();
  3792. sAdcInfo.bSyncDetection = FALSE;
  3793. break;
  3794. case ADC_AUTO_PHASE:
  3795. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3796. printk(KERN_EMERG "Auto Phase\n");
  3797. printk(KERN_EMERG "Phase =%d, Times=%d, Data=%d \n", parameter.ucPhase, parameter.ulTimes, parameter.ulData);
  3798. gAdcAp.bApUse = TRUE;
  3799. gAdcAp.ucPhase = parameter.ucPhase;
  3800. gAdcAp.ulTimes = parameter.ulTimes;
  3801. gAdcAp.ulData = parameter.ulData;
  3802. sAdcInfo.ucUserPhase = ADC_FullPhaseDetected();
  3803. gAdcAp.bApUse = FALSE;
  3804. break;
  3805. case ADC_NEW_AUTO_PHASE:
  3806. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3807. printk(KERN_EMERG "New Auto Phase\n");
  3808. printk(KERN_EMERG "Phase =%d, Times=%d, Data=%d \n", parameter.ucPhase, parameter.ulTimes, parameter.ulData);
  3809. gAdcAp.bApUse = TRUE;
  3810. gAdcAp.ucPhase = parameter.ucPhase;
  3811. gAdcAp.ulTimes = parameter.ulTimes;
  3812. gAdcAp.ulData = parameter.ulData;
  3813. bAutoAdjust = TRUE;
  3814. sAdcInfo.ucUserPhase = ADC_PhaseDetected();
  3815. bAutoAdjust = FALSE;
  3816. gAdcAp.bApUse = FALSE;
  3817. break;
  3818. case ADC_SET_GAIN:
  3819. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3820. printk(KERN_EMERG "Set Gain\n");
  3821. printk(KERN_EMERG "Color=%d, Data=%d\n", parameter.ucColor, parameter.ulData);
  3822. if(parameter.ucColor<3 && parameter.ulData<512)
  3823. ADC_SetGainDirdect(parameter.ucColor, parameter.ulData);
  3824. else
  3825. printk(KERN_EMERG "Error!!Data is too large\n");
  3826. break;
  3827. case ADC_SET_OFFSET:
  3828. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3829. printk(KERN_EMERG "Set Offset\n");
  3830. printk(KERN_EMERG "Color=%d, Data=%d\n", parameter.ucColor, parameter.ulData);
  3831. if(parameter.ucColor<3 && parameter.ulData<512)
  3832. DRV_ADC_SetOffset(parameter.ucColor, parameter.ulData);
  3833. else
  3834. printk(KERN_EMERG "Error!!Data is too large\n");
  3835. break;
  3836. case ADC_GET_GAIN:
  3837. printk(KERN_EMERG "Get Gain\n");
  3838. for(ucColor=RED; ucColor<MaxColor; ucColor++)
  3839. usData[ucColor] = ADC_GetGain(ucColor);
  3840. printk(KERN_EMERG "[R] %d [G] %d [B] %d\n", usData[RED], usData[GREEN], usData[BLUE]);
  3841. break;
  3842. case ADC_GET_OFFSET:
  3843. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3844. printk(KERN_EMERG "Get Offset\n");
  3845. if(ADC_Read(ADC_REG_dofst_r) == 1)
  3846. usData[RED]=(INT16)(ADC_GetOffset(RED) + 255);
  3847. else
  3848. usData[RED]=(INT16)(abs(ADC_GetOffset(RED) - 255));
  3849. if(ADC_Read(ADC_REG_dofst_g) == 1)
  3850. usData[GREEN]=(INT16)(ADC_GetOffset(GREEN) + 255);
  3851. else
  3852. usData[GREEN]=(INT16)(abs(ADC_GetOffset(GREEN) - 255));
  3853. if(ADC_Read(ADC_REG_dofst_b) == 1)
  3854. usData[BLUE]=(INT16)(ADC_GetOffset(BLUE) + 255);
  3855. else
  3856. usData[BLUE]=(INT16)(abs(ADC_GetOffset(BLUE) - 255));
  3857. printk(KERN_EMERG "[R] %d [G] %d [B] %d\n", usData[RED], usData[GREEN], usData[BLUE]);
  3858. break;
  3859. case ADC_SET_PHASE:
  3860. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3861. printk(KERN_EMERG "Set Phase: %d \n", parameter.ucPhase);
  3862. if(parameter.ucPhase < 32)
  3863. ADC_SetPhaseDirdect(parameter.ucPhase);
  3864. else
  3865. printk(KERN_EMERG "Error! Wrong phase=%d\n", parameter.ucPhase);
  3866. break;
  3867. case ADC_DBG:
  3868. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3869. if(gAdcAp.bDisableInterrupt)
  3870. {
  3871. gAdcAp.bDisableInterrupt = FALSE;
  3872. if(sAdcInfo.bSyncDetection==FALSE && sAdcInfo.ucInputMode == NOSIGNAL_MODE)
  3873. {
  3874. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  3875. {
  3876. ADCTimerInfo[TimerVsyncloss][1] = 0;
  3877. ADC_Interrupt(ENABLE, 0x2000);
  3878. }
  3879. else
  3880. {
  3881. ADC_Interrupt(ENABLE, 0x02);
  3882. ADCTimerInfo[TimerSignaloff][1] = 1;
  3883. }
  3884. }
  3885. else
  3886. {
  3887. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  3888. {
  3889. ADCTimerInfo[TimerVsyncloss][1] = 1;
  3890. ADC_Interrupt(ENABLE, 0x7030);
  3891. }
  3892. else
  3893. ADC_Interrupt(ENABLE, 0x478f);
  3894. }
  3895. }
  3896. else
  3897. {
  3898. ADC_Interrupt(DISABLE, 0);
  3899. gAdcAp.bDisableInterrupt = TRUE;
  3900. if(sAdcInfo.ucSource != Adc_kSourceVGA)
  3901. ADCTimerInfo[TimerSignaloff][1] = 0;
  3902. }
  3903. printk(KERN_EMERG "Debug: %d\n", gAdcAp.bDisableInterrupt);
  3904. break;
  3905. case ADC_DISABLE_VIP_PROCESS:
  3906. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3907. if(gAdcAp.bDisableInterrupt)
  3908. {
  3909. gAdcAp.bDisableInterrupt = FALSE;
  3910. *((volatile UINT8*)0xbe1c6190) = 1;
  3911. printk(KERN_EMERG "VDI bypass on (NR off)\n");
  3912. }
  3913. else
  3914. {
  3915. gAdcAp.bDisableInterrupt = TRUE;
  3916. *((volatile UINT8*)0xbe1c6190) = 0;
  3917. printk(KERN_EMERG "VDI bypass off (NR on)\n");
  3918. }
  3919. break;
  3920. case ADC_CENTER:
  3921. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3922. printk(KERN_EMERG "Do Centering\n");
  3923. ADC_Centering(1);
  3924. ADC_InfoSet(VIP_HPOS, 0);
  3925. ADC_InfoSet(VIP_VPOS, 0);
  3926. noticekmf(KMF2UMF_EVID_AUDIO, KMF2UMF_EVTYPE_AUDIO_HEADPHONE, &value, 1);
  3927. break;
  3928. case ADC_SET_CLOCK:
  3929. copy_from_user(&parameter,(pAdc_ioctl_data)arg,sizeof(adc_ioctl_data));
  3930. printk(KERN_EMERG "Set Clock\n");
  3931. if (parameter.ulClock == 0)
  3932. {
  3933. if(sAdcInfo.ucSource == Adc_kSourceVGA)
  3934. printk(KERN_EMERG "Init Htotal is %d\n", g_stADCTimingTbl.pVgaVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHtotal);
  3935. else
  3936. printk(KERN_EMERG "Init Htotal is %d\n", g_stADCTimingTbl.pYppVideoTimingTable[sAdcInfo.ucMatchTablePtr].usHtotal);
  3937. }
  3938. else
  3939. {
  3940. DRV_ADC_SetHTotal(parameter.ulClock);
  3941. printk(KERN_EMERG "current Htotal is %d\n", parameter.ulClock);
  3942. }
  3943. break;
  3944. }
  3945. #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,8)
  3946. up(&adc_ioctl_semaphore);
  3947. #endif
  3948. return 0;
  3949. }
  3950. struct file_operations adc_fops = {
  3951. #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,8)
  3952. .unlocked_ioctl = adc_ioctl,
  3953. #else
  3954. .ioctl = adc_ioctl,
  3955. #endif
  3956. .owner = THIS_MODULE,
  3957. };
  3958. INT32 __init DRV_ADC_Linuxinit(void)
  3959. {
  3960. INT32 err,devno;
  3961. UINT32 CPLL_MClk = 0;
  3962. UINT32 ratio = 0;
  3963. printk(KERN_EMERG"%s: \n",__FUNCTION__);
  3964. ADC_SystemChipID();
  3965. DRV_ADC_power(ENABLE);
  3966. devno=MKDEV(ADC_DEV_MAJOR,0);
  3967. cdev_adc = cdev_alloc();
  3968. cdev_adc->owner = THIS_MODULE;
  3969. cdev_adc->ops = &adc_fops;
  3970. err = cdev_add (cdev_adc,devno,1);
  3971. set_vi_handler(ADC_SYNC_IRQ,(void*)&ADC_Dispatch);
  3972. setup_irq(ADC_SYNC_IRQ,&adc_irqaction);
  3973. set_vi_handler(ADC_VGA_WAKEUP_IRQ, (void*)&ADC_VGA_Plug);
  3974. setup_irq(ADC_VGA_WAKEUP_IRQ,&adc_vga_irqaction);
  3975. // Enable VGA-WAKEUP Function & Interrupt
  3976. *((volatile UINT8*)0xbe0f0703) = 0xc0;
  3977. // Setup Top Range Number for VGA WAKEUP event trigering
  3978. *((volatile UINT8*)0xbe0f0701) = 0xff;
  3979. // VGA INTERUPT SELECTION(0x70f[4])
  3980. // 1: To detect vsync or hsync / 0: To detect vsync and hsync
  3981. *((volatile UINT8*)0xbe0f070f) = 0x10;
  3982. pADC_WQSyncDetection=create_workqueue("adc");
  3983. flush_workqueue(pADC_WQSyncDetection);
  3984. print_meminfo("Register SyncDetection WorkQueue Done");
  3985. pADC_WQInterruptProcess=create_workqueue("adc_interrupt");
  3986. flush_workqueue(pADC_WQInterruptProcess);
  3987. print_meminfo("Register InterruptProcess WorkQueue Done");
  3988. pADC_WQTunerStrength=create_workqueue("adc_TunerStrength");
  3989. flush_workqueue(pADC_WQTunerStrength);
  3990. print_meminfo("Register TunerStrength WorkQueue Done");
  3991. #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,8)
  3992. sema_init(&adc_ioctl_semaphore, 1);
  3993. #endif
  3994. if (err)
  3995. printk(KERN_NOTICE "ADC Init Failed\n");
  3996. // Get 2x CPLL CLK
  3997. CPLL_MClk= drv_get_device_clock(CPLL_CLK);
  3998. CPLL_MClk = CPLL_MClk/1000;
  3999. // Convert to 1x ratio for 24.576
  4000. ratio = CPLL_MClk / System_CLK / 2 ;
  4001. // CPU PLL Divider
  4002. ADC_Write(GLB_REG_A1ECO_CPLL_CEN_COMP, 1);
  4003. ADC_Write(GLB_REG_A1ECO_CPLL_PTXCLK_DIV, ratio - 1 );
  4004. printk(KERN_EMERG" ratio = CPLL / 24576. Clock CPLL(%d) , ratio = (PTXCLK_DIV + 1) = %d \n ", CPLL_MClk, ratio);
  4005. ADC_Open();
  4006. ADC_Write(GLB_REG_global_reset, 1);
  4007. sAdcInfo.bFirstPowerOn = TRUE;
  4008. DRV_ADC_power(DISABLE);
  4009. printk(KERN_EMERG"%s: return\n",__FUNCTION__);
  4010. return 0;
  4011. }
  4012. INT32 adc_AdjustFunction(UINT8 ucFunID, INT32 iValue)
  4013. {
  4014. //ptv_base_t ptv = getptvdev();
  4015. INT32 retval = 0;
  4016. UINT8 value = 0;
  4017. switch(ucFunID)
  4018. {
  4019. case ADC_CMD_AUTOADJUST:
  4020. #ifdef CONFIG_AutoAdjust_BlackScreen
  4021. ADC_ScreenMode(BlackScreen);
  4022. #endif
  4023. bAutoAdjust = TRUE;
  4024. bCheckVIPHttl = FALSE;
  4025. DRV_ADC_SetHTotal(ADC_InputVesaTiming.usHtotal); //richie add, Before do Autotune, need reset Adc Pll clock to default value, or PC Autotune is sometimes wrong
  4026. #ifdef CONFIG_SUPPORT_ACTION_SHOW_BLUE_SCREEN_EXCEPT_MEDIA
  4027. {
  4028. VIP_Mute_Flag_st stStauts;
  4029. VIP_GetMuteStatus(&stStauts);
  4030. if (stStauts.fTVFEMuteFlag == FALSE && stStauts.fAppMuteFlag == FALSE && stStauts.fVIPMuteFlag == FALSE)
  4031. {
  4032. VIP_SetVideoMuteColor(0,0,0);
  4033. }
  4034. }
  4035. #endif
  4036. ADC_DoAuto(NULLOP, iValue, 2); //YPP & PC source will do centering by 2 in factory mode
  4037. noticekmf(KMF2UMF_EVID_ADC, KMF2UMF_EVTYPE_ADC_PCSETUPDATE, &value, 1);
  4038. bCheckVIPHttl = TRUE;
  4039. bAutoAdjust = FALSE;
  4040. #ifdef CONFIG_AutoAdjust_BlackScreen
  4041. ADC_ScreenMode(NormalScreen);
  4042. #endif
  4043. break;
  4044. case ADC_CMD_PHASE:
  4045. DRV_ADC_SetPhase(iValue);
  4046. break;
  4047. case ADC_CMD_GAIN_R:
  4048. DRV_ADC_SetGain(RED,iValue);
  4049. break;
  4050. case ADC_CMD_GAIN_G:
  4051. DRV_ADC_SetGain(GREEN,iValue);
  4052. break;
  4053. case ADC_CMD_GAIN_B:
  4054. DRV_ADC_SetGain(BLUE,iValue);
  4055. break;
  4056. case ADC_CMD_OFFSET_R:
  4057. DRV_ADC_SetOffset(RED,iValue);
  4058. break;
  4059. case ADC_CMD_OFFSET_G:
  4060. DRV_ADC_SetOffset(GREEN,iValue);
  4061. break;
  4062. case ADC_CMD_OFFSET_B:
  4063. DRV_ADC_SetOffset(BLUE,iValue);
  4064. break;
  4065. case ADC_CMD_WHITEBALANCE:
  4066. bAutoWB = TRUE;
  4067. FactoryModeAWB = TRUE;
  4068. ADC_AutoColorCalibration();
  4069. FactoryModeAWB = FALSE;
  4070. bAutoWB = FALSE;
  4071. break;
  4072. #ifdef CONFIG_DDC_CI_SUPPORT
  4073. case ADC_CMD_DDCCI_OSD_PHASE:
  4074. sAdcInfo.DDCCI_OSDPhase = iValue;
  4075. break;
  4076. case ADC_CMD_DDCCI_OSD_CLOCK:
  4077. sAdcInfo.DDCCI_OSDClock = iValue;
  4078. break;
  4079. #endif
  4080. default:
  4081. //KMFDBG(0,"kmf_ioctl_adjustADC: Error occur %d\n", ucFunID);
  4082. retval = -EFAULT;
  4083. break;
  4084. }
  4085. return retval;
  4086. }
  4087. void __exit DRV_ADC_Linuxexit(void)
  4088. {
  4089. ADC_Close();
  4090. destroy_workqueue(pADC_WQSyncDetection);
  4091. destroy_workqueue(pADC_WQInterruptProcess);
  4092. destroy_workqueue(pADC_WQTunerStrength);
  4093. cdev_del(cdev_adc);
  4094. free_irq(ADC_SYNC_IRQ, NULL);
  4095. }
  4096. void ADC_GetVideoTimingTable(void)
  4097. {
  4098. GetCustomerData("YppModeTable", (void *)&g_stADCTimingTbl.pYppVideoTimingTable, &g_stADCTimingTbl.YppVideoTimingTblSize);
  4099. GetCustomerData("VgaModeTable", (void *)&g_stADCTimingTbl.pVgaVideoTimingTable, &g_stADCTimingTbl.VgaVideoTimingTblSize);
  4100. //Calc Table Size
  4101. g_stADCTimingTbl.YppVideoTimingTblSize = g_stADCTimingTbl.YppVideoTimingTblSize/sizeof(VesaTiming);
  4102. g_stADCTimingTbl.VgaVideoTimingTblSize = g_stADCTimingTbl.VgaVideoTimingTblSize/sizeof(VesaTiming);
  4103. }
  4104. void DRV_ADC_SetAdcPinConfig(UINT32 itype, InputVideoConf_st InputSrcPin)
  4105. {
  4106. ADC_DebugMsg("%s: \n",__FUNCTION__);
  4107. switch (itype)
  4108. {
  4109. case INPUT_TYPE_AV:
  4110. ADC_DebugMsg("AV soruce: (%d)\n", InputSrcPin.cvbs.pin);
  4111. adc_InputSrcPin.cvbs.pin =InputSrcPin.cvbs.pin;
  4112. break;
  4113. case INPUT_TYPE_SV:
  4114. ADC_DebugMsg("SV soruce: (%d, %d)\n", InputSrcPin.svideo.y_pin, InputSrcPin.svideo.c_pin);
  4115. adc_InputSrcPin.svideo.y_pin = InputSrcPin.svideo.y_pin;
  4116. adc_InputSrcPin.svideo.c_pin = InputSrcPin.svideo.c_pin;
  4117. break;
  4118. case INPUT_TYPE_COMPONENT:
  4119. ADC_DebugMsg("YPP soruce: (%d, %d, %d, %d)\n", InputSrcPin.ypbpr.y_pin, InputSrcPin.ypbpr.pb_pin, InputSrcPin.ypbpr.pr_pin, InputSrcPin.ypbpr.soy_pin);
  4120. adc_InputSrcPin.ypbpr.y_pin = InputSrcPin.ypbpr.y_pin;
  4121. break;
  4122. case INPUT_TYPE_PC:
  4123. ADC_DebugMsg("PC soruce: (%d, %d, %d)\n", InputSrcPin.rgb.r_pin, InputSrcPin.rgb.g_pin, InputSrcPin.rgb.b_pin);
  4124. adc_InputSrcPin.rgb.r_pin = InputSrcPin.rgb.r_pin;
  4125. adc_InputSrcPin.rgb.g_pin = InputSrcPin.rgb.g_pin;
  4126. adc_InputSrcPin.rgb.b_pin = InputSrcPin.rgb.b_pin;
  4127. default:
  4128. break;
  4129. }
  4130. }
  4131. EXPORT_SYMBOL(DRV_ADC_SetAdcPinConfig);
  4132. #ifndef INIT_BY_KMF
  4133. module_init(DRV_ADC_Linuxinit);
  4134. module_exit(DRV_ADC_Linuxexit);
  4135. #endif
  4136. EXPORT_SYMBOL(DRV_ADC_Linuxinit);
  4137. EXPORT_SYMBOL(DRV_ADC_Linuxexit);
  4138. MODULE_LICENSE("ADC Driver 07.01.2009");