UTS6710/drivers/include/drv_dtv_external.h

#ifndef _DTV_IOCTL_H_
#define _DTV_IOCTL_H_

#include <linux/ioctl.h>
#include "drv_types.h"

#define MPO_IMAGE 0

// ******************************
// 	mmap region selection
// ******************************
#define	DTVDEMUX_MMAP_CC                                0

#define	DTVDEMUX_MMAP_TIMESHIFT_RECORD	                1
#define DTVDEMUX_MMAP_TIMESHIFT_RW_POINT_INFO						2

#define MAPMEM_POWER_RECORD                             10      //2(10) x  4096 = 4MB
#define MAPMEM_SIZE_RECORD                              4096    //4KB

#define MAPMEM_POWER_RWPOINTINFO                        0       //2(0) x  4096 = 4KB
#define MAPMEM_SIZE_RWPOINTINFO                         4096    //4KB

typedef struct _DMIOC_IOData
{
    // for reallocated I/O
    UINT16    port;
    UINT8    index;
    UINT8    value;
} DMIOC_IOData, *DMIOC_IODataPtr;

typedef struct _DMIOC_MMIOData
{
    UINT32   addr;
    UINT32   value;
} DMIOC_MMIOData, *DMIOC_MMIODataPtr;

#define INITIAL_RING_NUM    0xFF

// ******************************
// 	Subtitle
// ******************************
typedef enum __attribute__ ((__packed__))
{
    GET_CMD_BUF,
    START_SUBTITLE,
    STOP_SUBTITLE,
	GET_VIDEO_OFFSET,
} SUBTITLE_OPS;

typedef enum __attribute__ ((__packed__))
{
    SUB_OPS_OK,
    SUB_OPS_NO_SUB, // no subtitle data now
    SUB_OPS_BUFFSIZE_SMALL, // cmdBufSize is too small
} SUB_OPS_STATE;

typedef struct _DMIOC_SUBTITLEData
{
    SUBTITLE_OPS  ops;
    SUB_OPS_STATE ops_state;
    UINT8*        cmdBuf;
    UINT32        cmdBufSize; // cmdBuf buffer size (AP --> driver)
    UINT32        Size; // data size in cmdBuf buffer (driver --> AP)
    UINT32        PTS;
    //UINT32        PTS_High; unused now
	UINT32		  VideoOffset;
} DMIOC_SUBTITLEData, *DMIOC_SUBTITLEDataPtr;

// ******************************
// 	CC Data
// ******************************
#define CAPTION_CMDBUF_SIZE     16*1024     // cmdbuf_num = (CAPTION_CMDBUF_SIZE-4)/sizeof(CCDataStruc) = 117
#define CAPTION_DATA_SIZE       128

#define CCTYPE_DTVCC 1
#define CCTYPE_SCTE_20 3
#define CCTYPE_SCTE_21 2

typedef struct _CCDataStruct
{
    UINT8        Flag;
    UINT8        CCTYPE;
    UINT8        Reserved;
    UINT8        PTS_High;
    UINT8        Top_Field_First; //20091012 lwhite add
    UINT32       PTS;
    UINT32       dwSize;
    UINT8        pBuffer[CAPTION_DATA_SIZE];
} CCDataStruct, *CCDataStructPtr;

// ******************************
// 	Timeshift/PVR 
// ******************************
typedef struct _tagTimeShift
{
    UINT8    m_nCommand;
    UINT8    m_nTsStatus;

    UINT32   FrameRate;

    UINT32   record_mem_size;
    UINT8    m_bRecFullTs;
    UINT8    m_nPids;
    UINT16 * m_pPids;

}TIME_SHIFT,*PTIME_SHIFT,
DMIOC_TimeShift_IOControl, *DMIOC_TimeShift_IOControlPtr;

typedef enum
{
	TSS_FAIL,
	TSS_SUCCESS,
	TSS_WAIT,
}TIME_SHIFT_STATUS;

typedef enum
{
    IOCTL_RECORD_GET_MEMSIZE,

    IOCTL_RECORD_INIT,
    IOCTL_RECORD_EXIT,

    IOCTL_PLAY_INIT,
    IOCTL_PLAY_EXIT,

    IOCTL_RECORD_ADD_PID,
    IOCTL_RECORD_DEL_PID,

}TIME_SHIFT_COMMAND;

enum
{
    TS_SYNCBYTE_NOT_FOUND,
    TS_SYNCBYTE_FOUND,
    TS_CROSSING_BUFF_MODE,   
};

typedef struct _tagRW_POINT_INFO
{
	UINT32 m_dwTogStart;
	UINT32 m_dwPointer;
	UINT32 m_pReserved[5];
	UINT32 m_dwTogEnd;
}RW_POINT_INFO,*PRW_POINT_INFO;

typedef struct	_TS_MAP_MEMORY_RWPTR_STRUCT
{
	union{
	 	UINT32 play_write_ptr[8];
	    struct{
	     UINT32 pw_tog_start;
	     UINT32 pw_write_ptr;
 	     UINT32 pw_isEOF;
	     UINT32 pw_reserved[4];
	      UINT32 pw_tog_end;
	   };
	};

	union{
	 	UINT32 play_read_ptr[8];
	    struct{
	     UINT32 pr_tog_start;
	     UINT32 pr_write_ptr;
	     UINT32 pr_isPlayEOF;
	     UINT32 pr_reserved[4];
	      UINT32 pr_tog_end;
	   };
	};

	UINT32 reserved1[8];
	UINT32 reserved2[8];
	union{
	 	UINT32 record_write_ptr[8];
	    struct{
	     UINT32 rw_tog_start;
	     UINT32 rw_write_ptr;
	     UINT32 rw_reserved[5];
	     UINT32 rw_tog_end;
	   };
	};

	union{
	 	UINT32 record_read_ptr[8];
	    struct{
	     UINT32 rr_tog_start;
	     UINT32 rr_write_ptr;
	     UINT32 rr_reserved[5];
	      UINT32 rr_tog_end;
	   };
	};
	UINT32 reserved3[8];
	UINT32 reserved4[8];

} TS_MAP_MEMORY_RWPTR_STRUCT, *TS_MAP_MEMORY_RWPTR_STRUCT_PTR;

typedef struct _TS_HEADER
{
    union{
        struct
        {
            UINT32 continuity_counter:4;
            UINT32 adaptation_field_control:2;
            UINT32 transport_scrambling_control:2;
            UINT32 PID:13;
            UINT32 transport_priority:1;
            UINT32 payload_unit_start_indicator:1;
            UINT32 transport_err_byte:1;
            UINT32 sync_byte:8;
        };
        UINT32 dw;
    };

    union{
        struct
        {
            UINT8 adapt_field_extern_flag:1;
            UINT8 ts_private_data_flag:1;
            UINT8 splicing_point_flag:1;
            UINT8 OPCR_FLAG:1;
            UINT8 PCR_FLAG:1;
            UINT8 elementary_stream_priority_indicator:1;
            UINT8 random_access_indicator:1;
            UINT8 discontinuity_indicator:1;
        };
        UINT8 adapt_control_bytes;
    };    
    
}TS_HEADER, *TS_HEADERPTR;



// ******************************
// 	MPO
// ******************************
#ifdef MPO_IMAGE
typedef struct  _MPOaddr
{
 ULONG addrY;
 ULONG addrUV;
}MPOaddr,*MPOaddrPtr;

typedef struct _MPO_Data
{
        UINT8 MPO_isStart;
        ULONG Width;
        ULONG Height;
        MPOaddr Outputaddr[2];
}DMIOC_MPO_Data,*DMIOC_MPO_DataPtr;
#endif

/***************************************/
/*					Demux					*/
/***************************************/
#define DMIOC_MAGIC     's'
enum {
		ENUM_DTV_IOCTL_R_IO,
		ENUM_DTV_IOCTL_W_IO,
		ENUM_DTV_IOCTL_R_MIO, 
		ENUM_DTV_IOCTL_W_MIO, 
		ENUM_DTV_IOCTL_SUBTITLE_OPS,
		ENUM_DTV_IOCTL_GET_STC,
		ENUM_DTV_IOCTL_TIMESHIFT,
		ENUM_DTV_IOCTL_MPO,
        ENUM_DTV_IOCTL_DTV_INIT,
        ENUM_DTV_IOCTL_DTV_EXIT,
        ENUM_DTV_IOCTL_SetPCR,
        ENUM_DTV_IOCTL_RingConfig,
        ENUM_DTV_IOCTL_SetRing,
        ENUM_DTV_IOCTL_SetSectFilter,
        ENUM_DTV_IOCTL_CopyFilterSection,
		ENUM_DTV_IOCTL_SET_DECRYPTIONKEY,
		ENUM_DTV_IOCTL_SET_CAMSTATUS,
        ENUM_DTV_IOCTL_Set_Video_Freeze,
		ENUM_DTV_IOCTL_VIDEO_MUTE_CONTROL,
        ENUM_DTV_IOCTL_Get_Video_Info,
        ENUM_DTV_IOCTL_MHEG_AUDIO_CMD,
        ENUM_DTV_IOCTL_AUDIO_MUTE_CONTROL,
        ENUM_DTV_IOCTL_MHEG_VIDEO_CMD,
#ifdef CONFIG_SUPPORT_SCART_OUT
        ENUM_DTV_IOCTL_Set_Audio_ADInfo,
#endif
#ifdef CONFIG_SUPPORT_EWS
        ENUM_DTV_IOCTL_Set_EWS_Data,
#endif
#ifdef CONFIG_SUPPORT_INDONESIA_EWS
        ENUM_DTV_IOCTL_EWS_AUDIO_CMD,
#endif
        ENUM_DTV_IOCTL_MAXINDEX
};

#define DMIOC_R_IO                              _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_R_IO,					    DMIOC_IOData)
#define DMIOC_W_IO                              _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_W_IO,           			DMIOC_IOData)
#define DMIOC_R_MIO                             _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_R_MIO,          			DMIOC_MMIOData)
#define DMIOC_W_MIO                             _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_W_MIO,          			DMIOC_MMIOData)
#define DMIOC_SUBTITLE_OPS                      _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_SUBTITLE_OPS,   			DMIOC_SUBTITLEData)
#define DMIOC_GET_STC                           _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_GET_STC,        			UINT8 *)
#define DMIOC_TIMESHIFT                         _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_TIMESHIFT,      			DMIOC_TimeShift_IOControl)
#ifdef MPO_IMAGE
#define DMIOC_Show_MPO_Data 					_IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_MPO, 					    DMIOC_MPO_Data)
#endif
#define DTV_IOCTL_INIT    			            _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_DTV_INIT,                 DMIOC_DTV_PARAM)
#define DTV_IOCTL_EXIT   			            _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_DTV_EXIT,                 DMIOC_DTV_PARAM)
#define DTV_IOCTL_SetPCR			            _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_SetPCR,                   DMIOC_SETPCR_PARAM)
#define DTV_IOCTL_RingConfig			        _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_RingConfig,               DMIOC_RINGCFG_PARAM)
#define DTV_IOCTL_SetRing			            _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_SetRing,                  DMIOC_SETRING_PARAM)
#define DTV_IOCTL_SetSectFilter			        _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_SetSectFilter,            DMIOC_SetSectFilter_PARAM)
#define DTV_IOCTL_CopyFilterSection			    _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_CopyFilterSection,        DMIOC_COPYFILTERSEC_PARAM)
#define DTV_IOCTL_SetVideoFreeze                _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_Set_Video_Freeze,         DMIOC_SETVIDEOFREEZE_PARAM)
#define DTV_IOCTL_SET_DECRYPTIONKEY				_IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_SET_DECRYPTIONKEY,		DMIOC_DTV_PARAMPTR)
#define DTV_IOCTL_SET_CAMSTATUS     			_IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_SET_CAMSTATUS,        	DMIOC_DTV_PARAMPTR)
#define DTV_IOCTL_VIDEO_MUTE_CONTROL			_IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_VIDEO_MUTE_CONTROL, 		DMIOC_VIDEMUTECONTROL_PARAM)
#define DTV_IOCTL_GetVideoInfo                  _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_Get_Video_Info,           DMIOC_GETVIDEOINFO_PARAM)
#ifdef CONFIG_SUPPORT_MHEG5
#define DTV_IOCTL_MHEG_AUDIO_CMD                _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_MHEG_AUDIO_CMD,           DMIOC_MPEG_AUDIO_PARAM)
#define DTV_IOCTL_AUDIO_MUTE_CONTROL            _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_AUDIO_MUTE_CONTROL,       UINT8)
#define DTV_IOCTL_MHEG_VIDEO_CMD                _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_MHEG_VIDEO_CMD,           DMIOC_MHEG_VIDEO_PARAM)
#endif
#ifdef CONFIG_SUPPORT_SCART_OUT
#define DTV_IOCTL_SetAUDIO_ADINFO               _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_Set_Audio_ADInfo,         DMIOC_AUDIO_ADINFO_PARAM)
#endif
#ifdef CONFIG_SUPPORT_EWS
#define DTV_IOCTL_Set_EWS_Data              _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_Set_EWS_Data,         DMIOC_SET_EWS_PARAM)
#endif

#ifdef CONFIG_SUPPORT_INDONESIA_EWS
#define DTV_IOCTL_handle_EWS_File_Sound         _IOWR(DMIOC_MAGIC, ENUM_DTV_IOCTL_EWS_AUDIO_CMD,           DMIOC_MPEG_AUDIO_PARAM)
#endif

// ******************************
//
//  Demux Interface
//
// ******************************
#define SISDEMUX_DEV_FILE          "/dev/sisdemux0"
#define SISDEMUX_DEV_NUM           1       // Max number of device

#define SISDEMUX_DEVDATA_SIZE      4096    // 4K Device Data

#define DEMUX_SECTION_FILTER_LENGTH 10
#define DEMUX_SECTION_FILTER_CRC_LENGTH 4
#define MAX_PIDFLT_NUM      128

typedef struct _DMIOC_DTV_POWER_PARAM_
{
    UINT8 bEnable;
}DMIOC_DTV_POWER_PARAM, *DMIOC_DTV_POWER_PARAMPTR;

typedef struct _DMIOC_DTV_PARAM_
{
    INT32 	DemuxUnit;
    UINT8 	bSerial;
	UINT8 	bExternal_TS;
    UINT64 	Decryption_Key;
	UINT8 	bPanelInvert_Mode;
	UINT8 	bCamExist;
}DMIOC_DTV_PARAM, *DMIOC_DTV_PARAMPTR;

typedef struct _DMIOC_SETPCR_PARAM_
{
    INT32 DemuxUnit;
    UINT32 PCR_PID;
}DMIOC_SETPCR_PARAM, *DMIOC_SETPCR_PARAMPTR;

typedef struct _DMIOC_SetAPPID_PARAM_
{
    UINT32 AP_PID;  
}DMIOC_SetAPPID_PARAM, *DMIOC_SetAPPID_PARAMPTR;

typedef struct _DMIOC_RINGCFG_PARAM_
{
    INT32 DemuxUnit;
    INT32 StreamType;
    INT32 RingType;
    UINT32 PID;
    UINT16  filter_id;
    void * Queue_ID; //by middleware used
    UINT8 AudioType;
    INT32 retval;	
}DMIOC_RINGCFG_PARAM, *DMIOC_RINGCFG_PARAMPTR;

typedef struct _DMIOC_SETRING_PARAM_
{
    UINT8 bEnable;
    INT32 Config_idx;
}DMIOC_SETRING_PARAM, *DMIOC_SETRING_PARAMPTR;

typedef struct _DMIOC_SetSectFilter_PARAM_
{
    UINT8 bModify;
    INT32 Config_idx;
    UINT8 match[DEMUX_SECTION_FILTER_LENGTH];
    UINT8 mask[DEMUX_SECTION_FILTER_LENGTH];
    UINT8 bNegmask;
    UINT8 negmask[DEMUX_SECTION_FILTER_LENGTH];
	UINT8 bNegmask_CRC;
	UINT8 negmask_CRC[DEMUX_SECTION_FILTER_CRC_LENGTH];
    UINT8 not_equal_byte_index;
    UINT8 crc;
	UINT8 skip_conti_crc;
}DMIOC_SetSectFilter_PARAM, *DMIOC_SetSectFilter_PARAMPTR;

typedef struct _DMIOC_COPYFILTERSEC_PARAM_
{   
    UINT8 * buffer;
    INT32 size;
    UINT16 Filt_ID;
    UINT8 retval;
}DMIOC_COPYFILTERSEC_PARAM, *DMIOC_COPYFILTERSEC_PARAMPTR;

typedef struct _DMIOC_SETVIDEOFREEZE_PARAM
{
    UINT8 bEnable;
}DMIOC_SETVIDEOFREEZE_PARAM, *DMIOC_SETVIDEOFREEZE_PARAMPTR;

typedef struct _DMIOC_VIDEMUTECONTROL_PARAM
{
    UINT8 bEnable;
}DMIOC_VIDEMUTECONTROL_PARAM, *DMIOC_VIDEMUTECONTROL_PARAMPTR;

typedef struct _DMIOC_GETVIDEOINFO_PARAM
{
    UINT32   dHorizontalSize;            /*!<  Horizontal Size of Video*/
    UINT32   dVerticalSize;              /*!<  Vertical Size of Video*/
    UINT32   dFrameRate;                 /*!<  Frame Rate of Video*/
    UINT8  aspect_ratio;               /*!<  Aspect Ratio of Video*/
    UINT8  progressive_sequence;       /*!<  Interface or progressive of Video*/
	UINT8	bAVSPLUS;					/*!<  video type is avsplus?*/
}DMIOC_GETVIDEOINFO_PARAM, *DMIOC_GETVIDEOINFO_PARAMPTR;

#ifdef CONFIG_SUPPORT_SCART_OUT
typedef struct _DMIOC_AUDIO_ADINFO_PARAM
{
    UINT32 audioPID;
    UINT8 audioType;
    UINT8 bActive;
}DMIOC_AUDIO_ADINFO_PARAM, *DMIOC_AUDIO_ADINFO_PARAMPTR;
#endif

typedef struct _PTI_SECTIONINFO
{
    INT32             DemuxUnit;
    UINT8   demuxring;
    UINT32    pid;
	UINT8	table_id;
	UINT8	section_number;
    UINT16  filter_id;
    UINT16   section_len;
    void *          Queue_ID;
} PTI_SECTIONINFO;

typedef enum
{
    MHEG_AUDIO_CMD_INIT,
    MHEG_AUDIO_CMD_PLAY,
    MHEG_AUDIO_CMD_STOP,
    MHEG_AUDIO_CMD_PAUSE,
    MHEG_AUDIO_CMD_RESUME,
}MHEG_Audio_DECK_CMD;

typedef enum
{
    MHEG_VIDEO_CMD_START,
    MHEG_VIDEO_CMD_STOP,
}MHEG_VideoIframe_DECK_CMD;

#ifdef CONFIG_SUPPORT_INDONESIA_EWS
typedef enum
{
    DTV_MS_CMD_INIT,
    DTV_MS_CMD_PLAY,
    DTV_MS_CMD_STOP,
    DTV_MS_CMD_PAUSE,
    DTV_MS_CMD_RESUME,
}DTV_MPEG_SOUND_CMD;
#endif

typedef struct _DMIOC_MPEG_AUDIO_PARAM_
{
    UINT8 cmd;
    UINT8 *data_ptr;
    INT32  data_length;
    UINT32  loop_count;
}DMIOC_MPEG_AUDIO_PARAM, *DMIOC_MPEG_AUDIO_PARAMPTR;

typedef struct _DMIOC_MHEG_VIDEO_PARAM_
{
    UINT8 cmd;
    UINT8 streamtype;
    UINT8 *data_ptr;
    UINT32  data_length;
    UINT8 retval;    
}DMIOC_MHEG_VIDEO_PARAM, *DMIOC_MHEG_VIDEO_PARAMPTR;


//set monitor ews pid.
#ifdef CONFIG_SUPPORT_EWS
typedef struct _DMIOC_SET_EWS_PARAM
{
    UINT32 PID;
    UINT8 bActive;
    UINT8 clear_ews_flag;
}DMIOC_SET_EWS_PARAM, *DMIOC_SET_EWS_PARAMPTR;

#endif

#endif /* _DTV_IOCTL_H_ */