edid.h 3.5 KB

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  1. #ifndef _EDID_H
  2. #define _EDID_H
  3. //#include <asm/byteorder.h>
  4. #include <linux/version.h>
  5. #define ONE_BYTE_INTERRUPT 1
  6. #define HANNSTART 0
  7. /*******************************************************************************
  8. *******************************************************************************/
  9. #ifndef INIT_BY_KMF
  10. #define DBG_MSG1(id, fmt,args...) printk(KERN_EMERG " " fmt, ## args)
  11. #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)
  12. #include <drv_dev.h>
  13. #else
  14. #include <asm-mips/mips-boards/sisdev.h> //Change the location of sisdev.h to sis516
  15. #endif
  16. #define tv_SetEDIDstate(a)
  17. #define notice_EdidUpdateOk()
  18. #else
  19. #include <drv_debug.h>
  20. #endif
  21. #if 0
  22. #ifndef CONFIG_SUPPORT_DEBUG_MESSAGE
  23. #define DebugPrint(fmt,args...) //printk(KERN_NOTICE "[EDID]" fmt "\n",## args)
  24. #elif defined(INIT_BY_KMF)
  25. #define DebugPrint(fmt,args...) do{if(*pdbgconf1&DBGCFG_EDID) printk(KERN_DEBUG "[EDID]" fmt "\n",## args);}while(0)
  26. #else
  27. #define DebugPrint(fmt,args...) printk(KERN_NOTICE "[EDID]" fmt "\n",## args)
  28. #endif
  29. #endif
  30. #define MmioWriteFun(Address,Data) writel(Data,(void *)(Address))
  31. #define MmioReadFun(Address) readl((void *)(Address))
  32. #define MmioWriteWordFun(Address,Data) writew(Data,(void *)(Address))
  33. #define MmioReadWordFun(Address) readw((void *)(Address))
  34. #define MmioWriteByteFun(Address,Data) writeb(Data,(void *)(Address))
  35. #define WB(Address,Data) writeb(Data,(void *)(Address))
  36. #define MmioReadByteFun(Address) readb((void *)(Address))
  37. #define RB(Address) readb((void *)(Address))
  38. #define HDMIA_SHADOWADDR SPI_EDID_ShadowAddress//0xBF002000
  39. #define HDMIB_SHADOWADDR (SPI_EDID_ShadowAddress+0x100)//0xBF002100
  40. #define VGA_SHADOWADDR (SPI_EDID_ShadowAddress+0x200)//0xBF002200//0xB9002200//0x99002200
  41. #define SLAVE_IRQ_FINAL 60
  42. #define EDID_HostINTmask (1<<(SLAVE_IRQ_FINAL%32))
  43. #define SLAVE0_SEGMENT_POINT_ID 0x60
  44. #define SLAVE0_DEVICE_ID 0xA0
  45. #define REG_BASE 0xbe060000
  46. #define Slave0_CTRL (REG_BASE+0x24)
  47. #define r_i2c_wr_ena (1<<8) //use only in 338 A1
  48. #define Slave_ModeSel (REG_BASE+0x28)
  49. #define SlaveW_Protect (1<<1)
  50. #define Slave_MMIO_Push (REG_BASE+0x2c)
  51. #define Slave1_CTRL (REG_BASE+0x30)
  52. #define Slave_MMIO_Waddr (REG_BASE+0x34)
  53. #define Slave_MMIO_Wdata (REG_BASE+0x38)
  54. #define Slave2_CTRL (REG_BASE+0x3c)
  55. #define Slave_MMIO_Raddr (REG_BASE+0x40)
  56. #define Slave_MMIO_Rdata (REG_BASE+0x44)
  57. #define IntClearReg (REG_BASE+0x60)
  58. #define Slave_IntStatus (REG_BASE+0x78)
  59. #if 0
  60. #define SX_CONTROL_SLAVE_EN 0x00000080 // Slave Enable
  61. #define SX_CONTROL_INT_EN 0x00000100 // Interrup enable
  62. #define SX_CONTROL_BYTE_INT 0x00000200
  63. #define SX_CONTROL_RESET 0x00000400 // Asynchronous reset
  64. #define SX_CONTROL_INT 0x00000800 // Interrup bit
  65. #define SLAVE_CONTROL_S0_READY 0x00000001
  66. #define SLAVE_CONTROL_S0_READ 0x00000004
  67. #define SLAVE_CONTROL_S1_READY 0x00000100
  68. #define SLAVE_CONTROL_S1_READ 0x00000400
  69. #define SLAVE_CONTROL_S2_READY 0x00010000
  70. #define SLAVE_CONTROL_S2_READ 0x00040000
  71. #define INT_CLEAR_REG_SLAVE0 0x00000001
  72. #define INT_CLEAR_REG_SLAVE1 0x00000100
  73. #define INT_CLEAR_REG_SLAVE2 0x00010000
  74. #define MODIFY_CHECKED 0x01
  75. #define MODIFY_HDMI1 0x02
  76. #define MODIFY_HDMI2 0x04
  77. #define MODIFY_VGA 0x08
  78. #endif
  79. #define SIS_IOC_MAGIC 0x95
  80. #define TIMEOUT (jiffies+HZ/2) // 500 ms
  81. typedef struct _EDID_DEV_
  82. {
  83. struct cdev cdev;
  84. struct delayed_work EdidWork;
  85. }EDID_DEV,*PEDID_DEV;
  86. #endif // end of #ifndef _EDID_H