UTS6710/drivers/module_include/drv_kmf_ioctl_internal.h

#ifndef _KMF_IOCTL_INTERNAL_H_
#define _KMF_IOCTL_INTERNAL_H_

typedef struct _RWriteEDID_t
{
	UINT8 address;
	UINT8 len;
	UINT8 src;
	UINT8 *data;
}RWriteEDID_t;

typedef struct _ScartInputData
{
	UINT8 index;
	UINT8 InputType;
}ScartInputData_t;

typedef struct _EMIUTILIOCTL_t
{
	UINT8 cmd;
	UINT8 mode;
}EMIUTILIOCTL_t;

typedef enum {
	MAIN,
	SUB
}InputPath;

/* Scart input type */
typedef enum
{
	TVFE_TvDec_SCART_CVBS = 0,
	TVFE_TvDec_SCART_RGB,
	TVFE_TvDec_SCART_MIX,
	TVFE_TvDec_SCART_SV,
} TVFE_TvDecScartInputType_e;

typedef enum
{
	TVFE_TvDec_SCART_AutoMode= 0,
	TVFE_TvDec_SCART_Force_RGB,
	TVFE_TvDec_SCART_Force_CVBS,
	TVFE_TvDec_SCART_Force_SV
} TVFE_TvDecForceScartType_t;

typedef enum{
	TVFE_TT_ECC_HAMMING,
	TVFE_TT_ECC_PARITY
}TVFE_TTSlicerEccMode_e;

/* Enumeration of TVFE events */
typedef enum {
	TVFE_EVENT_CH1_FSM_INITIAL_COMPLETE,
	/*
	** This event will sent one time when a available signal become a
	** unavailable signal
	*/
	TVFE_EVENT_CH1_NO_SIGNAL,
	TVFE_EVENT_CH1_DEBOUNCING_SIGNAL,
	/*
	** This event will sent one time when a new available signal is found
	*/
	TVFE_EVENT_CH1_AVAILABLE_SIGNAL,
	TVFE_EVENT_CH1_FSM_STOP,
	TVFE_EVENT_CH1_PC_AUTO_TUNE_COMPLETE,
	TVFE_EVENT_CH1_PC_AUTO_TUNE,
	TVFE_EVENT_CH1_HDCP_PROTECT,
	TVFE_EVENT_CH1_HDCP_UNPROTECT,
	TVFE_EVENT_CH1_SCART_RGB,
	TVFE_EVENT_CH1_SCART_CVBS,
	TVFE_EVENT_CH1_UNSUPPORT_MODE,
	TVFE_EVENT_CH1_HDMI_HDMI_MODE,
	TVFE_EVENT_CH1_HDMI_DVI_MODE,
	TVFE_EVENT_MAX,
} TVFE_Event_e;

/* Enumeration of FSM states */
typedef enum {
	FSM_VFE_INITIAL,
	FSM_VFE_NO_SIGNAL,
	FSM_VFE_NO_SIGNAL_CHECK_STATUS,
	FSM_VFE_SIGNAL_IN_DEBOUNCE,
	FSM_VFE_SIGNAL_OUT_DEBOUNCE,
	FSM_VFE_SIGNAL_STABLE_UPDATE_RESOLUTION,
	FSM_VFE_SIGNAL_STABLE,
	FSM_VFE_NO_SIGNAL_INFORM_VOM,
	FSM_VFE_NOT_NO_SIGNAL,
	FSM_VFE_SIGNAL_UNSUPPORT,
	FSM_VFE_VAFE_AUTOTUNE,
	FSM_VFE_VAFE_HW_AUTO_OFFSET,
	FSM_VFE_VAFE_HW_AUTO_GAIN,
	FSM_VFE_VAFE_HW_AUTOCALIBRATION,
	FSM_VFE_VAFE_MODE_DETECT,
	FSM_VFE_VAFE_AUTOCOLOR_OFFSET_ADJUST,
	FSM_VFE_TVDEC_TUNER_FIND_NEW_SIGNAL,
	FSM_VFE_TVDEC_TUNER_FIND_NEW_SIGNAL_DEBOUNCE,
	FSM_VFE_TVDEC_TUNER_SCANNING_INITIAL,
	FSM_VFE_TVDEC_TUNER_SCANNING,
	FSM_VFE_TVDEC_VCR,
	FSM_VFE_TVDEC_NON_STANDARD,
	FSM_VFE_VAFE_SOG_BOUNDARY_DETECT,
	FSM_VFE_UNUSED = 0xff,
} TVFE_CheckState_e;

/* Describe embedded front-end video digitizer */
typedef enum {
	TVFE_TV_DECODER,
	TVFE_ADC,
	TVFE_HDMI,
	TVFE_CCIR656,
	TVFE_MPEG,
	TVFE_DEVICE_MAX,
} TVFE_Device_e;

typedef enum {
	TVFE_FRAME_BUFFER_MODE = 0,
	TVFE_BYPASS_MODE,
	TVFE_MODE_MAX,
} TVFE_ByPassmode_e;

typedef enum
{
	TVFE_ATV_Input_Vsync_FreqRange_Unknown = 0,
	TVFE_ATV_Input_Vsync_FreqRange_50Hz,
	TVFE_ATV_Input_Vsync_FreqRange_60Hz,
	TVFE_ATV_Input_Vsync_FreqRange_Other,
} TVFE_ATV_INPUT_VSYNCFREQ_t;

typedef enum
{
	TVFE_SRAMEDID_PORT_PC,
    TVFE_SRAMEDID_PORT_HDMI0,
    TVFE_SRAMEDID_PORT_HDMI1,
    TVFE_SRAMEDID_PORT_HDMI2,
    TVFE_SRAMEDID_PORT_MAX,
} TVFE_SRAMEDID_PORT_e;

/*****************************************************************************
** Structure defined here
*****************************************************************************/
typedef struct {
	PLF_VideoID_t eModeID;
	UINT32 wHStart; /* tpi input window hstart position */
	UINT32 wVStart; /* tpi input window vstart position */
	UINT32 wImgBufMaxWidth;
	UINT32 wImgBufMaxHeight;
} TVFE_TimingInfo_Part1_st;

typedef struct {
	UINT32 wHStart_x1; /* H start position of 1X timing */
	UINT32 wHStart_x1_5; /*  H start position of 1.5X timing */
	signed INT8 bSVOffsetX; /* SVideo H start position offset */
	signed INT8 bSVOffsetY; /* SVideo V start position offset */
	signed INT8 bSCARTRgbOffsetX; /* SCART_RGB H start position offset */
	signed INT8 bSCARTRgbOffsetY; /* SCART_RGB V start position offset */
} tvdec_param_st;

typedef struct {
	UINT8 bTUNER_HUpSampling; /* H Upsampling mode for TUNER source */
	UINT8 bTUNER_10bitsPath; /* DRAM control mode for TUNER source */
	UINT8 bCVBS_HUpSampling; /* H Upsampling mode for CVBS source */
	UINT8 bCVBS_10bitsPath; /* DRAM control mode for CVBS source */
	UINT8 bSVIDEO_HUpSampling; /* H Upsampling mode for SVIDEO source */
	UINT8 bSVIDEO_10bitsPath; /* DRAM control mode for SVIDEO source */
	UINT8 bSCART_HUpSampling; /* H Upsampling mode for SCART source */
	UINT8 bSCART_10bitsPath; /* DRAM control mode for SCART source */
} tvdec_optimize_st;

typedef struct {
//weilung for SPV9107
	struct {
		UINT8 bfPolRef : 1;
		UINT8 bHPol : 1;
		UINT8 bVPol : 1;
		UINT8 bReserved : 5;
	} polarity;
	UINT8 bEnableFrameBufferMode;
	UINT8 bSamplingMode;
	UINT8 bPhase;
	struct {
		UINT8 bSOGTh : 5 ;
		UINT8 bReserved : 3;
	} sog;
	UINT8 bVCORange; //2-bits
	UINT8 bCurrent; //5-bits
	UINT8 bClampPlacement;
	UINT8 bClampDuration;
	UINT8 bAAFBandWidth; //5-bits
	UINT8 bPreCoast;
	UINT8 bPostCoast;
	UINT8 bModeDetectWithSyncWidth;
	struct {
		UINT32 wfDitherEn : 1;
		UINT32 wfBit1 : 1;
		UINT32 wfBit2 : 1;
		UINT32 wfBit3 : 1;
		UINT32 wfBit4 : 1;
		UINT32 wfBit5 : 1;
		UINT32 wfBit6 : 1;
		UINT32 wfBit7 : 1;
		UINT32 wReserved : 8;
	} extra;
	UINT8 bExtraByte;
} adc_param_st;

/* 10bits or not */
typedef struct {
	UINT8 b10bitsPath; /* DRAM control mode */
} optimize_st;

/* YUV444 or not */
typedef struct {
	UINT8 bYUV;/*HDMI Output Color Space*/
} Color_Space_st;

/* Timing information */
typedef struct {
	PLF_VideoID_t eModeID;
	UINT8 validflag;
	UINT32 wHStart; /* tpi input window hstart position */
	UINT32 wVStart; /* tpi input window vstart position */
	UINT32 wHValid; /* tpi input window hvalid size */
	UINT32 wVValid; /* tpi input window vvalid size */
	UINT32 wHTotal; /* tpi input window htotal size */
	UINT32 wVTotal; /* tpi input window vtotal size */
	UINT32 wClkRate; /* input timing clock rate */
	UINT8 fInterlace;
	UINT32 wImgBufMaxWidth;
	UINT32 wImgBufMaxHeight;
} TVFE_TimingInfo_st;

typedef struct {
	PLF_VideoID_t eModeID;
	INT8 *ModeString;
	UINT32 wHValid; /* tpi input window hvalid size */
	UINT32 wVValid; /* tpi input window vvalid size */
	UINT32 wHTotal; /* tpi input window htotal size */
	UINT32 wVTotal; /* tpi input window vtotal size */
	UINT32 wClkRate; /* input timing clock rate */
	UINT8 fInterlace;
	UINT32 wHsFreq;
	UINT32 wVsFreq;
	UINT8 bHsOutWidth;
	UINT32 wHSync_Width;
	UINT32 wVSync_Width;
} TVFE_ADCTimingInfo_Part2_st;

typedef struct {
	//UINT32 custom_tag;
	//void *custom_data;
	TVFE_TimingInfo_Part1_st tpi;
	adc_param_st vfe;
	optimize_st optimize;
	TVFE_ADCTimingInfo_Part2_st *ModeTable;
} TVFE_ADCTimingInfo_st;

/* TV decoding timing info */
typedef struct {
	PLF_VideoID_t eModeID;
	UINT8 validflag;
	UINT32 wHValid; /* tpi input window hvalid size */
	UINT32 wVValid; /* tpi input window vvalid size */
	UINT32 wHTotal; /* tpi input window htotal size */
	UINT32 wVTotal; /* tpi input window vtotal size */
	UINT32 wClkRate; /* input timing clock rate */
	UINT8 fInterlace;
} TVFE_TVDecTimingInfo_Part2_st;

typedef struct {
	//UINT32 custom_tag;
	//void *custom_data;
	TVFE_TimingInfo_Part1_st tpi;
	const tvdec_param_st tvdec;
	tvdec_optimize_st tvdec_optimize;
	TVFE_TVDecTimingInfo_Part2_st *ModeTable;
} TVFE_TVDecTimingInfo_st;

typedef struct {
	UINT8 bEnableFrameBufferMode;
} tmds_param_st;


/*!
 * @brief   HDMI 3D Structure
 */
typedef enum
{
    DRV_HDMI_3D_STRUCT_FP = 0x00,			//frame packing
    DRV_HDMI_3D_STRUCT_FA,			//field alternative
    DRV_HDMI_3D_STRUCT_LA,			//line alternative
    DRV_HDMI_3D_STRUCT_SS_F,		//side by side full
    DRV_HDMI_3D_STRUCT_L_D,			//L + depth
    DRV_HDMI_3D_STRUCT_L_D_G,		//L + depth + graphic + graphics-depth
    DRV_HDMI_3D_STRUCT_TB,			//Top and Bottom
    DRV_HDMI_3D_STRUCT_RESV7,		//reserved
    DRV_HDMI_3D_STRUCT_SS_H,		//side by side half
    DRV_HDMI_3D_STRUCT_RESV9,		//reserved
    DRV_HDMI_3D_STRUCT_RESV10,		//reserved
    DRV_HDMI_3D_STRUCT_RESV11,		//reserved
    DRV_HDMI_3D_STRUCT_RESV12,		//reserved
    DRV_HDMI_3D_STRUCT_RESV13,		//reserved
    DRV_HDMI_3D_STRUCT_RESV14,		//reserved
    DRV_HDMI_3D_STRUCT_NOTUSE,		//not use
} DRV_HDMI3DStructure_e;


typedef struct {
	PLF_VideoID_t eModeID;
	DRV_HDMI3DStructure_e e3DStructure;
	UINT32 wHValid; /* tpi input window hvalid size */
	UINT32 wVValid; /* tpi input window vvalid size */
	UINT32 wHTotal; /* tpi input window htotal size */
	UINT32 wVTotal; /* tpi input window vtotal size */
	UINT32 wClkRate; /* input timing clock rate */
	UINT8 fInterlace;
	UINT32 wHsFreq;
	UINT32 wVsFreq;
	/* Input Pixel Clock Replication or Output Pixel clock divider */
	struct {
		 /*
		 ** 00 : 1x clock cycle (no replication)  01: 2x clock
		 ** 10: RSVD 11: 4x clock
		 */
		UINT8 bIptPixRep : 2;
		/*  00: No divide 01: Divide by 2 10: RSVD  11: Divide by 4 */
		UINT8 bOptPixDiv : 2;
		/* Output Clock Invert 1=invert output clock 0=Normal output clock */
		UINT8 bOutputClockInvert : 3;
	} PixRepDiv;
} TVFE_HDMITimingInfo_Part2_st;

/* HDMI timing info */
typedef struct {
	//UINT32 custom_tag;
	//void *custom_data;
	TVFE_TimingInfo_Part1_st tpi;
	tmds_param_st vfe;
	optimize_st optimize;
	Color_Space_st ColorSpace;
	TVFE_HDMITimingInfo_Part2_st *ModeTable;
} TVFE_HDMITimingInfo_st;


#ifdef __KERNEL__
#include <linux/version.h>
#include <linux/fs.h>

#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
LONG kmf_ioctl(struct file *file, UINT32 cmd, ULONG arg);
#else
INT32 kmf_ioctl(struct inode *inode, struct file *filp, UINT32 cmd, ULONG arg);
#endif

#endif //__KERNEL__

extern UINT8 PQ_ParsePQCmdSet(UINT32 *pulAddr);
extern UINT32 PQ_LoadGammaTable(UINT32 *pulAddr);
extern INT32 adc_AdjustFunction(UINT8 ucFunID, INT32 iValue);
extern void sfs_umount(void);
extern void sfs_mount(void);
extern void PQ_GetYavg(UINT32 *Y_AVG);
extern int PQ_GetYHistOverValueCount(int YValue);


#endif